projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 53467f57 IT |
1 | # Check 64bit AVX512{VBMI2,VL} instructions |
| 2 | ||
| 3 | .allow_index_reg | |
| 4 | .text | |
| 5 | _start: | |
| 6 | vpcompressb %xmm30, (%rcx){%k7} # AVX512{VBMI2,VL} | |
| 7 | vpcompressb %xmm30, 0x123(%rax,%r14,8) # AVX512{VBMI2,VL} | |
| 8 | vpcompressb %xmm30, 127(%rdx) # AVX512{VBMI2,VL} Disp8 | |
| 9 | vpcompressb %ymm30, (%rcx){%k7} # AVX512{VBMI2,VL} | |
| 10 | vpcompressb %ymm30, 0x123(%rax,%r14,8) # AVX512{VBMI2,VL} | |
| 11 | vpcompressb %ymm30, 127(%rdx) # AVX512{VBMI2,VL} Disp8 | |
| 12 | vpcompressb %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 13 | vpcompressb %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 14 | vpcompressb %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 15 | vpcompressb %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 16 | vpcompressb %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 17 | vpcompressb %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 18 | ||
| 19 | vpcompressw %xmm30, (%rcx){%k7} # AVX512{VBMI2,VL} | |
| 20 | vpcompressw %xmm30, 0x123(%rax,%r14,8) # AVX512{VBMI2,VL} | |
| 21 | vpcompressw %xmm30, 254(%rdx) # AVX512{VBMI2,VL} Disp8 | |
| 22 | vpcompressw %ymm30, (%rcx){%k7} # AVX512{VBMI2,VL} | |
| 23 | vpcompressw %ymm30, 0x123(%rax,%r14,8) # AVX512{VBMI2,VL} | |
| 24 | vpcompressw %ymm30, 254(%rdx) # AVX512{VBMI2,VL} Disp8 | |
| 25 | vpcompressw %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 26 | vpcompressw %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 27 | vpcompressw %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 28 | vpcompressw %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 29 | vpcompressw %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 30 | vpcompressw %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 31 | ||
| 32 | vpexpandb (%rcx), %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 33 | vpexpandb (%rcx), %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 34 | vpexpandb 0x123(%rax,%r14,8), %xmm30 # AVX512{VBMI2,VL} | |
| 35 | vpexpandb 127(%rdx), %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 36 | vpexpandb (%rcx), %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 37 | vpexpandb (%rcx), %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 38 | vpexpandb 0x123(%rax,%r14,8), %ymm30 # AVX512{VBMI2,VL} | |
| 39 | vpexpandb 127(%rdx), %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 40 | vpexpandb %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 41 | vpexpandb %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 42 | vpexpandb %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 43 | vpexpandb %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 44 | vpexpandb %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 45 | vpexpandb %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 46 | ||
| 47 | vpexpandw (%rcx), %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 48 | vpexpandw (%rcx), %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 49 | vpexpandw 0x123(%rax,%r14,8), %xmm30 # AVX512{VBMI2,VL} | |
| 50 | vpexpandw 254(%rdx), %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 51 | vpexpandw (%rcx), %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 52 | vpexpandw (%rcx), %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 53 | vpexpandw 0x123(%rax,%r14,8), %ymm30 # AVX512{VBMI2,VL} | |
| 54 | vpexpandw 254(%rdx), %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 55 | vpexpandw %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 56 | vpexpandw %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 57 | vpexpandw %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 58 | vpexpandw %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 59 | vpexpandw %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 60 | vpexpandw %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 61 | ||
| 62 | vpshldvw %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 63 | vpshldvw %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 64 | vpshldvw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 65 | vpshldvw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 66 | vpshldvw 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 67 | vpshldvw %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 68 | vpshldvw %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 69 | vpshldvw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 70 | vpshldvw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 71 | vpshldvw 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 72 | ||
| 73 | vpshldvd %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 74 | vpshldvd %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 75 | vpshldvd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 76 | vpshldvd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 77 | vpshldvd 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 78 | vpshldvd 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 79 | vpshldvd %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 80 | vpshldvd %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 81 | vpshldvd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 82 | vpshldvd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 83 | vpshldvd 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 84 | vpshldvd 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 85 | ||
| 86 | vpshldvq %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 87 | vpshldvq %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 88 | vpshldvq %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 89 | vpshldvq 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 90 | vpshldvq 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 91 | vpshldvq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 92 | vpshldvq %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 93 | vpshldvq %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 94 | vpshldvq %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 95 | vpshldvq 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 96 | vpshldvq 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 97 | vpshldvq 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 98 | ||
| 99 | vpshrdvw %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 100 | vpshrdvw %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 101 | vpshrdvw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 102 | vpshrdvw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 103 | vpshrdvw 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 104 | vpshrdvw %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 105 | vpshrdvw %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 106 | vpshrdvw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 107 | vpshrdvw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 108 | vpshrdvw 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 109 | ||
| 110 | vpshrdvd %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 111 | vpshrdvd %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 112 | vpshrdvd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 113 | vpshrdvd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 114 | vpshrdvd 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 115 | vpshrdvd 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 116 | vpshrdvd %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 117 | vpshrdvd %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 118 | vpshrdvd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 119 | vpshrdvd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 120 | vpshrdvd 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 121 | vpshrdvd 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 122 | ||
| 123 | vpshrdvq %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 124 | vpshrdvq %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 125 | vpshrdvq %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 126 | vpshrdvq 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 127 | vpshrdvq 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 128 | vpshrdvq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 129 | vpshrdvq %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 130 | vpshrdvq %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 131 | vpshrdvq %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 132 | vpshrdvq 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 133 | vpshrdvq 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 134 | vpshrdvq 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 135 | ||
| 136 | vpshldw $0xab, %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 137 | vpshldw $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 138 | vpshldw $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 139 | vpshldw $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 140 | vpshldw $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 141 | vpshldw $0xab, %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 142 | vpshldw $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 143 | vpshldw $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 144 | vpshldw $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 145 | vpshldw $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 146 | ||
| 147 | vpshldd $0xab, %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 148 | vpshldd $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 149 | vpshldd $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 150 | vpshldd $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 151 | vpshldd $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 152 | vpshldd $123, 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 153 | vpshldd $0xab, %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 154 | vpshldd $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 155 | vpshldd $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 156 | vpshldd $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 157 | vpshldd $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 158 | vpshldd $123, 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 159 | ||
| 160 | vpshldq $0xab, %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 161 | vpshldq $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 162 | vpshldq $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 163 | vpshldq $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 164 | vpshldq $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 165 | vpshldq $123, 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 166 | vpshldq $0xab, %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 167 | vpshldq $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 168 | vpshldq $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 169 | vpshldq $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 170 | vpshldq $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 171 | vpshldq $123, 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 172 | ||
| 173 | vpshrdw $0xab, %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 174 | vpshrdw $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 175 | vpshrdw $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 176 | vpshrdw $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 177 | vpshrdw $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 178 | vpshrdw $0xab, %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 179 | vpshrdw $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 180 | vpshrdw $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 181 | vpshrdw $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 182 | vpshrdw $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 183 | ||
| 184 | vpshrdd $0xab, %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 185 | vpshrdd $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 186 | vpshrdd $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 187 | vpshrdd $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 188 | vpshrdd $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 189 | vpshrdd $123, 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 190 | vpshrdd $0xab, %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 191 | vpshrdd $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 192 | vpshrdd $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 193 | vpshrdd $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 194 | vpshrdd $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 195 | vpshrdd $123, 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 196 | ||
| 197 | vpshrdq $0xab, %xmm28, %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 198 | vpshrdq $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI2,VL} | |
| 199 | vpshrdq $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 200 | vpshrdq $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI2,VL} | |
| 201 | vpshrdq $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 202 | vpshrdq $123, 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 203 | vpshrdq $0xab, %ymm28, %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 204 | vpshrdq $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI2,VL} | |
| 205 | vpshrdq $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI2,VL} | |
| 206 | vpshrdq $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI2,VL} | |
| 207 | vpshrdq $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 208 | vpshrdq $123, 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 209 | ||
| 210 | .intel_syntax noprefix | |
| 211 | vpcompressb XMMWORD PTR [rcx]{k7}, xmm30 # AVX512{VBMI2,VL} | |
| 212 | vpcompressb XMMWORD PTR [rax+r14*8+0x1234], xmm30 # AVX512{VBMI2,VL} | |
| 213 | vpcompressb XMMWORD PTR [rdx+127], xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 214 | vpcompressb YMMWORD PTR [rcx]{k7}, ymm30 # AVX512{VBMI2,VL} | |
| 215 | vpcompressb YMMWORD PTR [rax+r14*8+0x1234], ymm30 # AVX512{VBMI2,VL} | |
| 216 | vpcompressb YMMWORD PTR [rdx+127], ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 217 | vpcompressb xmm30, xmm29 # AVX512{VBMI2,VL} | |
| 218 | vpcompressb xmm30{k7}, xmm29 # AVX512{VBMI2,VL} | |
| 219 | vpcompressb xmm30{k7}{z}, xmm29 # AVX512{VBMI2,VL} | |
| 220 | vpcompressb ymm30, ymm29 # AVX512{VBMI2,VL} | |
| 221 | vpcompressb ymm30{k7}, ymm29 # AVX512{VBMI2,VL} | |
| 222 | vpcompressb ymm30{k7}{z}, ymm29 # AVX512{VBMI2,VL} | |
| 223 | ||
| 224 | vpcompressw XMMWORD PTR [rcx]{k7}, xmm30 # AVX512{VBMI2,VL} | |
| 225 | vpcompressw XMMWORD PTR [rax+r14*8+0x1234], xmm30 # AVX512{VBMI2,VL} | |
| 226 | vpcompressw XMMWORD PTR [rdx+254], xmm30 # AVX512{VBMI2,VL} Disp8 | |
| 227 | vpcompressw YMMWORD PTR [rcx]{k7}, ymm30 # AVX512{VBMI2,VL} | |
| 228 | vpcompressw YMMWORD PTR [rax+r14*8+0x1234], ymm30 # AVX512{VBMI2,VL} | |
| 229 | vpcompressw YMMWORD PTR [rdx+254], ymm30 # AVX512{VBMI2,VL} Disp8 | |
| 230 | vpcompressw xmm30, xmm29 # AVX512{VBMI2,VL} | |
| 231 | vpcompressw xmm30{k7}, xmm29 # AVX512{VBMI2,VL} | |
| 232 | vpcompressw xmm30{k7}{z}, xmm29 # AVX512{VBMI2,VL} | |
| 233 | vpcompressw ymm30, ymm29 # AVX512{VBMI2,VL} | |
| 234 | vpcompressw ymm30{k7}, ymm29 # AVX512{VBMI2,VL} | |
| 235 | vpcompressw ymm30{k7}{z}, ymm29 # AVX512{VBMI2,VL} | |
| 236 | ||
| 237 | vpexpandb xmm30{k7}, XMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 238 | vpexpandb xmm30{k7}{z}, XMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 239 | vpexpandb xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 240 | vpexpandb xmm30, XMMWORD PTR [rdx+127] # AVX512{VBMI2,VL} Disp8 | |
| 241 | vpexpandb ymm30{k7}, YMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 242 | vpexpandb ymm30{k7}{z}, YMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 243 | vpexpandb ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 244 | vpexpandb ymm30, YMMWORD PTR [rdx+127] # AVX512{VBMI2,VL} Disp8 | |
| 245 | vpexpandb xmm30, xmm29 # AVX512{VBMI2,VL} | |
| 246 | vpexpandb xmm30{k7}, xmm29 # AVX512{VBMI2,VL} | |
| 247 | vpexpandb xmm30{k7}{z}, xmm29 # AVX512{VBMI2,VL} | |
| 248 | vpexpandb ymm30, ymm29 # AVX512{VBMI2,VL} | |
| 249 | vpexpandb ymm30{k7}, ymm29 # AVX512{VBMI2,VL} | |
| 250 | vpexpandb ymm30{k7}{z}, ymm29 # AVX512{VBMI2,VL} | |
| 251 | ||
| 252 | vpexpandw xmm30{k7}, XMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 253 | vpexpandw xmm30{k7}{z}, XMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 254 | vpexpandw xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 255 | vpexpandw xmm30, XMMWORD PTR [rdx+254] # AVX512{VBMI2,VL} Disp8 | |
| 256 | vpexpandw ymm30{k7}, YMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 257 | vpexpandw ymm30{k7}{z}, YMMWORD PTR [rcx] # AVX512{VBMI2,VL} | |
| 258 | vpexpandw ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 259 | vpexpandw ymm30, YMMWORD PTR [rdx+254] # AVX512{VBMI2,VL} Disp8 | |
| 260 | vpexpandw xmm30, xmm29 # AVX512{VBMI2,VL} | |
| 261 | vpexpandw xmm30{k7}, xmm29 # AVX512{VBMI2,VL} | |
| 262 | vpexpandw xmm30{k7}{z}, xmm29 # AVX512{VBMI2,VL} | |
| 263 | vpexpandw ymm30, ymm29 # AVX512{VBMI2,VL} | |
| 264 | vpexpandw ymm30{k7}, ymm29 # AVX512{VBMI2,VL} | |
| 265 | vpexpandw ymm30{k7}{z}, ymm29 # AVX512{VBMI2,VL} | |
| 266 | ||
| 267 | vpshldvw xmm30, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 268 | vpshldvw xmm30{k7}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 269 | vpshldvw xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 270 | vpshldvw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 271 | vpshldvw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI2,VL} Disp8 | |
| 272 | vpshldvw ymm30, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 273 | vpshldvw ymm30{k7}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 274 | vpshldvw ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 275 | vpshldvw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 276 | vpshldvw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI2,VL} Disp8 | |
| 277 | ||
| 278 | vpshldvd xmm30, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 279 | vpshldvd xmm30{k7}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 280 | vpshldvd xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 281 | vpshldvd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 282 | vpshldvd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI2,VL} Disp8 | |
| 283 | vpshldvd xmm30, xmm29, [rdx+508]{1to4} # AVX512{VBMI2,VL} Disp8 | |
| 284 | vpshldvd ymm30, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 285 | vpshldvd ymm30{k7}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 286 | vpshldvd ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 287 | vpshldvd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 288 | vpshldvd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI2,VL} Disp8 | |
| 289 | vpshldvd ymm30, ymm29, [rdx+508]{1to8} # AVX512{VBMI2,VL} Disp8 | |
| 290 | ||
| 291 | vpshldvq xmm30, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 292 | vpshldvq xmm30{k7}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 293 | vpshldvq xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 294 | vpshldvq xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 295 | vpshldvq xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI2,VL} Disp8 | |
| 296 | vpshldvq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{VBMI2,VL} Disp8 | |
| 297 | vpshldvq ymm30, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 298 | vpshldvq ymm30{k7}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 299 | vpshldvq ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 300 | vpshldvq ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 301 | vpshldvq ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI2,VL} Disp8 | |
| 302 | vpshldvq ymm30, ymm29, [rdx+1016]{1to4} # AVX512{VBMI2,VL} Disp8 | |
| 303 | ||
| 304 | vpshrdvw xmm30, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 305 | vpshrdvw xmm30{k7}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 306 | vpshrdvw xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 307 | vpshrdvw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 308 | vpshrdvw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI2,VL} Disp8 | |
| 309 | vpshrdvw ymm30, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 310 | vpshrdvw ymm30{k7}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 311 | vpshrdvw ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 312 | vpshrdvw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 313 | vpshrdvw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI2,VL} Disp8 | |
| 314 | ||
| 315 | vpshrdvd xmm30, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 316 | vpshrdvd xmm30{k7}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 317 | vpshrdvd xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 318 | vpshrdvd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 319 | vpshrdvd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI2,VL} Disp8 | |
| 320 | vpshrdvd xmm30, xmm29, [rdx+508]{1to4} # AVX512{VBMI2,VL} Disp8 | |
| 321 | vpshrdvd ymm30, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 322 | vpshrdvd ymm30{k7}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 323 | vpshrdvd ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 324 | vpshrdvd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 325 | vpshrdvd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI2,VL} Disp8 | |
| 326 | vpshrdvd ymm30, ymm29, [rdx+508]{1to8} # AVX512{VBMI2,VL} Disp8 | |
| 327 | ||
| 328 | vpshrdvq xmm30, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 329 | vpshrdvq xmm30{k7}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 330 | vpshrdvq xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI2,VL} | |
| 331 | vpshrdvq xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 332 | vpshrdvq xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI2,VL} Disp8 | |
| 333 | vpshrdvq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{VBMI2,VL} Disp8 | |
| 334 | vpshrdvq ymm30, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 335 | vpshrdvq ymm30{k7}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 336 | vpshrdvq ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI2,VL} | |
| 337 | vpshrdvq ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI2,VL} | |
| 338 | vpshrdvq ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI2,VL} Disp8 | |
| 339 | vpshrdvq ymm30, ymm29, [rdx+1016]{1to4} # AVX512{VBMI2,VL} Disp8 | |
| 340 | ||
| 341 | vpshldw xmm30, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 342 | vpshldw xmm30{k7}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 343 | vpshldw xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 344 | vpshldw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 345 | vpshldw xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{VBMI2,VL} Disp8 | |
| 346 | vpshldw ymm30, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 347 | vpshldw ymm30{k7}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 348 | vpshldw ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 349 | vpshldw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 350 | vpshldw ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{VBMI2,VL} Disp8 | |
| 351 | ||
| 352 | vpshldd xmm30, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 353 | vpshldd xmm30{k7}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 354 | vpshldd xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 355 | vpshldd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 356 | vpshldd xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{VBMI2,VL} Disp8 | |
| 357 | vpshldd xmm30, xmm29, [rdx+508]{1to4}, 123 # AVX512{VBMI2,VL} Disp8 | |
| 358 | vpshldd ymm30, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 359 | vpshldd ymm30{k7}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 360 | vpshldd ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 361 | vpshldd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 362 | vpshldd ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{VBMI2,VL} Disp8 | |
| 363 | vpshldd ymm30, ymm29, [rdx+508]{1to8}, 123 # AVX512{VBMI2,VL} Disp8 | |
| 364 | ||
| 365 | vpshldq xmm30, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 366 | vpshldq xmm30{k7}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 367 | vpshldq xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 368 | vpshldq xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 369 | vpshldq xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{VBMI2,VL} Disp8 | |
| 370 | vpshldq xmm30, xmm29, [rdx+1016]{1to2}, 123 # AVX512{VBMI2,VL} Disp8 | |
| 371 | vpshldq ymm30, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 372 | vpshldq ymm30{k7}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 373 | vpshldq ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 374 | vpshldq ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 375 | vpshldq ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{VBMI2,VL} Disp8 | |
| 376 | vpshldq ymm30, ymm29, [rdx+1016]{1to4}, 123 # AVX512{VBMI2,VL} Disp8 | |
| 377 | ||
| 378 | vpshrdw xmm30, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 379 | vpshrdw xmm30{k7}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 380 | vpshrdw xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 381 | vpshrdw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 382 | vpshrdw xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{VBMI2,VL} Disp8 | |
| 383 | vpshrdw ymm30, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 384 | vpshrdw ymm30{k7}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 385 | vpshrdw ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 386 | vpshrdw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 387 | vpshrdw ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{VBMI2,VL} Disp8 | |
| 388 | ||
| 389 | vpshrdd xmm30, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 390 | vpshrdd xmm30{k7}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 391 | vpshrdd xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 392 | vpshrdd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 393 | vpshrdd xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{VBMI2,VL} Disp8 | |
| 394 | vpshrdd xmm30, xmm29, [rdx+508]{1to4}, 123 # AVX512{VBMI2,VL} Disp8 | |
| 395 | vpshrdd ymm30, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 396 | vpshrdd ymm30{k7}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 397 | vpshrdd ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 398 | vpshrdd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 399 | vpshrdd ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{VBMI2,VL} Disp8 | |
| 400 | vpshrdd ymm30, ymm29, [rdx+508]{1to8}, 123 # AVX512{VBMI2,VL} Disp8 | |
| 401 | vpshrdq xmm30, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 402 | vpshrdq xmm30{k7}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 403 | vpshrdq xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{VBMI2,VL} | |
| 404 | vpshrdq xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 405 | vpshrdq xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{VBMI2,VL} Disp8 | |
| 406 | vpshrdq xmm30, xmm29, [rdx+1016]{1to2}, 123 # AVX512{VBMI2,VL} Disp8 | |
| 407 | vpshrdq ymm30, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 408 | vpshrdq ymm30{k7}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 409 | vpshrdq ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{VBMI2,VL} | |
| 410 | vpshrdq ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{VBMI2,VL} | |
| 411 | vpshrdq ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{VBMI2,VL} Disp8 | |
| 412 | vpshrdq ymm30, ymm29, [rdx+1016]{1to4}, 123 # AVX512{VBMI2,VL} Disp8 |