projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| ff1982d5 IT |
1 | #as: -mevexwig=1 |
| 2 | #objdump: -dw -Mintel | |
| 3 | #name: x86_64 AVX512VL/VPCLMULQDQ wig insns (Intel disassembly) | |
| 4 | #source: x86-64-avx512vl_vpclmulqdq-wig.s | |
| 5 | ||
| 6 | .*: +file format .* | |
| 7 | ||
| 8 | ||
| 9 | Disassembly of section \.text: | |
| 10 | ||
| 11 | 0+ <_start>: | |
| 12 | [ ]*[a-f0-9]+:[ ]*62 a3 d5 00 44 cf ab[ ]*vpclmulqdq xmm17,xmm21,xmm23,0xab | |
| 13 | [ ]*[a-f0-9]+:[ ]*62 a3 d5 00 44 8c f0 23 01 00 00 7b[ ]*vpclmulqdq xmm17,xmm21,XMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b | |
| 14 | [ ]*[a-f0-9]+:[ ]*62 e3 d5 00 44 4a 7f 7b[ ]*vpclmulqdq xmm17,xmm21,XMMWORD PTR \[rdx\+0x7f0\],0x7b | |
| 15 | [ ]*[a-f0-9]+:[ ]*62 a3 ed 20 44 fb ab[ ]*vpclmulqdq ymm23,ymm18,ymm19,0xab | |
| 16 | [ ]*[a-f0-9]+:[ ]*62 a3 ed 20 44 bc f0 23 01 00 00 7b[ ]*vpclmulqdq ymm23,ymm18,YMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b | |
| 17 | [ ]*[a-f0-9]+:[ ]*62 e3 ed 20 44 7a 7f 7b[ ]*vpclmulqdq ymm23,ymm18,YMMWORD PTR \[rdx\+0xfe0\],0x7b | |
| 18 | [ ]*[a-f0-9]+:[ ]*62 a3 d5 00 44 cf ab[ ]*vpclmulqdq xmm17,xmm21,xmm23,0xab | |
| 19 | [ ]*[a-f0-9]+:[ ]*62 a3 d5 00 44 8c f0 23 01 00 00 7b[ ]*vpclmulqdq xmm17,xmm21,XMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b | |
| 20 | [ ]*[a-f0-9]+:[ ]*62 e3 d5 00 44 4a 7f 7b[ ]*vpclmulqdq xmm17,xmm21,XMMWORD PTR \[rdx\+0x7f0\],0x7b | |
| 21 | [ ]*[a-f0-9]+:[ ]*62 a3 ed 20 44 fb ab[ ]*vpclmulqdq ymm23,ymm18,ymm19,0xab | |
| 22 | [ ]*[a-f0-9]+:[ ]*62 a3 ed 20 44 bc f0 23 01 00 00 7b[ ]*vpclmulqdq ymm23,ymm18,YMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b | |
| 23 | [ ]*[a-f0-9]+:[ ]*62 e3 ed 20 44 7a 7f 7b[ ]*vpclmulqdq ymm23,ymm18,YMMWORD PTR \[rdx\+0xfe0\],0x7b | |
| 24 | [ ]*[a-f0-9]+:[ ]*62 a3 cd 00 44 d1 ab[ ]*vpclmulqdq xmm18,xmm22,xmm17,0xab | |
| 25 | [ ]*[a-f0-9]+:[ ]*62 a3 cd 00 44 94 f0 34 12 00 00 7b[ ]*vpclmulqdq xmm18,xmm22,XMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b | |
| 26 | [ ]*[a-f0-9]+:[ ]*62 e3 cd 00 44 52 7f 7b[ ]*vpclmulqdq xmm18,xmm22,XMMWORD PTR \[rdx\+0x7f0\],0x7b | |
| 27 | [ ]*[a-f0-9]+:[ ]*62 23 b5 20 44 d7 ab[ ]*vpclmulqdq ymm26,ymm25,ymm23,0xab | |
| 28 | [ ]*[a-f0-9]+:[ ]*62 23 b5 20 44 94 f0 34 12 00 00 7b[ ]*vpclmulqdq ymm26,ymm25,YMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b | |
| 29 | [ ]*[a-f0-9]+:[ ]*62 63 b5 20 44 52 7f 7b[ ]*vpclmulqdq ymm26,ymm25,YMMWORD PTR \[rdx\+0xfe0\],0x7b | |
| 30 | [ ]*[a-f0-9]+:[ ]*62 a3 cd 00 44 d1 ab[ ]*vpclmulqdq xmm18,xmm22,xmm17,0xab | |
| 31 | [ ]*[a-f0-9]+:[ ]*62 a3 cd 00 44 94 f0 34 12 00 00 7b[ ]*vpclmulqdq xmm18,xmm22,XMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b | |
| 32 | [ ]*[a-f0-9]+:[ ]*62 e3 cd 00 44 52 7f 7b[ ]*vpclmulqdq xmm18,xmm22,XMMWORD PTR \[rdx\+0x7f0\],0x7b | |
| 33 | [ ]*[a-f0-9]+:[ ]*62 23 b5 20 44 d7 ab[ ]*vpclmulqdq ymm26,ymm25,ymm23,0xab | |
| 34 | [ ]*[a-f0-9]+:[ ]*62 23 b5 20 44 94 f0 34 12 00 00 7b[ ]*vpclmulqdq ymm26,ymm25,YMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b | |
| 35 | [ ]*[a-f0-9]+:[ ]*62 63 b5 20 44 52 7f 7b[ ]*vpclmulqdq ymm26,ymm25,YMMWORD PTR \[rdx\+0xfe0\],0x7b | |
| 36 | #pass |