Commit | Line | Data |
---|---|---|
8cfcb765 IT |
1 | #as: |
2 | #objdump: -dw | |
3 | #name: x86_64 AVX512VNNI insns | |
4 | #source: x86-64-avx512vnni.s | |
5 | ||
6 | .*: +file format .* | |
7 | ||
8 | ||
9 | Disassembly of section \.text: | |
10 | ||
11 | 0+ <_start>: | |
12 | [ ]*[a-f0-9]+:[ ]*62 a2 6d 40 52 d1[ ]*vpdpwssd %zmm17,%zmm18,%zmm18 | |
13 | [ ]*[a-f0-9]+:[ ]*62 a2 6d 45 52 d1[ ]*vpdpwssd %zmm17,%zmm18,%zmm18\{%k5\} | |
14 | [ ]*[a-f0-9]+:[ ]*62 a2 6d c5 52 d1[ ]*vpdpwssd %zmm17,%zmm18,%zmm18\{%k5\}\{z\} | |
15 | [ ]*[a-f0-9]+:[ ]*62 a2 6d 40 52 94 f0 23 01 00 00[ ]*vpdpwssd 0x123\(%rax,%r14,8\),%zmm18,%zmm18 | |
16 | [ ]*[a-f0-9]+:[ ]*62 e2 6d 40 52 52 7f[ ]*vpdpwssd 0x1fc0\(%rdx\),%zmm18,%zmm18 | |
17 | [ ]*[a-f0-9]+:[ ]*62 e2 6d 50 52 52 7f[ ]*vpdpwssd 0x1fc\(%rdx\)\{1to16\},%zmm18,%zmm18 | |
18 | [ ]*[a-f0-9]+:[ ]*62 a2 55 40 53 e9[ ]*vpdpwssds %zmm17,%zmm21,%zmm21 | |
19 | [ ]*[a-f0-9]+:[ ]*62 a2 55 44 53 e9[ ]*vpdpwssds %zmm17,%zmm21,%zmm21\{%k4\} | |
20 | [ ]*[a-f0-9]+:[ ]*62 a2 55 c4 53 e9[ ]*vpdpwssds %zmm17,%zmm21,%zmm21\{%k4\}\{z\} | |
21 | [ ]*[a-f0-9]+:[ ]*62 a2 55 40 53 ac f0 23 01 00 00[ ]*vpdpwssds 0x123\(%rax,%r14,8\),%zmm21,%zmm21 | |
22 | [ ]*[a-f0-9]+:[ ]*62 e2 55 40 53 6a 7f[ ]*vpdpwssds 0x1fc0\(%rdx\),%zmm21,%zmm21 | |
23 | [ ]*[a-f0-9]+:[ ]*62 e2 55 50 53 6a 7f[ ]*vpdpwssds 0x1fc\(%rdx\)\{1to16\},%zmm21,%zmm21 | |
24 | [ ]*[a-f0-9]+:[ ]*62 a2 55 40 50 fa[ ]*vpdpbusd %zmm18,%zmm21,%zmm23 | |
25 | [ ]*[a-f0-9]+:[ ]*62 a2 55 44 50 fa[ ]*vpdpbusd %zmm18,%zmm21,%zmm23\{%k4\} | |
26 | [ ]*[a-f0-9]+:[ ]*62 a2 55 c4 50 fa[ ]*vpdpbusd %zmm18,%zmm21,%zmm23\{%k4\}\{z\} | |
27 | [ ]*[a-f0-9]+:[ ]*62 a2 55 40 50 bc f0 23 01 00 00[ ]*vpdpbusd 0x123\(%rax,%r14,8\),%zmm21,%zmm23 | |
28 | [ ]*[a-f0-9]+:[ ]*62 e2 55 40 50 7a 7f[ ]*vpdpbusd 0x1fc0\(%rdx\),%zmm21,%zmm23 | |
29 | [ ]*[a-f0-9]+:[ ]*62 e2 55 50 50 7a 7f[ ]*vpdpbusd 0x1fc\(%rdx\)\{1to16\},%zmm21,%zmm23 | |
30 | [ ]*[a-f0-9]+:[ ]*62 02 3d 40 51 c1[ ]*vpdpbusds %zmm25,%zmm24,%zmm24 | |
31 | [ ]*[a-f0-9]+:[ ]*62 02 3d 47 51 c1[ ]*vpdpbusds %zmm25,%zmm24,%zmm24\{%k7\} | |
32 | [ ]*[a-f0-9]+:[ ]*62 02 3d c7 51 c1[ ]*vpdpbusds %zmm25,%zmm24,%zmm24\{%k7\}\{z\} | |
33 | [ ]*[a-f0-9]+:[ ]*62 22 3d 40 51 84 f0 23 01 00 00[ ]*vpdpbusds 0x123\(%rax,%r14,8\),%zmm24,%zmm24 | |
34 | [ ]*[a-f0-9]+:[ ]*62 62 3d 40 51 42 7f[ ]*vpdpbusds 0x1fc0\(%rdx\),%zmm24,%zmm24 | |
35 | [ ]*[a-f0-9]+:[ ]*62 62 3d 50 51 42 7f[ ]*vpdpbusds 0x1fc\(%rdx\)\{1to16\},%zmm24,%zmm24 | |
36 | [ ]*[a-f0-9]+:[ ]*62 22 25 40 52 e1[ ]*vpdpwssd %zmm17,%zmm27,%zmm28 | |
37 | [ ]*[a-f0-9]+:[ ]*62 22 25 47 52 e1[ ]*vpdpwssd %zmm17,%zmm27,%zmm28\{%k7\} | |
38 | [ ]*[a-f0-9]+:[ ]*62 22 25 c7 52 e1[ ]*vpdpwssd %zmm17,%zmm27,%zmm28\{%k7\}\{z\} | |
39 | [ ]*[a-f0-9]+:[ ]*62 22 25 40 52 a4 f0 34 12 00 00[ ]*vpdpwssd 0x1234\(%rax,%r14,8\),%zmm27,%zmm28 | |
40 | [ ]*[a-f0-9]+:[ ]*62 62 25 40 52 62 7f[ ]*vpdpwssd 0x1fc0\(%rdx\),%zmm27,%zmm28 | |
41 | [ ]*[a-f0-9]+:[ ]*62 62 25 50 52 62 7f[ ]*vpdpwssd 0x1fc\(%rdx\)\{1to16\},%zmm27,%zmm28 | |
42 | [ ]*[a-f0-9]+:[ ]*62 22 1d 40 53 e9[ ]*vpdpwssds %zmm17,%zmm28,%zmm29 | |
43 | [ ]*[a-f0-9]+:[ ]*62 22 1d 43 53 e9[ ]*vpdpwssds %zmm17,%zmm28,%zmm29\{%k3\} | |
44 | [ ]*[a-f0-9]+:[ ]*62 22 1d c3 53 e9[ ]*vpdpwssds %zmm17,%zmm28,%zmm29\{%k3\}\{z\} | |
45 | [ ]*[a-f0-9]+:[ ]*62 22 1d 40 53 ac f0 34 12 00 00[ ]*vpdpwssds 0x1234\(%rax,%r14,8\),%zmm28,%zmm29 | |
46 | [ ]*[a-f0-9]+:[ ]*62 62 1d 40 53 6a 7f[ ]*vpdpwssds 0x1fc0\(%rdx\),%zmm28,%zmm29 | |
47 | [ ]*[a-f0-9]+:[ ]*62 62 1d 50 53 6a 7f[ ]*vpdpwssds 0x1fc\(%rdx\)\{1to16\},%zmm28,%zmm29 | |
48 | [ ]*[a-f0-9]+:[ ]*62 22 3d 40 50 e5[ ]*vpdpbusd %zmm21,%zmm24,%zmm28 | |
49 | [ ]*[a-f0-9]+:[ ]*62 22 3d 46 50 e5[ ]*vpdpbusd %zmm21,%zmm24,%zmm28\{%k6\} | |
50 | [ ]*[a-f0-9]+:[ ]*62 22 3d c6 50 e5[ ]*vpdpbusd %zmm21,%zmm24,%zmm28\{%k6\}\{z\} | |
51 | [ ]*[a-f0-9]+:[ ]*62 22 3d 40 50 a4 f0 34 12 00 00[ ]*vpdpbusd 0x1234\(%rax,%r14,8\),%zmm24,%zmm28 | |
52 | [ ]*[a-f0-9]+:[ ]*62 62 3d 40 50 62 7f[ ]*vpdpbusd 0x1fc0\(%rdx\),%zmm24,%zmm28 | |
53 | [ ]*[a-f0-9]+:[ ]*62 62 3d 50 50 62 7f[ ]*vpdpbusd 0x1fc\(%rdx\)\{1to16\},%zmm24,%zmm28 | |
54 | [ ]*[a-f0-9]+:[ ]*62 a2 75 40 51 e4[ ]*vpdpbusds %zmm20,%zmm17,%zmm20 | |
55 | [ ]*[a-f0-9]+:[ ]*62 a2 75 42 51 e4[ ]*vpdpbusds %zmm20,%zmm17,%zmm20\{%k2\} | |
56 | [ ]*[a-f0-9]+:[ ]*62 a2 75 c2 51 e4[ ]*vpdpbusds %zmm20,%zmm17,%zmm20\{%k2\}\{z\} | |
57 | [ ]*[a-f0-9]+:[ ]*62 a2 75 40 51 a4 f0 34 12 00 00[ ]*vpdpbusds 0x1234\(%rax,%r14,8\),%zmm17,%zmm20 | |
58 | [ ]*[a-f0-9]+:[ ]*62 e2 75 40 51 62 7f[ ]*vpdpbusds 0x1fc0\(%rdx\),%zmm17,%zmm20 | |
59 | [ ]*[a-f0-9]+:[ ]*62 e2 75 50 51 62 7f[ ]*vpdpbusds 0x1fc\(%rdx\)\{1to16\},%zmm17,%zmm20 | |
60 | #pass |