projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 04e2a182 L |
1 | #as: -mevexlig=256 |
| 2 | #objdump: -dw | |
| 3 | #name: x86-64 EVEX non-LIG insns with -mevexlig=256 | |
| 4 | ||
| 5 | .*: +file format .* | |
| 6 | ||
| 7 | ||
| 8 | Disassembly of section .text: | |
| 9 | ||
| 10 | 0+ <_start>: | |
| 11 | +[a-f0-9]+: 62 f1 7d 08 7e 21 vmovd %xmm4,\(%rcx\) | |
| 12 | +[a-f0-9]+: 62 f1 7d 08 7e e1 vmovd %xmm4,%ecx | |
| 13 | +[a-f0-9]+: 62 f1 7d 08 6e 21 vmovd \(%rcx\),%xmm4 | |
| 14 | +[a-f0-9]+: 62 f1 7d 08 6e e1 vmovd %ecx,%xmm4 | |
| 15 | +[a-f0-9]+: 62 f1 fd 08 7e 21 vmovq %xmm4,\(%rcx\) | |
| 16 | +[a-f0-9]+: 62 f1 fd 08 7e e1 vmovq %xmm4,%rcx | |
| 17 | +[a-f0-9]+: 62 f1 fd 08 6e 21 vmovq \(%rcx\),%xmm4 | |
| 18 | +[a-f0-9]+: 62 f1 fd 08 6e e1 vmovq %rcx,%xmm4 | |
| 19 | +[a-f0-9]+: 62 f1 fe 08 7e f4 vmovq %xmm4,%xmm6 | |
| fd71a375 JB |
20 | +[a-f0-9]+: 62 f3 7d 08 17 c0 00 vextractps \$0x0,%xmm0,%eax |
| 21 | +[a-f0-9]+: 62 f3 7d 08 17 00 00 vextractps \$0x0,%xmm0,\(%rax\) | |
| 22 | +[a-f0-9]+: 62 f3 7d 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax | |
| 23 | +[a-f0-9]+: 62 f3 7d 08 14 00 00 vpextrb \$0x0,%xmm0,\(%rax\) | |
| 24 | +[a-f0-9]+: 62 f1 7d 08 c5 c0 00 vpextrw \$0x0,%xmm0,%eax | |
| 25 | +[a-f0-9]+: 62 f3 7d 08 15 c0 00 vpextrw \$0x0,%xmm0,%eax | |
| 26 | +[a-f0-9]+: 62 f3 7d 08 15 00 00 vpextrw \$0x0,%xmm0,\(%rax\) | |
| 27 | +[a-f0-9]+: 62 f3 7d 08 16 c0 00 vpextrd \$0x0,%xmm0,%eax | |
| 28 | +[a-f0-9]+: 62 f3 7d 08 16 00 00 vpextrd \$0x0,%xmm0,\(%rax\) | |
| 29 | +[a-f0-9]+: 62 f3 fd 08 16 c0 00 vpextrq \$0x0,%xmm0,%rax | |
| 30 | +[a-f0-9]+: 62 f3 fd 08 16 00 00 vpextrq \$0x0,%xmm0,\(%rax\) | |
| 31 | +[a-f0-9]+: 62 f3 7d 08 21 c0 00 vinsertps \$0x0,%xmm0,%xmm0,%xmm0 | |
| 32 | +[a-f0-9]+: 62 f3 7d 08 21 00 00 vinsertps \$0x0,\(%rax\),%xmm0,%xmm0 | |
| 33 | +[a-f0-9]+: 62 f3 7d 08 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0 | |
| 34 | +[a-f0-9]+: 62 f3 7d 08 20 00 00 vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0 | |
| 35 | +[a-f0-9]+: 62 f1 7d 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 | |
| 36 | +[a-f0-9]+: 62 f1 7d 08 c4 00 00 vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0 | |
| 37 | +[a-f0-9]+: 62 f3 7d 08 22 c0 00 vpinsrd \$0x0,%eax,%xmm0,%xmm0 | |
| 38 | +[a-f0-9]+: 62 f3 7d 08 22 00 00 vpinsrd \$0x0,\(%rax\),%xmm0,%xmm0 | |
| 39 | +[a-f0-9]+: 62 f3 fd 08 22 c0 00 vpinsrq \$0x0,%rax,%xmm0,%xmm0 | |
| 40 | +[a-f0-9]+: 62 f3 fd 08 22 00 00 vpinsrq \$0x0,\(%rax\),%xmm0,%xmm0 | |
| 04e2a182 | 41 | #pass |