[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-mem-intel.d

#source: x86-64-mem.s
#as: -J
#objdump: -dw -Mintel
#name: x86-64 mem (Intel mode)

.*: +file format .*

Disassembly of section .text:

0+ <_start>:
[ 	]*[a-f0-9]+:	0f 01 06             	sgdt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 0e             	sidt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 16             	lgdt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 1e             	lidt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 3e             	invlpg BYTE PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f c7 0e             	cmpxchg8b QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	48 0f c7 0e          	cmpxchg16b OWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f c7 36             	vmptrld QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	66 0f c7 36          	vmclear QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	f3 0f c7 36          	vmxon  QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f c7 3e             	vmptrst QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 06             	fxsave \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 0e             	fxrstor \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 16             	ldmxcsr DWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 1e             	stmxcsr DWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 3e             	clflush BYTE PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 06             	sgdt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 0e             	sidt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 16             	lgdt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 1e             	lidt   \[rsi\]
[ 	]*[a-f0-9]+:	0f 01 3e             	invlpg BYTE PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f c7 0e             	cmpxchg8b QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	48 0f c7 0e          	cmpxchg16b OWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f c7 36             	vmptrld QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	66 0f c7 36          	vmclear QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	f3 0f c7 36          	vmxon  QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f c7 3e             	vmptrst QWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 06             	fxsave \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 0e             	fxrstor \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 16             	ldmxcsr DWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 1e             	stmxcsr DWORD PTR \[rsi\]
[ 	]*[a-f0-9]+:	0f ae 3e             	clflush BYTE PTR \[rsi\]
#pass
Commit	Line	Data
d9a5e5e5 L	1	#source: x86-64-mem.s
	2	#as: -J
	3	#objdump: -dw -Mintel
	4	#name: x86-64 mem (Intel mode)
	5
	6	.: +file format .
	7
	8	Disassembly of section .text:
	9
	10	0+ <_start>:
	11	[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\]
	12	[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
	13	[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
	14	[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
bbedc832	15	[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\]
d9a5e5e5 L	16	[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
	17	[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
	18	[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
	19	[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\]
	20	[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\]
	21	[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\]
	22	[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
	23	[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
	24	[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
	25	[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
	26	[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
	27	[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\]
	28	[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
	29	[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
	30	[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
bbedc832	31	[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\]
d9a5e5e5 L	32	[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
	33	[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
	34	[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
	35	[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\]
	36	[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\]
	37	[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\]
	38	[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
	39	[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
	40	[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
	41	[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
	42	[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
	43	#pass