x86/Intel: improve diagnostics for ambiguous VCVT* operands
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-mem.d
CommitLineData
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1#as: -J
2#objdump: -dw
3#name: x86-64 mem
4
5.*: +file format .*
6
7Disassembly of section .text:
8
90+ <_start>:
10[ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\)
11[ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\)
12[ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\)
13[ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\)
14[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\)
15[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\)
16[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
17[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\)
18[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\)
19[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\)
20[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\)
21[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
22[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
23[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
24[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
25[ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
26[ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\)
27[ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\)
28[ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\)
29[ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\)
30[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\)
31[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\)
32[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
33[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\)
34[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\)
35[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\)
36[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\)
37[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
38[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
39[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
40[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
41[ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
42#pass
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