Commit | Line | Data |
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8507b6e7 MR |
1 | #objdump: -dr --prefix-addresses --show-raw-insn |
2 | #name: MIPS16 PC-relative operations 0 (n32) | |
b32465c9 | 3 | #as: -n32 |
8507b6e7 MR |
4 | #source: mips16-pcrel-0.s |
5 | ||
6 | .*: +file format .*mips.* | |
7 | ||
8 | Disassembly of section \.text: | |
9 | \.\.\. | |
10 | [0-9a-f]+ <[^>]*> 0a00 la v0,00010000 <foo> | |
11 | [0-9a-f]+ <[^>]*> 6500 nop | |
12 | [0-9a-f]+ <[^>]*> b200 lw v0,00010004 <foo\+0x4> | |
13 | [0-9a-f]+ <[^>]*> 6500 nop | |
14 | [0-9a-f]+ <[^>]*> 0aff la v0,00010404 <baz\+0x304> | |
15 | [0-9a-f]+ <[^>]*> 6500 nop | |
16 | [0-9a-f]+ <[^>]*> b2ff lw v0,00010408 <baz\+0x308> | |
17 | [0-9a-f]+ <[^>]*> 6500 nop | |
18 | [0-9a-f]+ <[^>]*> f400 0a00 la v0,00010410 <baz\+0x310> | |
19 | [0-9a-f]+ <[^>]*> f400 b200 lw v0,00010414 <baz\+0x314> | |
20 | [0-9a-f]+ <[^>]*> f7ff 0a1c la v0,00010014 <foo\+0x14> | |
21 | [0-9a-f]+ <[^>]*> f7ff b21c lw v0,00010018 <foo\+0x18> | |
22 | [0-9a-f]+ <[^>]*> f7ef 0a1f la v0,0001801f <baz\+0x7f1f> | |
23 | [0-9a-f]+ <[^>]*> f7ef b21f lw v0,00018023 <baz\+0x7f23> | |
24 | [0-9a-f]+ <[^>]*> f010 0a00 la v0,00008028 <bar\+0x8028> | |
25 | [0-9a-f]+ <[^>]*> f010 b200 lw v0,0000802c <bar\+0x802c> | |
26 | [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 | |
12add40e | 27 | [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff |
8507b6e7 MR |
28 | [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 |
29 | [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 | |
12add40e | 30 | [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff |
8507b6e7 | 31 | [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 |
12add40e | 32 | [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*\+0x7fff |
8507b6e7 MR |
33 | [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 |
34 | [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\) | |
12add40e | 35 | [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*\+0x7fff |
8507b6e7 | 36 | [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 |
12add40e | 37 | [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002 |
8507b6e7 MR |
38 | [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 |
39 | [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 | |
12add40e | 40 | [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002 |
8507b6e7 | 41 | [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 |
12add40e | 42 | [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.*-0x8002 |
8507b6e7 MR |
43 | [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 |
44 | [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\) | |
12add40e | 45 | [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.*-0x8002 |
8507b6e7 MR |
46 | [0-9a-f]+ <[^>]*> 6500 nop |
47 | \.\.\. | |
48 | \.\.\. |