projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| b32465c9 MR |
1 | #objdump: -dr --prefix-addresses --show-raw-insn |
| 2 | #name: MIPS16 PC-relative relocation with addend 8 (n64, sym32) | |
| 3 | #as: -64 -msym32 | |
| 4 | #source: mips16-pcrel-addend-8.s | |
| 5 | ||
| 6 | .*: +file format .*mips.* | |
| 7 | ||
| 8 | Disassembly of section \.text: | |
| 9 | \.\.\. | |
| 10 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 11 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar | |
| 12 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 13 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 14 | [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 | |
| 15 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar | |
| 16 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 17 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 18 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 19 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar | |
| 20 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 21 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 22 | [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\) | |
| 23 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar | |
| 24 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 25 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\* | |
| 26 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 27 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468 | |
| 28 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 29 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 30 | [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 | |
| 31 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468 | |
| 32 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 33 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 34 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 35 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468 | |
| 36 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 37 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 38 | [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\) | |
| 39 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468 | |
| 40 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 41 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468 | |
| 42 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 43 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678 | |
| 44 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 45 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 46 | [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 | |
| 47 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678 | |
| 48 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 49 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 50 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 51 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x12345678 | |
| 52 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 53 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 54 | [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\) | |
| 55 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x12345678 | |
| 56 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 57 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x12345678 | |
| 58 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 59 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0 | |
| 60 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 61 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 62 | [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 | |
| 63 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0 | |
| 64 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 65 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 66 | [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0 | |
| 67 | [ ]*[0-9a-f]+: R_MIPS16_HI16 bar\+0x2468ace0 | |
| 68 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 69 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 70 | [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\) | |
| 71 | [ ]*[0-9a-f]+: R_MIPS16_LO16 bar\+0x2468ace0 | |
| 72 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 73 | [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x2468ace0 | |
| 74 | [0-9a-f]+ <[^>]*> 6500 nop | |
| 75 | \.\.\. |