[MIPS] Add Loongson 3A1000 proccessor support.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / mips / ulw-reloc.d
CommitLineData
f2ae14a1
RS
1#as: -32 -EB
2#objdump: -dr --prefix-addresses -Mgpr-names=numeric
3#name: ULW with relocation operators
4
5.*file format.*
6
7Disassembly of section \.text:
8[0-9a-f]+ <[^>]*> lwl \$1,0\(\$4\)
9[0-9a-f]+ <[^>]*> lwr \$1,3\(\$4\)
10[0-9a-f]+ <[^>]*> move \$4,\$1
11[0-9a-f]+ <[^>]*> lwl \$1,2044\(\$4\)
12[0-9a-f]+ <[^>]*> lwr \$1,2047\(\$4\)
13[0-9a-f]+ <[^>]*> move \$4,\$1
14[0-9a-f]+ <[^>]*> lwl \$1,2045\(\$4\)
15[0-9a-f]+ <[^>]*> lwr \$1,2048\(\$4\)
16[0-9a-f]+ <[^>]*> move \$4,\$1
17[0-9a-f]+ <[^>]*> lwl \$1,2047\(\$4\)
18[0-9a-f]+ <[^>]*> lwr \$1,2050\(\$4\)
19[0-9a-f]+ <[^>]*> move \$4,\$1
20[0-9a-f]+ <[^>]*> lwl \$1,2048\(\$4\)
21[0-9a-f]+ <[^>]*> lwr \$1,2051\(\$4\)
22[0-9a-f]+ <[^>]*> move \$4,\$1
23[0-9a-f]+ <[^>]*> lwl \$1,32764\(\$4\)
24[0-9a-f]+ <[^>]*> lwr \$1,32767\(\$4\)
25[0-9a-f]+ <[^>]*> move \$4,\$1
26[0-9a-f]+ <[^>]*> addiu \$1,\$4,32765
27[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
28[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
29[0-9a-f]+ <[^>]*> addiu \$1,\$4,32767
30[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
31[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
32[0-9a-f]+ <[^>]*> li \$1,0x8000
33[0-9a-f]+ <[^>]*> addu \$1,\$1,\$4
34[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
35[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
36#--------------------------------------------------------------------
37[0-9a-f]+ <[^>]*> lwl \$4,0\(\$5\)
38[0-9a-f]+ <[^>]*> lwr \$4,3\(\$5\)
39[0-9a-f]+ <[^>]*> lwl \$4,2044\(\$5\)
40[0-9a-f]+ <[^>]*> lwr \$4,2047\(\$5\)
41[0-9a-f]+ <[^>]*> lwl \$4,2045\(\$5\)
42[0-9a-f]+ <[^>]*> lwr \$4,2048\(\$5\)
43[0-9a-f]+ <[^>]*> lwl \$4,2047\(\$5\)
44[0-9a-f]+ <[^>]*> lwr \$4,2050\(\$5\)
45[0-9a-f]+ <[^>]*> lwl \$4,2048\(\$5\)
46[0-9a-f]+ <[^>]*> lwr \$4,2051\(\$5\)
47[0-9a-f]+ <[^>]*> lwl \$4,32764\(\$5\)
48[0-9a-f]+ <[^>]*> lwr \$4,32767\(\$5\)
49[0-9a-f]+ <[^>]*> addiu \$1,\$5,32765
50[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
51[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
52[0-9a-f]+ <[^>]*> addiu \$1,\$5,32767
53[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
54[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
55[0-9a-f]+ <[^>]*> li \$1,0x8000
56[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5
57[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
58[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
59# Would be more efficient to apply the offset to the base register.
60[0-9a-f]+ <[^>]*> lui \$1,0x3
61[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffc
62[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5
63[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
64[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
65# This one must use LUI/ORI
66[0-9a-f]+ <[^>]*> lui \$1,0x3
67[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffd
68[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5
69[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
70[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
71# This one must use LUI/ORI
72[0-9a-f]+ <[^>]*> lui \$1,0x3
73[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7fff
74[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5
75[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
76[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
77# Would be more efficient to apply the offset to the base register.
78[0-9a-f]+ <[^>]*> lui \$1,0x3
79[0-9a-f]+ <[^>]*> ori \$1,\$1,0x8000
80[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5
81[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
82[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
83#--------------------------------------------------------------------
84[0-9a-f]+ <[^>]*> li \$1,0
85[ ]*[0-9a-f]+: R_MIPS_LO16 foo
86[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
87[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
88[0-9a-f]+ <[^>]*> li \$1,0
89[ ]*[0-9a-f]+: R_MIPS_HI16 foo
90[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
91[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
92[0-9a-f]+ <[^>]*> lwl \$4,0\(\$0\)
93[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo
94[0-9a-f]+ <[^>]*> lwr \$4,3\(\$0\)
95[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo
96[0-9a-f]+ <[^>]*> li \$1,-30875
97[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
98[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
99[0-9a-f]+ <[^>]*> li \$1,4661
100[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
101[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
102#--------------------------------------------------------------------
103[0-9a-f]+ <[^>]*> addiu \$1,\$4,0
104[ ]*[0-9a-f]+: R_MIPS_LO16 foo
105[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
106[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
107[0-9a-f]+ <[^>]*> addiu \$1,\$4,0
108[ ]*[0-9a-f]+: R_MIPS_HI16 foo
109[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
110[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
111[0-9a-f]+ <[^>]*> lwl \$1,0\(\$4\)
112[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo
113[0-9a-f]+ <[^>]*> lwr \$1,3\(\$4\)
114[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo
115[0-9a-f]+ <[^>]*> move \$4,\$1
116#--------------------------------------------------------------------
117[0-9a-f]+ <[^>]*> addiu \$1,\$5,0
118[ ]*[0-9a-f]+: R_MIPS_LO16 foo
119[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
120[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
121[0-9a-f]+ <[^>]*> addiu \$1,\$5,0
122[ ]*[0-9a-f]+: R_MIPS_HI16 foo
123[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
124[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
125[0-9a-f]+ <[^>]*> lwl \$4,0\(\$5\)
126[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo
127[0-9a-f]+ <[^>]*> lwr \$4,3\(\$5\)
128[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo
129[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875
130[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
131[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
132[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661
133[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
134[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
135[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875
136[ ]*[0-9a-f]+: R_MIPS_LO16 foo
137[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
138[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
139[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661
140[ ]*[0-9a-f]+: R_MIPS_HI16 foo
141[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\)
142[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\)
143#pass
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