Commit | Line | Data |
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39bec121 TW |
1 | ;; opcodes tests\r |
2 | .text\r | |
3 | .mmregs\r | |
4 | .global X, Y, Z\r | |
5 | .global _opcodes, _opcodes_end\r | |
6 | .label _opcodes_load\r | |
7 | _opcodes: \r | |
8 | abdst *ar3+, *ar4+ \r | |
9 | abs a \r | |
10 | abs a,b \r | |
11 | add *ar0+, a ; Smem, src\r | |
12 | add *ar1+, ts, a ; Smem, TS, src \r | |
13 | add *ar2+, 16, a ; Smem, 16, src [,dst] \r | |
14 | add *ar3+, a, b ; Smem [,SHIFT], src [,dst] (-16<=SHIFT<=15)\r | |
15 | \r | |
16 | add *ar4+, 1, a ; Xmem, SHFT, src (0<=SHFT<=15) \r | |
17 | add *ar3+, *ar4+, a ; Xmem, Ymem, dst\r | |
18 | add #-32768, a ; #lk [,SHFT], src [,dst] (-32768<=lk<=32767)\r | |
19 | \r | |
20 | add #0,16,a,b ; #lk, 16, src, [,dst]\r | |
21 | \r | |
22 | add a,-16,b ; src [,SHIFT][,dst]\r | |
23 | add a,asm,b ; src, ASM [,dst] \r | |
24 | addc *ar0+,a\r | |
25 | addm #1,*ar1+ \r | |
26 | \r | |
27 | adds *ar2+,a\r | |
28 | and *ar3+,a ; Smem,src\r | |
29 | and #1,1,a,b ; #lk[,SHFT],src[,dst]\r | |
30 | \r | |
31 | and #1,#16,a,b ; #lk,16,src[,dst]\r | |
32 | \r | |
33 | and a ; src[,SHIFT][,dst]\r | |
34 | andm #1,*ar0+ \r | |
35 | \r | |
36 | b _opcodes_end \r | |
37 | \r | |
38 | bd #_opcodes_end\r | |
39 | nop\r | |
40 | nop\r | |
41 | \r | |
42 | bacc a \r | |
43 | baccd b\r | |
44 | nop\r | |
45 | nop\r | |
46 | \r | |
47 | banz _opcodes_end,*ar1+ \r | |
48 | \r | |
49 | banzd _opcodes_end,*ar2+ \r | |
50 | nop\r | |
51 | nop\r | |
52 | \r | |
53 | bc _opcodes_end, AEQ,AOV \r | |
54 | \r | |
55 | bcd _opcodes_end, BIO,C,TC \r | |
56 | nop\r | |
57 | nop\r | |
58 | \r | |
59 | bit *ar3+,1 \r | |
60 | bitf *ar4+,#-1 \r | |
61 | \r | |
62 | bitt *ar5+ \r | |
63 | cala a\r | |
64 | calad b\r | |
65 | nop\r | |
66 | nop\r | |
67 | \r | |
68 | call _opcodes_end\r | |
69 | \r | |
70 | calld _opcodes_end \r | |
71 | nop\r | |
72 | nop\r | |
73 | \r | |
74 | cc _opcodes_end, tc \r | |
75 | \r | |
76 | ccd _opcodes_end, aeq \r | |
77 | nop\r | |
78 | nop\r | |
79 | \r | |
80 | cmpl b,a\r | |
81 | cmpm *ar0+,#1 \r | |
82 | \r | |
83 | cmpr 1,ar1\r | |
84 | cmps a,*ar2+ \r | |
85 | dadd *ar3-, a, b\r | |
86 | dadst *ar4-, a\r | |
87 | delay *ar5+ \r | |
88 | dld *ar6-, a\r | |
89 | drsub *ar7-, b\r | |
90 | dsadt *ar0-, a\r | |
91 | dst a, *ar1- \r | |
92 | dsub *ar2-, b\r | |
93 | dsubt *ar3-, a\r | |
94 | exp a\r | |
95 | firs *ar3+,*ar4+,_opcodes_end \r | |
96 | \r | |
97 | frame -128 \r | |
98 | idle 2 \r | |
99 | intr 15 \r | |
100 | ld *ar0+,a ; Smem,dst\r | |
101 | ld *ar1+,ts,a ; Smem,TS,dst\r | |
102 | ld *ar2+,16,a ; Smem,16,dst\r | |
103 | ld *ar3+,1,a ; Smem[,SHIFT],dst\r | |
104 | \r | |
105 | ld *ar4+,1,a ; Xmem,SHFT,dst\r | |
106 | ld #1,b ; #K,dst\r | |
107 | ld #32767,1,a ; #lk,[,SHFT],dst\r | |
108 | \r | |
109 | ld #32767,16,a ; #lk,16,dst\r | |
110 | \r | |
111 | ld a,asm,b ; src,ASM[,dst]\r | |
112 | ld a,1,b ; src[,SHIFT],dst\r | |
113 | ld *ar0+,t \r | |
114 | ld *ar1+,dp \r | |
115 | ld #_opcodes_end,dp ; FIXME try to print label on disasm\r | |
116 | ; note: TI assembler doesn't shift \r | |
117 | ; the address encoding. \r | |
118 | ld #15,asm \r | |
119 | ld #7,arp \r | |
120 | ld *ar2+,asm \r | |
121 | ldm ar3,a \r | |
de194d85 | 122 | ld *ar2+,a || mac *ar3+,b ; single-line parallel\r |
39bec121 TW |
123 | ld *ar4+,b || macr *ar5+,a ; with optional DST_ specified\r |
124 | ld *ar2+,a ; double-line parallel\r | |
125 | || mas *ar3+ \r | |
126 | ld *ar4+,b ; parallel spans\r | |
127 | ; inserted line\r | |
128 | || masr *ar5+\r | |
129 | ldr *ar6+,a\r | |
130 | ldu *ar7+,a\r | |
131 | lms *ar3+,*ar4+\r | |
132 | ltd *ar0+ \r | |
133 | mac *ar1+,a\r | |
134 | macr *ar2+,a\r | |
135 | mac *ar2+,*ar3+,a,b\r | |
136 | macr *ar4+,*ar5+,a,b\r | |
137 | mac #1,a,b\r | |
138 | \r | |
139 | mac *ar0+,#1,a\r | |
140 | \r | |
141 | maca *ar1+ ; *ar6+,b (valid)\r | |
142 | maca t,a,b \r | |
143 | macd *ar2+,_opcodes_end,a \r | |
144 | \r | |
145 | macp *ar3+,_opcodes_end,a \r | |
146 | \r | |
147 | macsu *ar4+,*ar5+,a\r | |
148 | mar *ar6+\r | |
149 | mas *ar7+,a\r | |
150 | masr *ar0+,a\r | |
151 | mas *ar3+,*ar4+,a,b\r | |
152 | masr *ar2+,*ar5+,a,b\r | |
153 | masa *ar6+ ; *ar6+,b (valid)\r | |
154 | masa t,a,b \r | |
155 | masar t,a \r | |
156 | max a\r | |
157 | min b\r | |
158 | mpy *ar7+,a\r | |
159 | mpy *ar3+,*ar4+,b\r | |
160 | mpy *ar0,#1,a\r | |
161 | \r | |
162 | mpy #1,a \r | |
163 | \r | |
164 | mpya *ar0+\r | |
165 | mpya b\r | |
166 | mpyu *ar1+,b\r | |
167 | mvdd *ar2+,*ar3+\r | |
168 | mvdk *ar4+,X\r | |
169 | \r | |
170 | mvdm X,ar5\r | |
171 | \r | |
172 | mvdp *ar6+,_opcodes_end \r | |
173 | \r | |
174 | mvkd X,*ar7+\r | |
175 | \r | |
176 | mvmd ar0,X\r | |
177 | \r | |
178 | mvmm ar1,ar2\r | |
179 | mvpd _opcodes_end,*ar3+ \r | |
180 | \r | |
181 | neg a,b \r | |
182 | \r | |
183 | nop \r | |
184 | norm a\r | |
185 | or *ar0+,b\r | |
186 | or #(3+4),b \r | |
187 | \r | |
188 | or #1,16,b \r | |
189 | \r | |
190 | or b\r | |
191 | orm #1,*ar1+\r | |
192 | \r | |
193 | poly *ar2+\r | |
194 | popd *ar3+\r | |
195 | popm ar4 \r | |
196 | portr 0,*ar5+ \r | |
197 | \r | |
198 | portw *ar6+,0 \r | |
199 | \r | |
200 | pshd *ar7+\r | |
201 | pshm ar0 \r | |
202 | rc ANEQ \r | |
203 | rcd AGT \r | |
204 | reada *ar1+\r | |
205 | reset \r | |
206 | ret \r | |
207 | retd \r | |
208 | nop\r | |
209 | nop\r | |
210 | rete\r | |
211 | reted \r | |
212 | nop\r | |
213 | nop\r | |
214 | retf\r | |
215 | retfd \r | |
216 | rol a\r | |
217 | roltc a\r | |
218 | ror b\r | |
219 | rpt *ar0+ \r | |
220 | nop\r | |
221 | rpt #32 \r | |
222 | nop\r | |
223 | rpt #65535 \r | |
224 | nop\r | |
225 | rptb _opcodes_end-1 \r | |
226 | nop\r | |
227 | rptbd _opcodes_end-1 \r | |
228 | nop\r | |
229 | nop\r | |
230 | rptz a,#32767 \r | |
231 | nop\r | |
232 | rsbx 1,15 \r | |
233 | saccd a,*ar3+,ALT \r | |
234 | sat a\r | |
235 | sfta a,15,b\r | |
236 | sftc a\r | |
237 | sftl a,15\r | |
238 | sqdst *ar2+,*ar3+\r | |
239 | squr *ar4+,b\r | |
240 | squr a,a \r | |
241 | squra *ar5+,a\r | |
242 | squrs *ar6+,a\r | |
243 | srccd *ar2+,ALEQ \r | |
244 | ssbx 1,15 \r | |
245 | st t,*ar0+ \r | |
246 | st trn,*ar1+ \r | |
247 | st #32767,*ar2+\r | |
248 | \r | |
249 | sth a,*ar3+ \r | |
250 | sth a,asm,*ar4+ \r | |
251 | sth a,15,*ar5+ \r | |
252 | sth a,-16,*ar6+ \r | |
253 | \r | |
254 | stl a,*ar7+ \r | |
255 | stl a,asm,*ar0+ \r | |
256 | stl a,15,*ar1+ \r | |
257 | stl a,15,*ar2+ \r | |
258 | \r | |
259 | stlm a,ar3\r | |
260 | stm #32767,ar4\r | |
261 | \r | |
262 | st a,*ar5+ \r | |
263 | || add *ar4+,b \r | |
264 | st a,*ar3+\r | |
265 | || ld *ar2+,b \r | |
266 | st a,*ar3+\r | |
267 | || ld *ar4+,t \r | |
268 | st a,*ar5+\r | |
269 | || mac *ar2+,b \r | |
270 | st a,*ar3+\r | |
271 | || masr *ar4+,b \r | |
272 | st a,*ar3+\r | |
273 | || mpy *ar4+,b \r | |
274 | st a,*ar3+\r | |
275 | || sub *ar4+,b \r | |
276 | strcd *ar5+,BEQ \r | |
277 | sub *ar0+,a \r | |
278 | sub *ar1+,ts,a \r | |
279 | sub *ar2+,16,a,b\r | |
280 | sub *ar3+,a,b \r | |
281 | \r | |
282 | sub *ar4+,15,a \r | |
283 | sub *ar5+,*ar4+,b \r | |
284 | sub #1,15,a,b\r | |
285 | \r | |
286 | sub #1,16,a,b \r | |
287 | \r | |
288 | sub a,-16,b\r | |
289 | sub a,asm,b \r | |
290 | subb *ar0+,a\r | |
291 | subc *ar1+,a\r | |
292 | subs *ar2+,a\r | |
293 | trap 15 \r | |
294 | writa *ar3+ \r | |
295 | xc 1,AOV \r | |
296 | xor *ar4+,a\r | |
297 | xor #1,a \r | |
298 | \r | |
299 | xor #1,16,a \r | |
300 | \r | |
301 | xor a,1,b\r | |
302 | xorm #1,*ar5+ \r | |
303 | _opcodes_end: \r | |
304 | .data\r | |
305 | X: .word 0 \r | |
306 | Y: .word 1 \r | |
307 | * .word Z\r | |
308 | .end \r | |
309 | \r |