aarch64: override default elf .set handling in gas
[deliverable/binutils-gdb.git] / gas / testsuite / gas / xgate / all_insns.d
CommitLineData
f6c1a2d5
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1#objdump: -d --prefix-addresses --reloc
2#as:
3#name: all_insns
4
5# Test handling of basic instructions.
6
7.*: +file format elf32\-xgate
8
9Disassembly of section .text:
100+0000 <L0> adc R1, R2, R3
848e5d08 110+0002 <L1> bcc \*230 Abs\* 0x000000e8 <END_CODE>
f6c1a2d5
NC
120+0004 <L2> add R4, R5, R6
130+0006 <L3> addl R7, #0xe1
140+0008 <L3\+0x2> addh R7, #0x00 Abs\* 0x000000e1 <L103\+0x1>
150+000a <L4> addh R1, #0xff
848e5d08 160+000c <L5> addl R2, #0xff Abs\* 0x0000ffff <END_CODE\+0xff17>
f6c1a2d5 170+000e <L6> addl R4, #0x44
848e5d08 180+0010 <L6\+0x2> addh R4, #0x1f Abs\* 0x00001f44 <END_CODE\+0x1e5c>
f6c1a2d5
NC
190+0012 <L7> and R3, R4, R5
200+0014 <L8> andl R1, #0x04
848e5d08
SK
210+0016 <L8\+0x2> andh R1, #0x80 Abs\* 0x00008004 <END_CODE\+0x7f1c>
220+0018 <L9> addl R5, #0xe8
f6c1a2d5 23 18: R_XGATE_IMM8_LO .text
848e5d08 240+001a <L9\+0x2> addh R5, #0x00 Abs\* 0x000000e8 <END_CODE>
f6c1a2d5 25 1a: R_XGATE_IMM8_HI .text
848e5d08 260+001c <L10> andl R7, #0xe8
f6c1a2d5 27 1c: R_XGATE_IMM8_LO .text
848e5d08 280+001e <L10\+0x2> andh R7, #0x00 Abs\* 0x000000e8 <END_CODE>
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29 1e: R_XGATE_IMM8_HI .text
300+0020 <L11> andl R4, #0x01
848e5d08 310+0022 <L11\+0x2> andh R4, #0xff Abs\* 0x0000ff01 <END_CODE\+0xfe19>
f6c1a2d5 320+0024 <L12> andl R3, #0x01
848e5d08 330+0026 <L13> andh R6, #0xff Abs\* 0x0000ff01 <END_CODE\+0xfe19>
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340+0028 <L14> asr R0, #0x03
350+002a <L15> asr R1, R2
848e5d08
SK
360+002c <L16> bcc \*188 Abs\* 0x000000e8 <END_CODE>
370+002e <L17> bcs \*186 Abs\* 0x000000e8 <END_CODE>
380+0030 <L18> beq \*184 Abs\* 0x000000e8 <END_CODE>
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390+0032 <L19> bfext R3, R4, R5
400+0034 <L20> bffo R6, R7
410+0036 <L21> bfins R0, R1, R2
420+0038 <L22> bfinsi R3, R4, R5
430+003a <L23> bfinsx R6, R7, R0
848e5d08
SK
440+003c <L24> bge \*172 Abs\* 0x000000e8 <END_CODE>
450+003e <L25> bgt \*170 Abs\* 0x000000e8 <END_CODE>
460+0040 <L26> bhi \*168 Abs\* 0x000000e8 <END_CODE>
470+0042 <L27> bcc \*166 Abs\* 0x000000e8 <END_CODE>
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480+0044 <L28> bith R1, #0x20
490+0046 <L29> bitl R2, #0x00
848e5d08
SK
500+0048 <L30> ble \*160 Abs\* 0x000000e8 <END_CODE>
510+004a <L31> bcs \*158 Abs\* 0x000000e8 <END_CODE>
520+004c <L32> bls \*156 Abs\* 0x000000e8 <END_CODE>
530+004e <L33> blt \*154 Abs\* 0x000000e8 <END_CODE>
540+0050 <L34> bmi \*152 Abs\* 0x000000e8 <END_CODE>
550+0052 <L35> bne \*150 Abs\* 0x000000e8 <END_CODE>
560+0054 <L36> bpl \*148 Abs\* 0x000000e8 <END_CODE>
570+0056 <L37> bra \*146 Abs\* 0x000000e8 <END_CODE>
f6c1a2d5 58 ...
848e5d08
SK
590+005a <L39> bvc \*142 Abs\* 0x000000e8 <END_CODE>
600+005c <L40> bvs \*140 Abs\* 0x000000e8 <END_CODE>
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NC
610+005e <L41> sub R0, R1, R2
620+0060 <L42> cmpl R3, #0xff
630+0062 <L43> xnor R4, R0, R5
640+0064 <L44> sbc R0, R6, R7
848e5d08 650+0066 <L45> cmpl R1, #0xff Abs\* 0x0000ffdd <END_CODE\+0xfef5>
f6c1a2d5 660+0068 <L45\+0x2> cpch R1, #0xff
848e5d08 670+006a <L46> cpch R2, #0xff Abs\* 0x0000ffff <END_CODE\+0xff17>
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680+006c <L47> csem #0x4
690+006e <L48> csem R5
700+0070 <L49> csl R6, #0x0b
710+0072 <L50> csl R7, R0
720+0074 <L51> csr R1, #0x02
730+0076 <L52> csr R2, R3
740+0078 <L53> jal R4
750+007a <L54> ldb R5, \(R6, #0x14\)
760+007c <L55> ldb R7, \(R0, R1\+\)
770+007e <L56> ldb R7, \(R0, \-R1\)
780+0080 <L57> ldb R0, \(R0, R0\)
790+0082 <L58> ldh R1, #0xff
848e5d08
SK
800+0084 <L59> ldl R2, #0xff Abs\* 0x0000ffff <END_CODE\+0xff17>
810+0086 <L60> ldl R3, #0xe8
f6c1a2d5 82 86: R_XGATE_IMM8_LO .text
848e5d08 830+0088 <L60\+0x2> ldh R3, #0x00 Abs\* 0x000000e8 <END_CODE>
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84 88: R_XGATE_IMM8_HI .text
850+008a <L61> ldw R4, \(R5, #0x14\)
860+008c <L62> ldw R5, \(R6, R7\+\)
870+008e <L63> ldw R5, \(R6, \-R7\)
880+0090 <L64> ldw R1, \(R2, R4\)
890+0092 <L65> lsl R1, #0x04
900+0094 <L66> lsl R2, R3
910+0096 <L67> lsr R4, #0x05
920+0098 <L68> lsr R5, R6
930+009a <L69> or R6, R0, R7
940+009c <L70> sub R1, R0, R2
950+009e <L71> nop
960+00a0 <L72> or R1, R2, R3
970+00a2 <L73> orh R4, #0xff
980+00a4 <L74> orl R5, #0xff
990+00a6 <L75> par R6
1000+00a8 <L76> rol R7, #0x06
1010+00aa <L77> rol R1, R2
1020+00ac <L78> ror R3, #0x05
1030+00ae <L79> ror R4, R5
1040+00b0 <L80> rts
1050+00b2 <L81> sbc R1, R2, R3
1060+00b4 <L82> ssem #0x4
1070+00b6 <L83> ssem R1
1080+00b8 <L84> sex R2
1090+00ba <L85> sif
1100+00bc <L86> sif R4
1110+00be <L87> stb R5, \(R6, #0x5\)
1120+00c0 <L88> stb R0, \(R0, R0\+\)
1130+00c2 <L89> stb R0, \(R0, \-R0\)
1140+00c4 <L90> stb R2, \(R0, R0\)
1150+00c6 <L91> stw R1, \(R2, #0x10\)
1160+00c8 <L92> stw R1, \(R2, R3\+\)
1170+00ca <L93> stw R1, \(R2, \-R3\)
1180+00cc <L94> stw R2, \(R3, R4\)
1190+00ce <L95> sub R3, R4, R6
1200+00d0 <L96> subl R4, #0xff
848e5d08 1210+00d2 <L96\+0x2> subh R4, #0xff Abs\* 0x0000ffff <END_CODE\+0xff17>
f6c1a2d5 1220+00d4 <L97> subh R5, #0xff
848e5d08 1230+00d6 <L98> subl R6, #0xff Abs\* 0x0000ffff <END_CODE\+0xff17>
f6c1a2d5
NC
1240+00d8 <L99> tfr R7, PC
1250+00da <L100> tfr R7, CCR
1260+00dc <L101> tfr CCR, R7
1270+00de <L102> sub R0, R1, R0
1280+00e0 <L103> xnor R1, R2, R3
1290+00e2 <L104> xnorh R4, #0xff
1300+00e4 <L105> xnorl R5, #0xff
848e5d08 1310+00e6 <L106> xnor R3, R0, R3
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