* breakpoint.c (print_it_typical) <bp_access_watchpoint> [UI_OUT]:
[deliverable/binutils-gdb.git] / gdb / a29k-tdep.c
CommitLineData
c906108c 1/* Target-machine dependent code for the AMD 29000
b6ba6518
KB
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
3 2001
c906108c
SS
4 Free Software Foundation, Inc.
5 Contributed by Cygnus Support. Written by Jim Kingdon.
6
c5aa993b 7 This file is part of GDB.
c906108c 8
c5aa993b
JM
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
c906108c 13
c5aa993b
JM
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
c906108c 18
c5aa993b
JM
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
c906108c
SS
23
24#include "defs.h"
25#include "gdbcore.h"
26#include "frame.h"
27#include "value.h"
28#include "symtab.h"
29#include "inferior.h"
30#include "gdbcmd.h"
4e052eda 31#include "regcache.h"
c906108c
SS
32
33/* If all these bits in an instruction word are zero, it is a "tag word"
34 which precedes a function entry point and gives stack traceback info.
35 This used to be defined as 0xff000000, but that treated 0x00000deb as
36 a tag word, while it is really used as a breakpoint. */
37#define TAGWORD_ZERO_MASK 0xff00f800
38
39extern CORE_ADDR text_start; /* FIXME, kludge... */
40
41/* The user-settable top of the register stack in virtual memory. We
42 won't attempt to access any stored registers above this address, if set
43 nonzero. */
44
45static CORE_ADDR rstack_high_address = UINT_MAX;
46
47
48/* Should call_function allocate stack space for a struct return? */
49/* On the a29k objects over 16 words require the caller to allocate space. */
50int
fba45db2 51a29k_use_struct_convention (int gcc_p, struct type *type)
c906108c
SS
52{
53 return (TYPE_LENGTH (type) > 16 * 4);
54}
55
56
57/* Structure to hold cached info about function prologues. */
58
59struct prologue_info
60{
61 CORE_ADDR pc; /* First addr after fn prologue */
62 unsigned rsize, msize; /* register stack frame size, mem stack ditto */
c5aa993b
JM
63 unsigned mfp_used:1; /* memory frame pointer used */
64 unsigned rsize_valid:1; /* Validity bits for the above */
65 unsigned msize_valid:1;
66 unsigned mfp_valid:1;
c906108c
SS
67};
68
69/* Examine the prologue of a function which starts at PC. Return
70 the first addess past the prologue. If MSIZE is non-NULL, then
71 set *MSIZE to the memory stack frame size. If RSIZE is non-NULL,
72 then set *RSIZE to the register stack frame size (not including
73 incoming arguments and the return address & frame pointer stored
74 with them). If no prologue is found, *RSIZE is set to zero.
75 If no prologue is found, or a prologue which doesn't involve
76 allocating a memory stack frame, then set *MSIZE to zero.
77
78 Note that both msize and rsize are in bytes. This is not consistent
79 with the _User's Manual_ with respect to rsize, but it is much more
80 convenient.
81
82 If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory
83 frame pointer is being used. */
84
85CORE_ADDR
fba45db2 86examine_prologue (CORE_ADDR pc, unsigned *rsize, unsigned *msize, int *mfp_used)
c906108c
SS
87{
88 long insn;
89 CORE_ADDR p = pc;
90 struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc);
91 struct prologue_info *mi = 0;
92
93 if (msymbol != NULL)
c5aa993b 94 mi = (struct prologue_info *) msymbol->info;
c906108c
SS
95
96 if (mi != 0)
97 {
98 int valid = 1;
99 if (rsize != NULL)
100 {
101 *rsize = mi->rsize;
102 valid &= mi->rsize_valid;
103 }
104 if (msize != NULL)
105 {
106 *msize = mi->msize;
107 valid &= mi->msize_valid;
108 }
109 if (mfp_used != NULL)
110 {
111 *mfp_used = mi->mfp_used;
112 valid &= mi->mfp_valid;
113 }
114 if (valid)
115 return mi->pc;
116 }
117
118 if (rsize != NULL)
119 *rsize = 0;
120 if (msize != NULL)
121 *msize = 0;
122 if (mfp_used != NULL)
123 *mfp_used = 0;
c5aa993b 124
c906108c
SS
125 /* Prologue must start with subtracting a constant from gr1.
126 Normally this is sub gr1,gr1,<rsize * 4>. */
127 insn = read_memory_integer (p, 4);
128 if ((insn & 0xffffff00) != 0x25010100)
129 {
130 /* If the frame is large, instead of a single instruction it
c5aa993b
JM
131 might be a pair of instructions:
132 const <reg>, <rsize * 4>
133 sub gr1,gr1,<reg>
134 */
c906108c
SS
135 int reg;
136 /* Possible value for rsize. */
137 unsigned int rsize0;
c5aa993b 138
c906108c
SS
139 if ((insn & 0xff000000) != 0x03000000)
140 {
141 p = pc;
142 goto done;
143 }
144 reg = (insn >> 8) & 0xff;
145 rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff));
146 p += 4;
147 insn = read_memory_integer (p, 4);
148 if ((insn & 0xffffff00) != 0x24010100
149 || (insn & 0xff) != reg)
150 {
151 p = pc;
152 goto done;
153 }
154 if (rsize != NULL)
155 *rsize = rsize0;
156 }
157 else
158 {
159 if (rsize != NULL)
160 *rsize = (insn & 0xff);
161 }
162 p += 4;
163
164 /* Next instruction ought to be asgeu V_SPILL,gr1,rab.
165 * We don't check the vector number to allow for kernel debugging. The
166 * kernel will use a different trap number.
167 * If this insn is missing, we just keep going; Metaware R2.3u compiler
168 * generates prologue that intermixes initializations and puts the asgeu
169 * way down.
170 */
171 insn = read_memory_integer (p, 4);
c5aa993b 172 if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM))
c906108c
SS
173 {
174 p += 4;
175 }
176
177 /* Next instruction usually sets the frame pointer (lr1) by adding
178 <size * 4> from gr1. However, this can (and high C does) be
179 deferred until anytime before the first function call. So it is
180 OK if we don't see anything which sets lr1.
181 To allow for alternate register sets (gcc -mkernel-registers) the msp
182 register number is a compile time constant. */
183
184 /* Normally this is just add lr1,gr1,<size * 4>. */
185 insn = read_memory_integer (p, 4);
186 if ((insn & 0xffffff00) == 0x15810100)
187 p += 4;
188 else
189 {
190 /* However, for large frames it can be
c5aa993b
JM
191 const <reg>, <size *4>
192 add lr1,gr1,<reg>
193 */
c906108c
SS
194 int reg;
195 CORE_ADDR q;
196
197 if ((insn & 0xff000000) == 0x03000000)
198 {
199 reg = (insn >> 8) & 0xff;
200 q = p + 4;
201 insn = read_memory_integer (q, 4);
202 if ((insn & 0xffffff00) == 0x14810100
203 && (insn & 0xff) == reg)
204 p = q;
205 }
206 }
207
208 /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory
209 frame pointer is in use. We just check for add lr<anything>,msp,0;
210 we don't check this rsize against the first instruction, and
211 we don't check that the trace-back tag indicates a memory frame pointer
212 is in use.
213 To allow for alternate register sets (gcc -mkernel-registers) the msp
214 register number is a compile time constant.
215
216 The recommended instruction is actually "sll lr<whatever>,msp,0".
217 We check for that, too. Originally Jim Kingdon's code seemed
218 to be looking for a "sub" instruction here, but the mask was set
219 up to lose all the time. */
220 insn = read_memory_integer (p, 4);
c5aa993b
JM
221 if (((insn & 0xff80ffff) == (0x15800000 | (MSP_HW_REGNUM << 8))) /* add */
222 || ((insn & 0xff80ffff) == (0x81800000 | (MSP_HW_REGNUM << 8)))) /* sll */
c906108c
SS
223 {
224 p += 4;
225 if (mfp_used != NULL)
226 *mfp_used = 1;
227 }
228
229 /* Next comes a subtraction from msp to allocate a memory frame,
230 but only if a memory frame is
231 being used. We don't check msize against the trace-back tag.
232
233 To allow for alternate register sets (gcc -mkernel-registers) the msp
234 register number is a compile time constant.
235
236 Normally this is just
237 sub msp,msp,<msize>
c5aa993b 238 */
c906108c 239 insn = read_memory_integer (p, 4);
c5aa993b
JM
240 if ((insn & 0xffffff00) ==
241 (0x25000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8)))
c906108c
SS
242 {
243 p += 4;
c5aa993b 244 if (msize != NULL)
c906108c
SS
245 *msize = insn & 0xff;
246 }
247 else
248 {
249 /* For large frames, instead of a single instruction it might
c5aa993b 250 be
c906108c 251
c5aa993b
JM
252 const <reg>, <msize>
253 consth <reg>, <msize> ; optional
254 sub msp,msp,<reg>
255 */
c906108c
SS
256 int reg;
257 unsigned msize0;
258 CORE_ADDR q = p;
259
260 if ((insn & 0xff000000) == 0x03000000)
261 {
262 reg = (insn >> 8) & 0xff;
263 msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff);
264 q += 4;
265 insn = read_memory_integer (q, 4);
266 /* Check for consth. */
267 if ((insn & 0xff000000) == 0x02000000
268 && (insn & 0x0000ff00) == reg)
269 {
270 msize0 |= (insn << 8) & 0xff000000;
271 msize0 |= (insn << 16) & 0x00ff0000;
272 q += 4;
273 insn = read_memory_integer (q, 4);
274 }
275 /* Check for sub msp,msp,<reg>. */
c5aa993b
JM
276 if ((insn & 0xffffff00) ==
277 (0x24000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8))
c906108c
SS
278 && (insn & 0xff) == reg)
279 {
280 p = q + 4;
281 if (msize != NULL)
282 *msize = msize0;
283 }
284 }
285 }
286
287 /* Next instruction might be asgeu V_SPILL,gr1,rab.
288 * We don't check the vector number to allow for kernel debugging. The
289 * kernel will use a different trap number.
290 * Metaware R2.3u compiler
291 * generates prologue that intermixes initializations and puts the asgeu
292 * way down after everything else.
293 */
294 insn = read_memory_integer (p, 4);
c5aa993b 295 if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM))
c906108c
SS
296 {
297 p += 4;
298 }
299
c5aa993b 300done:
c906108c
SS
301 if (msymbol != NULL)
302 {
303 if (mi == 0)
304 {
305 /* Add a new cache entry. */
c5aa993b
JM
306 mi = (struct prologue_info *) xmalloc (sizeof (struct prologue_info));
307 msymbol->info = (char *) mi;
c906108c
SS
308 mi->rsize_valid = 0;
309 mi->msize_valid = 0;
310 mi->mfp_valid = 0;
311 }
312 /* else, cache entry exists, but info is incomplete. */
313 mi->pc = p;
314 if (rsize != NULL)
315 {
316 mi->rsize = *rsize;
317 mi->rsize_valid = 1;
318 }
319 if (msize != NULL)
320 {
321 mi->msize = *msize;
322 mi->msize_valid = 1;
323 }
324 if (mfp_used != NULL)
325 {
326 mi->mfp_used = *mfp_used;
327 mi->mfp_valid = 1;
328 }
329 }
330 return p;
331}
332
333/* Advance PC across any function entry prologue instructions
334 to reach some "real" code. */
335
336CORE_ADDR
fba45db2 337a29k_skip_prologue (CORE_ADDR pc)
c906108c
SS
338{
339 return examine_prologue (pc, NULL, NULL, NULL);
340}
341
342/*
343 * Examine the one or two word tag at the beginning of a function.
344 * The tag word is expect to be at 'p', if it is not there, we fail
345 * by returning 0. The documentation for the tag word was taken from
346 * page 7-15 of the 29050 User's Manual. We are assuming that the
347 * m bit is in bit 22 of the tag word, which seems to be the agreed upon
348 * convention today (1/15/92).
349 * msize is return in bytes.
350 */
351
c5aa993b 352static int /* 0/1 - failure/success of finding the tag word */
fba45db2
KB
353examine_tag (CORE_ADDR p, int *is_trans, int *argcount, unsigned *msize,
354 int *mfp_used)
c906108c
SS
355{
356 unsigned int tag1, tag2;
357
358 tag1 = read_memory_integer (p, 4);
359 if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */
360 return 0;
c5aa993b 361 if (tag1 & (1 << 23)) /* A two word tag */
c906108c 362 {
c5aa993b
JM
363 tag2 = read_memory_integer (p - 4, 4);
364 if (msize)
365 *msize = tag2 * 2;
c906108c 366 }
c5aa993b
JM
367 else
368 /* A one word tag */
c906108c 369 {
c5aa993b
JM
370 if (msize)
371 *msize = tag1 & 0x7ff;
c906108c
SS
372 }
373 if (is_trans)
c5aa993b 374 *is_trans = ((tag1 & (1 << 21)) ? 1 : 0);
c906108c
SS
375 /* Note that this includes the frame pointer and the return address
376 register, so the actual number of registers of arguments is two less.
377 argcount can be zero, however, sometimes, for strange assembler
378 routines. */
379 if (argcount)
380 *argcount = (tag1 >> 16) & 0x1f;
381 if (mfp_used)
c5aa993b 382 *mfp_used = ((tag1 & (1 << 22)) ? 1 : 0);
c906108c
SS
383 return 1;
384}
385
386/* Initialize the frame. In addition to setting "extra" frame info,
387 we also set ->frame because we use it in a nonstandard way, and ->pc
388 because we need to know it to get the other stuff. See the diagram
389 of stacks and the frame cache in tm-a29k.h for more detail. */
390
391static void
fba45db2 392init_frame_info (int innermost_frame, struct frame_info *frame)
c906108c
SS
393{
394 CORE_ADDR p;
395 long insn;
396 unsigned rsize;
397 unsigned msize;
398 int mfp_used, trans;
399 struct symbol *func;
400
401 p = frame->pc;
402
403 if (innermost_frame)
404 frame->frame = read_register (GR1_REGNUM);
405 else
406 frame->frame = frame->next->frame + frame->next->rsize;
c5aa993b
JM
407
408#if 0 /* CALL_DUMMY_LOCATION == ON_STACK */
c906108c
SS
409 This wont work;
410#else
411 if (PC_IN_CALL_DUMMY (p, 0, 0))
412#endif
413 {
414 frame->rsize = DUMMY_FRAME_RSIZE;
415 /* This doesn't matter since we never try to get locals or args
c5aa993b 416 from a dummy frame. */
c906108c
SS
417 frame->msize = 0;
418 /* Dummy frames always use a memory frame pointer. */
c5aa993b 419 frame->saved_msp =
c906108c 420 read_register_stack_integer (frame->frame + DUMMY_FRAME_RSIZE - 4, 4);
c5aa993b 421 frame->flags |= (TRANSPARENT_FRAME | MFP_USED);
c906108c
SS
422 return;
423 }
c5aa993b 424
c906108c
SS
425 func = find_pc_function (p);
426 if (func != NULL)
427 p = BLOCK_START (SYMBOL_BLOCK_VALUE (func));
428 else
429 {
430 /* Search backward to find the trace-back tag. However,
c5aa993b
JM
431 do not trace back beyond the start of the text segment
432 (just as a sanity check to avoid going into never-never land). */
c906108c
SS
433#if 1
434 while (p >= text_start
c5aa993b 435 && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0)
c906108c
SS
436 p -= 4;
437#else /* 0 */
c5aa993b
JM
438 char pat[4] =
439 {0, 0, 0, 0};
c906108c
SS
440 char mask[4];
441 char insn_raw[4];
442 store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK);
443 /* Enable this once target_search is enabled and tested. */
c5aa993b 444 target_search (4, pat, mask, p, -4, text_start, p + 1, &p, &insn_raw);
c906108c
SS
445 insn = extract_unsigned_integer (insn_raw, 4);
446#endif /* 0 */
447
448 if (p < text_start)
449 {
450 /* Couldn't find the trace-back tag.
451 Something strange is going on. */
452 frame->saved_msp = 0;
453 frame->rsize = 0;
454 frame->msize = 0;
455 frame->flags = TRANSPARENT_FRAME;
456 return;
457 }
458 else
459 /* Advance to the first word of the function, i.e. the word
460 after the trace-back tag. */
461 p += 4;
462 }
463
464 /* We've found the start of the function.
465 Try looking for a tag word that indicates whether there is a
466 memory frame pointer and what the memory stack allocation is.
467 If one doesn't exist, try using a more exhaustive search of
468 the prologue. */
469
c5aa993b
JM
470 if (examine_tag (p - 4, &trans, (int *) NULL, &msize, &mfp_used)) /* Found good tag */
471 examine_prologue (p, &rsize, 0, 0);
472 else /* No tag try prologue */
473 examine_prologue (p, &rsize, &msize, &mfp_used);
c906108c
SS
474
475 frame->rsize = rsize;
476 frame->msize = msize;
477 frame->flags = 0;
478 if (mfp_used)
c5aa993b 479 frame->flags |= MFP_USED;
c906108c 480 if (trans)
c5aa993b 481 frame->flags |= TRANSPARENT_FRAME;
c906108c
SS
482 if (innermost_frame)
483 {
484 frame->saved_msp = read_register (MSP_REGNUM) + msize;
485 }
486 else
487 {
488 if (mfp_used)
c5aa993b
JM
489 frame->saved_msp =
490 read_register_stack_integer (frame->frame + rsize - 4, 4);
c906108c 491 else
c5aa993b 492 frame->saved_msp = frame->next->saved_msp + msize;
c906108c
SS
493 }
494}
495
496void
fba45db2 497init_extra_frame_info (struct frame_info *frame)
c906108c
SS
498{
499 if (frame->next == 0)
500 /* Assume innermost frame. May produce strange results for "info frame"
501 but there isn't any way to tell the difference. */
502 init_frame_info (1, frame);
c5aa993b
JM
503 else
504 {
7a292a7a 505 /* We're in get_prev_frame.
c906108c
SS
506 Take care of everything in init_frame_pc. */
507 ;
508 }
509}
510
511void
fba45db2 512init_frame_pc (int fromleaf, struct frame_info *frame)
c906108c
SS
513{
514 frame->pc = (fromleaf ? SAVED_PC_AFTER_CALL (frame->next) :
c5aa993b 515 frame->next ? FRAME_SAVED_PC (frame->next) : read_pc ());
c906108c
SS
516 init_frame_info (fromleaf, frame);
517}
518\f
519/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
520 offsets being relative to the memory stack pointer (high C) or
521 saved_msp (gcc). */
522
523CORE_ADDR
fba45db2 524frame_locals_address (struct frame_info *fi)
c906108c 525{
c5aa993b 526 if (fi->flags & MFP_USED)
c906108c
SS
527 return fi->saved_msp;
528 else
529 return fi->saved_msp - fi->msize;
530}
531\f
532/* Routines for reading the register stack. The caller gets to treat
533 the register stack as a uniform stack in memory, from address $gr1
534 straight through $rfb and beyond. */
535
536/* Analogous to read_memory except the length is understood to be 4.
537 Also, myaddr can be NULL (meaning don't bother to read), and
538 if actual_mem_addr is non-NULL, store there the address that it
539 was fetched from (or if from a register the offset within
540 registers). Set *LVAL to lval_memory or lval_register, depending
541 on where it came from. The contents written into MYADDR are in
542 target format. */
543void
fba45db2
KB
544read_register_stack (CORE_ADDR memaddr, char *myaddr,
545 CORE_ADDR *actual_mem_addr, enum lval_type *lval)
c906108c
SS
546{
547 long rfb = read_register (RFB_REGNUM);
548 long rsp = read_register (RSP_REGNUM);
549
550 /* If we don't do this 'info register' stops in the middle. */
c5aa993b 551 if (memaddr >= rstack_high_address)
c906108c
SS
552 {
553 /* a bogus value */
c5aa993b
JM
554 static char val[] =
555 {~0, ~0, ~0, ~0};
c906108c
SS
556 /* It's in a local register, but off the end of the stack. */
557 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
558 if (myaddr != NULL)
559 {
560 /* Provide bogusness */
561 memcpy (myaddr, val, 4);
562 }
c5aa993b 563 supply_register (regnum, val); /* More bogusness */
c906108c
SS
564 if (lval != NULL)
565 *lval = lval_register;
566 if (actual_mem_addr != NULL)
567 *actual_mem_addr = REGISTER_BYTE (regnum);
568 }
569 /* If it's in the part of the register stack that's in real registers,
570 get the value from the registers. If it's anywhere else in memory
571 (e.g. in another thread's saved stack), skip this part and get
572 it from real live memory. */
573 else if (memaddr < rfb && memaddr >= rsp)
574 {
575 /* It's in a register. */
576 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
577 if (regnum > LR0_REGNUM + 127)
578 error ("Attempt to read register stack out of range.");
579 if (myaddr != NULL)
580 read_register_gen (regnum, myaddr);
581 if (lval != NULL)
582 *lval = lval_register;
583 if (actual_mem_addr != NULL)
584 *actual_mem_addr = REGISTER_BYTE (regnum);
585 }
586 else
587 {
588 /* It's in the memory portion of the register stack. */
c5aa993b 589 if (myaddr != NULL)
c906108c
SS
590 read_memory (memaddr, myaddr, 4);
591 if (lval != NULL)
592 *lval = lval_memory;
593 if (actual_mem_addr != NULL)
594 *actual_mem_addr = memaddr;
595 }
596}
597
598/* Analogous to read_memory_integer
599 except the length is understood to be 4. */
600long
fba45db2 601read_register_stack_integer (CORE_ADDR memaddr, int len)
c906108c
SS
602{
603 char buf[4];
604 read_register_stack (memaddr, buf, NULL, NULL);
605 return extract_signed_integer (buf, 4);
606}
607
608/* Copy 4 bytes from GDB memory at MYADDR into inferior memory
609 at MEMADDR and put the actual address written into in
610 *ACTUAL_MEM_ADDR. */
611static void
fba45db2
KB
612write_register_stack (CORE_ADDR memaddr, char *myaddr,
613 CORE_ADDR *actual_mem_addr)
c906108c
SS
614{
615 long rfb = read_register (RFB_REGNUM);
616 long rsp = read_register (RSP_REGNUM);
617 /* If we don't do this 'info register' stops in the middle. */
c5aa993b 618 if (memaddr >= rstack_high_address)
c906108c
SS
619 {
620 /* It's in a register, but off the end of the stack. */
621 if (actual_mem_addr != NULL)
c5aa993b 622 *actual_mem_addr = 0;
c906108c
SS
623 }
624 else if (memaddr < rfb)
625 {
626 /* It's in a register. */
627 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
628 if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127)
629 error ("Attempt to read register stack out of range.");
630 if (myaddr != NULL)
c5aa993b 631 write_register (regnum, *(long *) myaddr);
c906108c
SS
632 if (actual_mem_addr != NULL)
633 *actual_mem_addr = 0;
634 }
635 else
636 {
637 /* It's in the memory portion of the register stack. */
638 if (myaddr != NULL)
639 write_memory (memaddr, myaddr, 4);
640 if (actual_mem_addr != NULL)
641 *actual_mem_addr = memaddr;
642 }
643}
644\f
645/* Find register number REGNUM relative to FRAME and put its
646 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
647 was optimized out (and thus can't be fetched). If the variable
648 was fetched from memory, set *ADDRP to where it was fetched from,
649 otherwise it was fetched from a register.
650
651 The argument RAW_BUFFER must point to aligned memory. */
652
653void
fba45db2
KB
654a29k_get_saved_register (char *raw_buffer, int *optimized, CORE_ADDR *addrp,
655 struct frame_info *frame, int regnum,
656 enum lval_type *lvalp)
c906108c
SS
657{
658 struct frame_info *fi;
659 CORE_ADDR addr;
660 enum lval_type lval;
661
662 if (!target_has_registers)
663 error ("No registers.");
664
665 /* Probably now redundant with the target_has_registers check. */
666 if (frame == 0)
667 return;
668
669 /* Once something has a register number, it doesn't get optimized out. */
670 if (optimized != NULL)
671 *optimized = 0;
672 if (regnum == RSP_REGNUM)
673 {
674 if (raw_buffer != NULL)
675 {
676 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
677 }
678 if (lvalp != NULL)
679 *lvalp = not_lval;
680 return;
681 }
682 else if (regnum == PC_REGNUM && frame->next != NULL)
683 {
684 if (raw_buffer != NULL)
685 {
686 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc);
687 }
688
689 /* Not sure we have to do this. */
690 if (lvalp != NULL)
691 *lvalp = not_lval;
692
693 return;
694 }
695 else if (regnum == MSP_REGNUM)
696 {
697 if (raw_buffer != NULL)
698 {
699 if (frame->next != NULL)
700 {
701 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
702 frame->next->saved_msp);
703 }
704 else
705 read_register_gen (MSP_REGNUM, raw_buffer);
706 }
707 /* The value may have been computed, not fetched. */
708 if (lvalp != NULL)
709 *lvalp = not_lval;
710 return;
711 }
712 else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128)
713 {
714 /* These registers are not saved over procedure calls,
c5aa993b 715 so just print out the current values. */
c906108c
SS
716 if (raw_buffer != NULL)
717 read_register_gen (regnum, raw_buffer);
718 if (lvalp != NULL)
719 *lvalp = lval_register;
720 if (addrp != NULL)
721 *addrp = REGISTER_BYTE (regnum);
722 return;
723 }
c5aa993b 724
c906108c
SS
725 addr = frame->frame + (regnum - LR0_REGNUM) * 4;
726 if (raw_buffer != NULL)
727 read_register_stack (addr, raw_buffer, &addr, &lval);
728 if (lvalp != NULL)
729 *lvalp = lval;
730 if (addrp != NULL)
731 *addrp = addr;
732}
733\f
734
735/* Discard from the stack the innermost frame,
736 restoring all saved registers. */
737
738void
fba45db2 739pop_frame (void)
c906108c
SS
740{
741 struct frame_info *frame = get_current_frame ();
c5aa993b 742 CORE_ADDR rfb = read_register (RFB_REGNUM);
c906108c 743 CORE_ADDR gr1 = frame->frame + frame->rsize;
c5aa993b 744 CORE_ADDR lr1;
c906108c
SS
745 CORE_ADDR original_lr0;
746 int must_fix_lr0 = 0;
747 int i;
748
749 /* If popping a dummy frame, need to restore registers. */
750 if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM),
751 read_register (SP_REGNUM),
752 FRAME_FP (frame)))
753 {
c5aa993b 754 int lrnum = LR0_REGNUM + DUMMY_ARG / 4;
c906108c 755 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
c5aa993b 756 write_register (SR_REGNUM (i + 128), read_register (lrnum++));
c906108c 757 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
c5aa993b 758 write_register (SR_REGNUM (i + 160), read_register (lrnum++));
c906108c
SS
759 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
760 write_register (RETURN_REGNUM + i, read_register (lrnum++));
761 /* Restore the PCs and prepare to restore LR0. */
c5aa993b
JM
762 write_register (PC_REGNUM, read_register (lrnum++));
763 write_register (NPC_REGNUM, read_register (lrnum++));
764 write_register (PC2_REGNUM, read_register (lrnum++));
c906108c
SS
765 original_lr0 = read_register (lrnum++);
766 must_fix_lr0 = 1;
767 }
768
769 /* Restore the memory stack pointer. */
770 write_register (MSP_REGNUM, frame->saved_msp);
c5aa993b 771 /* Restore the register stack pointer. */
c906108c
SS
772 write_register (GR1_REGNUM, gr1);
773
774 /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */
c5aa993b 775 if (must_fix_lr0)
c906108c
SS
776 write_register (LR0_REGNUM, original_lr0);
777
c5aa993b
JM
778 /* Check whether we need to fill registers. */
779 lr1 = read_register (LR0_REGNUM + 1);
780 if (lr1 > rfb)
781 {
782 /* Fill. */
c906108c 783 int num_bytes = lr1 - rfb;
c5aa993b 784 int i;
c906108c 785 long word;
c5aa993b
JM
786
787 write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes);
788 write_register (RFB_REGNUM, lr1);
789 for (i = 0; i < num_bytes; i += 4)
790 {
c906108c 791 /* Note: word is in host byte order. */
c5aa993b
JM
792 word = read_memory_integer (rfb + i, 4);
793 write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word);
794 }
c906108c 795 }
c5aa993b 796 flush_cached_frames ();
c906108c
SS
797}
798
799/* Push an empty stack frame, to record the current PC, etc. */
800
c5aa993b 801void
fba45db2 802push_dummy_frame (void)
c906108c
SS
803{
804 long w;
805 CORE_ADDR rab, gr1;
806 CORE_ADDR msp = read_register (MSP_REGNUM);
807 int lrnum, i;
808 CORE_ADDR original_lr0;
c5aa993b 809
c906108c
SS
810 /* Read original lr0 before changing gr1. This order isn't really needed
811 since GDB happens to have a snapshot of all the regs and doesn't toss
812 it when gr1 is changed. But it's The Right Thing To Do. */
813 original_lr0 = read_register (LR0_REGNUM);
814
c5aa993b 815 /* Allocate the new frame. */
c906108c
SS
816 gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE;
817 write_register (GR1_REGNUM, gr1);
818
819#ifdef VXWORKS_TARGET
820 /* We force re-reading all registers to get the new local registers set
821 after gr1 has been modified. This fix is due to the lack of single
822 register read/write operation in the RPC interface between VxGDB and
823 VxWorks. This really must be changed ! */
824
825 vx_read_register (-1);
826
827#endif /* VXWORK_TARGET */
828
829 rab = read_register (RAB_REGNUM);
830 if (gr1 < rab)
831 {
832 /* We need to spill registers. */
833 int num_bytes = rab - gr1;
834 CORE_ADDR rfb = read_register (RFB_REGNUM);
835 int i;
836 long word;
837
838 write_register (RFB_REGNUM, rfb - num_bytes);
839 write_register (RAB_REGNUM, gr1);
840 for (i = 0; i < num_bytes; i += 4)
841 {
842 /* Note: word is in target byte order. */
843 read_register_gen (LR0_REGNUM + i / 4, (char *) &word);
844 write_memory (rfb - num_bytes + i, (char *) &word, 4);
845 }
846 }
847
848 /* There are no arguments in to the dummy frame, so we don't need
849 more than rsize plus the return address and lr1. */
850 write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4);
851
852 /* Set the memory frame pointer. */
853 write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp);
854
855 /* Allocate arg_slop. */
856 write_register (MSP_REGNUM, msp - 16 * 4);
857
858 /* Save registers. */
c5aa993b 859 lrnum = LR0_REGNUM + DUMMY_ARG / 4;
c906108c
SS
860 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
861 write_register (lrnum++, read_register (SR_REGNUM (i + 128)));
862 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
863 write_register (lrnum++, read_register (SR_REGNUM (i + 160)));
864 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
865 write_register (lrnum++, read_register (RETURN_REGNUM + i));
866 /* Save the PCs and LR0. */
867 write_register (lrnum++, read_register (PC_REGNUM));
868 write_register (lrnum++, read_register (NPC_REGNUM));
869 write_register (lrnum++, read_register (PC2_REGNUM));
870
871 /* Why are we saving LR0? What would clobber it? (the dummy frame should
872 be below it on the register stack, no?). */
873 write_register (lrnum++, original_lr0);
874}
875
876
877
878/*
879 This routine takes three arguments and makes the cached frames look
880 as if these arguments defined a frame on the cache. This allows the
881 rest of `info frame' to extract the important arguments without much
882 difficulty. Since an individual frame on the 29K is determined by
883 three values (FP, PC, and MSP), we really need all three to do a
884 good job. */
885
886struct frame_info *
fba45db2 887setup_arbitrary_frame (int argc, CORE_ADDR *argv)
c906108c
SS
888{
889 struct frame_info *frame;
890
891 if (argc != 3)
892 error ("AMD 29k frame specifications require three arguments: rsp pc msp");
893
894 frame = create_new_frame (argv[0], argv[1]);
895
896 if (!frame)
8e65ff28
AC
897 internal_error (__FILE__, __LINE__,
898 "create_new_frame returned invalid frame id");
c5aa993b 899
c906108c
SS
900 /* Creating a new frame munges the `frame' value from the current
901 GR1, so we restore it again here. FIXME, untangle all this
902 29K frame stuff... */
903 frame->frame = argv[0];
904
905 /* Our MSP is in argv[2]. It'd be intelligent if we could just
906 save this value in the FRAME. But the way it's set up (FIXME),
907 we must save our caller's MSP. We compute that by adding our
908 memory stack frame size to our MSP. */
909 frame->saved_msp = argv[2] + frame->msize;
910
911 return frame;
912}
913
914int
fba45db2 915gdb_print_insn_a29k (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
916{
917 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
918 return print_insn_big_a29k (memaddr, info);
919 else
920 return print_insn_little_a29k (memaddr, info);
921}
922
923enum a29k_processor_types processor_type = a29k_unknown;
924
925void
fba45db2 926a29k_get_processor_type (void)
c906108c
SS
927{
928 unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM);
929
930 /* Most of these don't have freeze mode. */
931 processor_type = a29k_no_freeze_mode;
932
933 switch ((cfg_reg >> 28) & 0xf)
934 {
935 case 0:
936 fprintf_filtered (gdb_stderr, "Remote debugging an Am29000");
937 break;
938 case 1:
939 fprintf_filtered (gdb_stderr, "Remote debugging an Am29005");
940 break;
941 case 2:
942 fprintf_filtered (gdb_stderr, "Remote debugging an Am29050");
943 processor_type = a29k_freeze_mode;
944 break;
945 case 3:
946 fprintf_filtered (gdb_stderr, "Remote debugging an Am29035");
947 break;
948 case 4:
949 fprintf_filtered (gdb_stderr, "Remote debugging an Am29030");
950 break;
951 case 5:
952 fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*");
953 break;
954 case 6:
955 fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*");
956 break;
957 case 7:
958 fprintf_filtered (gdb_stderr, "Remote debugging an Am29040");
959 break;
960 default:
961 fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n");
962 /* Don't bother to print the revision. */
963 return;
964 }
965 fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f));
966}
967
968#ifdef GET_LONGJMP_TARGET
969/* Figure out where the longjmp will land. We expect that we have just entered
c5aa993b 970 longjmp and haven't yet setup the stack frame, so the args are still in the
c906108c
SS
971 output regs. lr2 (LR2_REGNUM) points at the jmp_buf structure from which we
972 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
973 This routine returns true on success */
974
975int
fba45db2 976get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
977{
978 CORE_ADDR jb_addr;
c5aa993b 979 char buf[sizeof (CORE_ADDR)];
c906108c 980
c5aa993b 981 jb_addr = read_register (LR2_REGNUM);
c906108c 982
c5aa993b
JM
983 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, (char *) buf,
984 sizeof (CORE_ADDR)))
c906108c
SS
985 return 0;
986
c5aa993b 987 *pc = extract_address ((PTR) buf, sizeof (CORE_ADDR));
c906108c
SS
988 return 1;
989}
990#endif /* GET_LONGJMP_TARGET */
991
992void
fba45db2 993_initialize_a29k_tdep (void)
c906108c
SS
994{
995 extern CORE_ADDR text_end;
996
997 tm_print_insn = gdb_print_insn_a29k;
998
999 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
1000 add_show_from_set
1001 (add_set_cmd ("rstack_high_address", class_support, var_uinteger,
c5aa993b 1002 (char *) &rstack_high_address,
c906108c
SS
1003 "Set top address in memory of the register stack.\n\
1004Attempts to access registers saved above this address will be ignored\n\
1005or will produce the value -1.", &setlist),
1006 &showlist);
1007
1008 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
1009 add_show_from_set
1010 (add_set_cmd ("call_scratch_address", class_support, var_uinteger,
c5aa993b
JM
1011 (char *) &text_end,
1012 "Set address in memory where small amounts of RAM can be used\n\
c906108c
SS
1013when making function calls into the inferior.", &setlist),
1014 &showlist);
1015}
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