* i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
[deliverable/binutils-gdb.git] / gdb / a29k-tdep.c
CommitLineData
dd3b648e 1/* Target-machine dependent code for the AMD 29000
7b2bcbf5 2 Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
dd3b648e
RP
3 Contributed by Cygnus Support. Written by Jim Kingdon.
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
99a7de40
JG
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
dd3b648e
RP
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
99a7de40
JG
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
dd3b648e
RP
20
21#include "defs.h"
22#include "gdbcore.h"
dd3b648e
RP
23#include "frame.h"
24#include "value.h"
dd3b648e
RP
25#include "symtab.h"
26#include "inferior.h"
8f86a4e4 27#include "gdbcmd.h"
dd3b648e 28
946f014b
JG
29/* If all these bits in an instruction word are zero, it is a "tag word"
30 which precedes a function entry point and gives stack traceback info.
31 This used to be defined as 0xff000000, but that treated 0x00000deb as
32 a tag word, while it is really used as a breakpoint. */
33#define TAGWORD_ZERO_MASK 0xff00f800
34
7730bd5a
JG
35extern CORE_ADDR text_start; /* FIXME, kludge... */
36
8f86a4e4
JG
37/* The user-settable top of the register stack in virtual memory. We
38 won't attempt to access any stored registers above this address, if set
39 nonzero. */
40
41static CORE_ADDR rstack_high_address = UINT_MAX;
42
dd3b648e
RP
43/* Structure to hold cached info about function prologues. */
44struct prologue_info
45{
46 CORE_ADDR pc; /* First addr after fn prologue */
47 unsigned rsize, msize; /* register stack frame size, mem stack ditto */
48 unsigned mfp_used : 1; /* memory frame pointer used */
49 unsigned rsize_valid : 1; /* Validity bits for the above */
50 unsigned msize_valid : 1;
51 unsigned mfp_valid : 1;
52};
53
54/* Examine the prologue of a function which starts at PC. Return
55 the first addess past the prologue. If MSIZE is non-NULL, then
56 set *MSIZE to the memory stack frame size. If RSIZE is non-NULL,
57 then set *RSIZE to the register stack frame size (not including
58 incoming arguments and the return address & frame pointer stored
59 with them). If no prologue is found, *RSIZE is set to zero.
60 If no prologue is found, or a prologue which doesn't involve
61 allocating a memory stack frame, then set *MSIZE to zero.
62
63 Note that both msize and rsize are in bytes. This is not consistent
64 with the _User's Manual_ with respect to rsize, but it is much more
65 convenient.
66
67 If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory
68 frame pointer is being used. */
69CORE_ADDR
70examine_prologue (pc, rsize, msize, mfp_used)
71 CORE_ADDR pc;
72 unsigned *msize;
73 unsigned *rsize;
74 int *mfp_used;
75{
76 long insn;
77 CORE_ADDR p = pc;
1ab3bf1b 78 struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc);
dd3b648e
RP
79 struct prologue_info *mi = 0;
80
1ab3bf1b 81 if (msymbol != NULL)
07df4831 82 mi = (struct prologue_info *) msymbol -> info;
dd3b648e
RP
83
84 if (mi != 0)
85 {
86 int valid = 1;
87 if (rsize != NULL)
88 {
89 *rsize = mi->rsize;
90 valid &= mi->rsize_valid;
91 }
92 if (msize != NULL)
93 {
94 *msize = mi->msize;
95 valid &= mi->msize_valid;
96 }
97 if (mfp_used != NULL)
98 {
99 *mfp_used = mi->mfp_used;
100 valid &= mi->mfp_valid;
101 }
102 if (valid)
103 return mi->pc;
104 }
105
106 if (rsize != NULL)
107 *rsize = 0;
108 if (msize != NULL)
109 *msize = 0;
110 if (mfp_used != NULL)
111 *mfp_used = 0;
112
113 /* Prologue must start with subtracting a constant from gr1.
114 Normally this is sub gr1,gr1,<rsize * 4>. */
115 insn = read_memory_integer (p, 4);
116 if ((insn & 0xffffff00) != 0x25010100)
117 {
118 /* If the frame is large, instead of a single instruction it
119 might be a pair of instructions:
120 const <reg>, <rsize * 4>
121 sub gr1,gr1,<reg>
122 */
123 int reg;
124 /* Possible value for rsize. */
125 unsigned int rsize0;
126
127 if ((insn & 0xff000000) != 0x03000000)
128 {
129 p = pc;
130 goto done;
131 }
132 reg = (insn >> 8) & 0xff;
133 rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff));
134 p += 4;
135 insn = read_memory_integer (p, 4);
136 if ((insn & 0xffffff00) != 0x24010100
137 || (insn & 0xff) != reg)
138 {
139 p = pc;
140 goto done;
141 }
142 if (rsize != NULL)
143 *rsize = rsize0;
144 }
145 else
146 {
147 if (rsize != NULL)
148 *rsize = (insn & 0xff);
149 }
150 p += 4;
151
7b2bcbf5 152 /* Next instruction ought to be asgeu V_SPILL,gr1,rab.
d0b04c6a
SG
153 * We don't check the vector number to allow for kernel debugging. The
154 * kernel will use a different trap number.
7b2bcbf5
JG
155 * If this insn is missing, we just keep going; Metaware R2.3u compiler
156 * generates prologue that intermixes initializations and puts the asgeu
157 * way down.
d0b04c6a 158 */
dd3b648e 159 insn = read_memory_integer (p, 4);
7b2bcbf5 160 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
dd3b648e 161 {
7b2bcbf5 162 p += 4;
dd3b648e 163 }
dd3b648e
RP
164
165 /* Next instruction usually sets the frame pointer (lr1) by adding
166 <size * 4> from gr1. However, this can (and high C does) be
167 deferred until anytime before the first function call. So it is
d0b04c6a
SG
168 OK if we don't see anything which sets lr1.
169 To allow for alternate register sets (gcc -mkernel-registers) the msp
170 register number is a compile time constant. */
171
dd3b648e
RP
172 /* Normally this is just add lr1,gr1,<size * 4>. */
173 insn = read_memory_integer (p, 4);
174 if ((insn & 0xffffff00) == 0x15810100)
175 p += 4;
176 else
177 {
178 /* However, for large frames it can be
179 const <reg>, <size *4>
180 add lr1,gr1,<reg>
181 */
182 int reg;
183 CORE_ADDR q;
184
185 if ((insn & 0xff000000) == 0x03000000)
186 {
187 reg = (insn >> 8) & 0xff;
188 q = p + 4;
189 insn = read_memory_integer (q, 4);
190 if ((insn & 0xffffff00) == 0x14810100
191 && (insn & 0xff) == reg)
192 p = q;
193 }
194 }
195
196 /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory
197 frame pointer is in use. We just check for add lr<anything>,msp,0;
198 we don't check this rsize against the first instruction, and
199 we don't check that the trace-back tag indicates a memory frame pointer
200 is in use.
d0b04c6a
SG
201 To allow for alternate register sets (gcc -mkernel-registers) the msp
202 register number is a compile time constant.
dd3b648e
RP
203
204 The recommended instruction is actually "sll lr<whatever>,msp,0".
205 We check for that, too. Originally Jim Kingdon's code seemed
206 to be looking for a "sub" instruction here, but the mask was set
207 up to lose all the time. */
208 insn = read_memory_integer (p, 4);
d0b04c6a
SG
209 if (((insn & 0xff80ffff) == (0x15800000|(MSP_HW_REGNUM<<8))) /* add */
210 || ((insn & 0xff80ffff) == (0x81800000|(MSP_HW_REGNUM<<8)))) /* sll */
dd3b648e
RP
211 {
212 p += 4;
213 if (mfp_used != NULL)
214 *mfp_used = 1;
215 }
216
217 /* Next comes a subtraction from msp to allocate a memory frame,
218 but only if a memory frame is
219 being used. We don't check msize against the trace-back tag.
220
d0b04c6a
SG
221 To allow for alternate register sets (gcc -mkernel-registers) the msp
222 register number is a compile time constant.
223
dd3b648e
RP
224 Normally this is just
225 sub msp,msp,<msize>
226 */
227 insn = read_memory_integer (p, 4);
d0b04c6a
SG
228 if ((insn & 0xffffff00) ==
229 (0x25000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8)))
dd3b648e
RP
230 {
231 p += 4;
d0b04c6a 232 if (msize != NULL)
dd3b648e
RP
233 *msize = insn & 0xff;
234 }
235 else
236 {
237 /* For large frames, instead of a single instruction it might
238 be
239
240 const <reg>, <msize>
241 consth <reg>, <msize> ; optional
242 sub msp,msp,<reg>
243 */
244 int reg;
245 unsigned msize0;
246 CORE_ADDR q = p;
247
248 if ((insn & 0xff000000) == 0x03000000)
249 {
250 reg = (insn >> 8) & 0xff;
251 msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff);
252 q += 4;
253 insn = read_memory_integer (q, 4);
254 /* Check for consth. */
255 if ((insn & 0xff000000) == 0x02000000
256 && (insn & 0x0000ff00) == reg)
257 {
258 msize0 |= (insn << 8) & 0xff000000;
259 msize0 |= (insn << 16) & 0x00ff0000;
260 q += 4;
261 insn = read_memory_integer (q, 4);
262 }
263 /* Check for sub msp,msp,<reg>. */
d0b04c6a
SG
264 if ((insn & 0xffffff00) ==
265 (0x24000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8))
dd3b648e
RP
266 && (insn & 0xff) == reg)
267 {
268 p = q + 4;
269 if (msize != NULL)
270 *msize = msize0;
271 }
272 }
273 }
274
7b2bcbf5
JG
275 /* Next instruction might be asgeu V_SPILL,gr1,rab.
276 * We don't check the vector number to allow for kernel debugging. The
277 * kernel will use a different trap number.
278 * Metaware R2.3u compiler
279 * generates prologue that intermixes initializations and puts the asgeu
280 * way down after everything else.
281 */
282 insn = read_memory_integer (p, 4);
283 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
284 {
285 p += 4;
286 }
287
dd3b648e 288 done:
1ab3bf1b 289 if (msymbol != NULL)
dd3b648e
RP
290 {
291 if (mi == 0)
292 {
293 /* Add a new cache entry. */
294 mi = (struct prologue_info *)xmalloc (sizeof (struct prologue_info));
07df4831 295 msymbol -> info = (char *)mi;
dd3b648e
RP
296 mi->rsize_valid = 0;
297 mi->msize_valid = 0;
298 mi->mfp_valid = 0;
299 }
300 /* else, cache entry exists, but info is incomplete. */
301 mi->pc = p;
302 if (rsize != NULL)
303 {
304 mi->rsize = *rsize;
305 mi->rsize_valid = 1;
306 }
307 if (msize != NULL)
308 {
309 mi->msize = *msize;
310 mi->msize_valid = 1;
311 }
312 if (mfp_used != NULL)
313 {
314 mi->mfp_used = *mfp_used;
315 mi->mfp_valid = 1;
316 }
317 }
318 return p;
319}
320
321/* Advance PC across any function entry prologue instructions
322 to reach some "real" code. */
323
324CORE_ADDR
325skip_prologue (pc)
326 CORE_ADDR pc;
327{
328 return examine_prologue (pc, (unsigned *)NULL, (unsigned *)NULL,
329 (int *)NULL);
330}
d0b04c6a
SG
331/*
332 * Examine the one or two word tag at the beginning of a function.
333 * The tag word is expect to be at 'p', if it is not there, we fail
334 * by returning 0. The documentation for the tag word was taken from
335 * page 7-15 of the 29050 User's Manual. We are assuming that the
336 * m bit is in bit 22 of the tag word, which seems to be the agreed upon
337 * convention today (1/15/92).
338 * msize is return in bytes.
339 */
340static int /* 0/1 - failure/success of finding the tag word */
341examine_tag(p, is_trans, argcount, msize, mfp_used)
342 CORE_ADDR p;
343 int *is_trans;
344 int *argcount;
345 unsigned *msize;
346 int *mfp_used;
347{
348 unsigned int tag1, tag2;
349
350 tag1 = read_memory_integer (p, 4);
946f014b 351 if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */
d0b04c6a
SG
352 return 0;
353 if (tag1 & (1<<23)) /* A two word tag */
354 {
355 tag2 = read_memory_integer (p+4, 4);
356 if (msize)
357 *msize = tag2;
358 }
359 else /* A one word tag */
360 {
361 if (msize)
362 *msize = tag1 & 0x7ff;
363 }
364 if (is_trans)
365 *is_trans = ((tag1 & (1<<21)) ? 1 : 0);
366 if (argcount)
367 *argcount = (tag1 >> 16) & 0x1f;
368 if (mfp_used)
369 *mfp_used = ((tag1 & (1<<22)) ? 1 : 0);
370 return(1);
371}
dd3b648e
RP
372
373/* Initialize the frame. In addition to setting "extra" frame info,
374 we also set ->frame because we use it in a nonstandard way, and ->pc
375 because we need to know it to get the other stuff. See the diagram
d7d35f00 376 of stacks and the frame cache in tm-a29k.h for more detail. */
dd3b648e
RP
377static void
378init_frame_info (innermost_frame, fci)
379 int innermost_frame;
380 struct frame_info *fci;
381{
382 CORE_ADDR p;
383 long insn;
384 unsigned rsize;
385 unsigned msize;
d0b04c6a 386 int mfp_used, trans;
dd3b648e
RP
387 struct symbol *func;
388
389 p = fci->pc;
390
391 if (innermost_frame)
392 fci->frame = read_register (GR1_REGNUM);
393 else
23a8e291 394 fci->frame = fci->next->frame + fci->next->rsize;
dd3b648e
RP
395
396#if CALL_DUMMY_LOCATION == ON_STACK
397 This wont work;
398#else
399 if (PC_IN_CALL_DUMMY (p, 0, 0))
400#endif
401 {
402 fci->rsize = DUMMY_FRAME_RSIZE;
403 /* This doesn't matter since we never try to get locals or args
404 from a dummy frame. */
405 fci->msize = 0;
406 /* Dummy frames always use a memory frame pointer. */
407 fci->saved_msp =
408 read_register_stack_integer (fci->frame + DUMMY_FRAME_RSIZE - 4, 4);
d0b04c6a 409 fci->flags |= (TRANSPARENT|MFP_USED);
dd3b648e
RP
410 return;
411 }
412
413 func = find_pc_function (p);
414 if (func != NULL)
415 p = BLOCK_START (SYMBOL_BLOCK_VALUE (func));
416 else
417 {
418 /* Search backward to find the trace-back tag. However,
419 do not trace back beyond the start of the text segment
420 (just as a sanity check to avoid going into never-never land). */
63dcc380 421#if 1
dd3b648e 422 while (p >= text_start
946f014b 423 && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0)
dd3b648e 424 p -= 4;
63dcc380
JK
425#else /* 0 */
426 char pat[4] = {0, 0, 0, 0};
427 char mask[4];
428 char insn_raw[4];
429 store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK);
430 /* Enable this once target_search is enabled and tested. */
431 target_search (4, pat, mask, p, -4, text_start, p+1, &p, &insn_raw);
432 insn = extract_unsigned_integer (insn_raw, 4);
433#endif /* 0 */
434
dd3b648e
RP
435 if (p < text_start)
436 {
437 /* Couldn't find the trace-back tag.
438 Something strange is going on. */
439 fci->saved_msp = 0;
440 fci->rsize = 0;
441 fci->msize = 0;
d0b04c6a 442 fci->flags = TRANSPARENT;
dd3b648e
RP
443 return;
444 }
445 else
446 /* Advance to the first word of the function, i.e. the word
447 after the trace-back tag. */
448 p += 4;
449 }
eb5b74ca 450
d0b04c6a 451 /* We've found the start of the function.
eb5b74ca
JG
452 Try looking for a tag word that indicates whether there is a
453 memory frame pointer and what the memory stack allocation is.
454 If one doesn't exist, try using a more exhaustive search of
455 the prologue. */
456
457 if (examine_tag(p-4,&trans,(int *)NULL,&msize,&mfp_used)) /* Found good tag */
d0b04c6a
SG
458 examine_prologue (p, &rsize, 0, 0);
459 else /* No tag try prologue */
460 examine_prologue (p, &rsize, &msize, &mfp_used);
461
dd3b648e
RP
462 fci->rsize = rsize;
463 fci->msize = msize;
d0b04c6a
SG
464 fci->flags = 0;
465 if (mfp_used)
466 fci->flags |= MFP_USED;
467 if (trans)
468 fci->flags |= TRANSPARENT;
dd3b648e
RP
469 if (innermost_frame)
470 {
471 fci->saved_msp = read_register (MSP_REGNUM) + msize;
472 }
473 else
474 {
475 if (mfp_used)
d0b04c6a
SG
476 fci->saved_msp =
477 read_register_stack_integer (fci->frame + rsize - 4, 4);
dd3b648e 478 else
d0b04c6a 479 fci->saved_msp = fci->next->saved_msp + msize;
dd3b648e
RP
480 }
481}
482
483void
484init_extra_frame_info (fci)
485 struct frame_info *fci;
486{
487 if (fci->next == 0)
488 /* Assume innermost frame. May produce strange results for "info frame"
489 but there isn't any way to tell the difference. */
490 init_frame_info (1, fci);
17f7e032
JG
491 else {
492 /* We're in get_prev_frame_info.
493 Take care of everything in init_frame_pc. */
494 ;
495 }
dd3b648e
RP
496}
497
498void
499init_frame_pc (fromleaf, fci)
500 int fromleaf;
501 struct frame_info *fci;
502{
503 fci->pc = (fromleaf ? SAVED_PC_AFTER_CALL (fci->next) :
504 fci->next ? FRAME_SAVED_PC (fci->next) : read_pc ());
d0b04c6a 505 init_frame_info (fromleaf, fci);
dd3b648e
RP
506}
507\f
508/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
509 offsets being relative to the memory stack pointer (high C) or
510 saved_msp (gcc). */
511
512CORE_ADDR
513frame_locals_address (fi)
514 struct frame_info *fi;
515{
d0b04c6a 516 if (fi->flags & MFP_USED)
dd3b648e
RP
517 return fi->saved_msp;
518 else
519 return fi->saved_msp - fi->msize;
520}
521\f
522/* Routines for reading the register stack. The caller gets to treat
523 the register stack as a uniform stack in memory, from address $gr1
524 straight through $rfb and beyond. */
525
526/* Analogous to read_memory except the length is understood to be 4.
527 Also, myaddr can be NULL (meaning don't bother to read), and
528 if actual_mem_addr is non-NULL, store there the address that it
529 was fetched from (or if from a register the offset within
530 registers). Set *LVAL to lval_memory or lval_register, depending
4d50f90a
JK
531 on where it came from. The contents written into MYADDR are in
532 target format. */
dd3b648e
RP
533void
534read_register_stack (memaddr, myaddr, actual_mem_addr, lval)
535 CORE_ADDR memaddr;
536 char *myaddr;
537 CORE_ADDR *actual_mem_addr;
538 enum lval_type *lval;
539{
540 long rfb = read_register (RFB_REGNUM);
541 long rsp = read_register (RSP_REGNUM);
d0b04c6a 542
d0b04c6a 543 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 544 if (memaddr >= rstack_high_address)
d0b04c6a 545 {
4d50f90a 546 /* a bogus value */
85494909 547 static char val[] = {~0, ~0, ~0, ~0};
d0b04c6a
SG
548 /* It's in a local register, but off the end of the stack. */
549 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
550 if (myaddr != NULL)
4d50f90a
JK
551 {
552 /* Provide bogusness */
553 memcpy (myaddr, val, 4);
554 }
555 supply_register(regnum, val); /* More bogusness */
d0b04c6a
SG
556 if (lval != NULL)
557 *lval = lval_register;
558 if (actual_mem_addr != NULL)
559 *actual_mem_addr = REGISTER_BYTE (regnum);
560 }
946f014b
JG
561 /* If it's in the part of the register stack that's in real registers,
562 get the value from the registers. If it's anywhere else in memory
563 (e.g. in another thread's saved stack), skip this part and get
564 it from real live memory. */
565 else if (memaddr < rfb && memaddr >= rsp)
dd3b648e
RP
566 {
567 /* It's in a register. */
568 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
946f014b 569 if (regnum > LR0_REGNUM + 127)
dd3b648e
RP
570 error ("Attempt to read register stack out of range.");
571 if (myaddr != NULL)
572 read_register_gen (regnum, myaddr);
573 if (lval != NULL)
574 *lval = lval_register;
575 if (actual_mem_addr != NULL)
576 *actual_mem_addr = REGISTER_BYTE (regnum);
577 }
578 else
579 {
580 /* It's in the memory portion of the register stack. */
d0b04c6a 581 if (myaddr != NULL)
4d50f90a 582 read_memory (memaddr, myaddr, 4);
dd3b648e
RP
583 if (lval != NULL)
584 *lval = lval_memory;
585 if (actual_mem_addr != NULL)
17f7e032 586 *actual_mem_addr = memaddr;
dd3b648e
RP
587 }
588}
589
590/* Analogous to read_memory_integer
591 except the length is understood to be 4. */
592long
593read_register_stack_integer (memaddr, len)
594 CORE_ADDR memaddr;
595 int len;
596{
34df79fc
JK
597 char buf[4];
598 read_register_stack (memaddr, buf, NULL, NULL);
599 return extract_signed_integer (buf, 4);
dd3b648e
RP
600}
601
602/* Copy 4 bytes from GDB memory at MYADDR into inferior memory
603 at MEMADDR and put the actual address written into in
604 *ACTUAL_MEM_ADDR. */
605static void
606write_register_stack (memaddr, myaddr, actual_mem_addr)
607 CORE_ADDR memaddr;
608 char *myaddr;
609 CORE_ADDR *actual_mem_addr;
610{
611 long rfb = read_register (RFB_REGNUM);
612 long rsp = read_register (RSP_REGNUM);
d0b04c6a 613 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 614 if (memaddr >= rstack_high_address)
d0b04c6a
SG
615 {
616 /* It's in a register, but off the end of the stack. */
617 if (actual_mem_addr != NULL)
b9163d1a 618 *actual_mem_addr = 0;
d0b04c6a 619 }
8f86a4e4 620 else if (memaddr < rfb)
dd3b648e
RP
621 {
622 /* It's in a register. */
623 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
624 if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127)
625 error ("Attempt to read register stack out of range.");
626 if (myaddr != NULL)
627 write_register (regnum, *(long *)myaddr);
628 if (actual_mem_addr != NULL)
b9163d1a 629 *actual_mem_addr = 0;
dd3b648e
RP
630 }
631 else
632 {
633 /* It's in the memory portion of the register stack. */
634 if (myaddr != NULL)
635 write_memory (memaddr, myaddr, 4);
636 if (actual_mem_addr != NULL)
17f7e032 637 *actual_mem_addr = memaddr;
dd3b648e
RP
638 }
639}
640\f
641/* Find register number REGNUM relative to FRAME and put its
642 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
643 was optimized out (and thus can't be fetched). If the variable
644 was fetched from memory, set *ADDRP to where it was fetched from,
645 otherwise it was fetched from a register.
646
647 The argument RAW_BUFFER must point to aligned memory. */
648void
649get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lvalp)
650 char *raw_buffer;
651 int *optimized;
652 CORE_ADDR *addrp;
653 FRAME frame;
654 int regnum;
655 enum lval_type *lvalp;
656{
d0b04c6a 657 struct frame_info *fi;
dd3b648e
RP
658 CORE_ADDR addr;
659 enum lval_type lval;
660
d0b04c6a
SG
661 if (frame == 0)
662 return;
663
664 fi = get_frame_info (frame);
665
dd3b648e
RP
666 /* Once something has a register number, it doesn't get optimized out. */
667 if (optimized != NULL)
668 *optimized = 0;
669 if (regnum == RSP_REGNUM)
670 {
671 if (raw_buffer != NULL)
4d50f90a 672 {
968dca8d 673 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), fi->frame);
4d50f90a 674 }
dd3b648e
RP
675 if (lvalp != NULL)
676 *lvalp = not_lval;
677 return;
678 }
679 else if (regnum == PC_REGNUM)
680 {
681 if (raw_buffer != NULL)
4d50f90a 682 {
968dca8d 683 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), fi->pc);
4d50f90a 684 }
dd3b648e
RP
685
686 /* Not sure we have to do this. */
687 if (lvalp != NULL)
688 *lvalp = not_lval;
689
690 return;
691 }
692 else if (regnum == MSP_REGNUM)
693 {
694 if (raw_buffer != NULL)
695 {
696 if (fi->next != NULL)
4d50f90a 697 {
968dca8d 698 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
34df79fc 699 fi->next->saved_msp);
4d50f90a 700 }
dd3b648e 701 else
4d50f90a 702 read_register_gen (MSP_REGNUM, raw_buffer);
dd3b648e
RP
703 }
704 /* The value may have been computed, not fetched. */
705 if (lvalp != NULL)
706 *lvalp = not_lval;
707 return;
708 }
709 else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128)
710 {
711 /* These registers are not saved over procedure calls,
712 so just print out the current values. */
713 if (raw_buffer != NULL)
4d50f90a 714 read_register_gen (regnum, raw_buffer);
dd3b648e
RP
715 if (lvalp != NULL)
716 *lvalp = lval_register;
717 if (addrp != NULL)
718 *addrp = REGISTER_BYTE (regnum);
719 return;
720 }
721
722 addr = fi->frame + (regnum - LR0_REGNUM) * 4;
723 if (raw_buffer != NULL)
724 read_register_stack (addr, raw_buffer, &addr, &lval);
725 if (lvalp != NULL)
726 *lvalp = lval;
727 if (addrp != NULL)
728 *addrp = addr;
729}
730\f
d0b04c6a 731
dd3b648e
RP
732/* Discard from the stack the innermost frame,
733 restoring all saved registers. */
734
735void
736pop_frame ()
737{
738 FRAME frame = get_current_frame ();
739 struct frame_info *fi = get_frame_info (frame);
740 CORE_ADDR rfb = read_register (RFB_REGNUM);
741 CORE_ADDR gr1 = fi->frame + fi->rsize;
742 CORE_ADDR lr1;
eb5b74ca
JG
743 CORE_ADDR original_lr0;
744 int must_fix_lr0 = 0;
dd3b648e
RP
745 int i;
746
747 /* If popping a dummy frame, need to restore registers. */
748 if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM),
749 read_register (SP_REGNUM),
750 FRAME_FP (fi)))
751 {
d0b04c6a 752 int lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 753 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
754 write_register (SR_REGNUM (i + 128),read_register (lrnum++));
755 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
756 write_register (SR_REGNUM(i+160), read_register (lrnum++));
6093e5b0 757 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 758 write_register (RETURN_REGNUM + i, read_register (lrnum++));
eb5b74ca 759 /* Restore the PCs and prepare to restore LR0. */
d0b04c6a 760 write_register(PC_REGNUM, read_register (lrnum++));
eb5b74ca
JG
761 write_register(NPC_REGNUM, read_register (lrnum++));
762 write_register(PC2_REGNUM, read_register (lrnum++));
763 original_lr0 = read_register (lrnum++);
764 must_fix_lr0 = 1;
dd3b648e
RP
765 }
766
767 /* Restore the memory stack pointer. */
768 write_register (MSP_REGNUM, fi->saved_msp);
769 /* Restore the register stack pointer. */
770 write_register (GR1_REGNUM, gr1);
eb5b74ca
JG
771
772 /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */
773 if (must_fix_lr0)
774 write_register (LR0_REGNUM, original_lr0);
775
dd3b648e
RP
776 /* Check whether we need to fill registers. */
777 lr1 = read_register (LR0_REGNUM + 1);
778 if (lr1 > rfb)
779 {
780 /* Fill. */
781 int num_bytes = lr1 - rfb;
782 int i;
783 long word;
784 write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes);
785 write_register (RFB_REGNUM, lr1);
786 for (i = 0; i < num_bytes; i += 4)
787 {
788 /* Note: word is in host byte order. */
789 word = read_memory_integer (rfb + i, 4);
946f014b 790 write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word);
dd3b648e
RP
791 }
792 }
dd3b648e
RP
793 flush_cached_frames ();
794 set_current_frame (create_new_frame (0, read_pc()));
795}
796
797/* Push an empty stack frame, to record the current PC, etc. */
798
799void
800push_dummy_frame ()
801{
802 long w;
803 CORE_ADDR rab, gr1;
804 CORE_ADDR msp = read_register (MSP_REGNUM);
eb5b74ca
JG
805 int lrnum, i;
806 CORE_ADDR original_lr0;
807
808 /* Read original lr0 before changing gr1. This order isn't really needed
809 since GDB happens to have a snapshot of all the regs and doesn't toss
810 it when gr1 is changed. But it's The Right Thing To Do. */
811 original_lr0 = read_register (LR0_REGNUM);
dd3b648e 812
d0b04c6a 813 /* Allocate the new frame. */
dd3b648e
RP
814 gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE;
815 write_register (GR1_REGNUM, gr1);
816
817 rab = read_register (RAB_REGNUM);
818 if (gr1 < rab)
819 {
820 /* We need to spill registers. */
821 int num_bytes = rab - gr1;
822 CORE_ADDR rfb = read_register (RFB_REGNUM);
823 int i;
824 long word;
825
826 write_register (RFB_REGNUM, rfb - num_bytes);
827 write_register (RAB_REGNUM, gr1);
828 for (i = 0; i < num_bytes; i += 4)
829 {
830 /* Note: word is in target byte order. */
b9163d1a
SG
831 read_register_gen (LR0_REGNUM + i / 4, (char *) &word);
832 write_memory (rfb - num_bytes + i, (char *) &word, 4);
dd3b648e
RP
833 }
834 }
835
836 /* There are no arguments in to the dummy frame, so we don't need
837 more than rsize plus the return address and lr1. */
838 write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4);
839
840 /* Set the memory frame pointer. */
841 write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp);
842
843 /* Allocate arg_slop. */
844 write_register (MSP_REGNUM, msp - 16 * 4);
845
846 /* Save registers. */
d0b04c6a 847 lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 848 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
849 write_register (lrnum++, read_register (SR_REGNUM (i + 128)));
850 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
851 write_register (lrnum++, read_register (SR_REGNUM (i + 160)));
6093e5b0 852 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 853 write_register (lrnum++, read_register (RETURN_REGNUM + i));
eb5b74ca 854 /* Save the PCs and LR0. */
d0b04c6a 855 write_register (lrnum++, read_register (PC_REGNUM));
eb5b74ca
JG
856 write_register (lrnum++, read_register (NPC_REGNUM));
857 write_register (lrnum++, read_register (PC2_REGNUM));
ae682b80
JK
858
859 /* Why are we saving LR0? What would clobber it? (the dummy frame should
860 be below it on the register stack, no?). */
eb5b74ca 861 write_register (lrnum++, original_lr0);
d0b04c6a
SG
862}
863
eb5b74ca
JG
864
865
866/*
867 This routine takes three arguments and makes the cached frames look
868 as if these arguments defined a frame on the cache. This allows the
869 rest of `info frame' to extract the important arguments without much
870 difficulty. Since an individual frame on the 29K is determined by
871 three values (FP, PC, and MSP), we really need all three to do a
872 good job. */
873
874FRAME
875setup_arbitrary_frame (argc, argv)
876 int argc;
877 FRAME_ADDR *argv;
878{
879 FRAME fid;
880
881 if (argc != 3)
882 error ("AMD 29k frame specifications require three arguments: rsp pc msp");
883
884 fid = create_new_frame (argv[0], argv[1]);
885
886 if (!fid)
887 fatal ("internal: create_new_frame returned invalid frame id");
888
889 /* Creating a new frame munges the `frame' value from the current
890 GR1, so we restore it again here. FIXME, untangle all this
891 29K frame stuff... */
892 fid->frame = argv[0];
893
894 /* Our MSP is in argv[2]. It'd be intelligent if we could just
895 save this value in the FRAME. But the way it's set up (FIXME),
896 we must save our caller's MSP. We compute that by adding our
897 memory stack frame size to our MSP. */
898 fid->saved_msp = argv[2] + fid->msize;
899
900 return fid;
901}
902
903
904
ca0622e7
JK
905enum a29k_processor_types processor_type = a29k_unknown;
906
907void
908a29k_get_processor_type ()
909{
910 unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM);
911
912 /* Most of these don't have freeze mode. */
913 processor_type = a29k_no_freeze_mode;
914
915 switch ((cfg_reg >> 28) & 0xf)
916 {
917 case 0:
199b2450 918 fprintf_filtered (gdb_stderr, "Remote debugging an Am29000");
ca0622e7
JK
919 break;
920 case 1:
199b2450 921 fprintf_filtered (gdb_stderr, "Remote debugging an Am29005");
ca0622e7
JK
922 break;
923 case 2:
199b2450 924 fprintf_filtered (gdb_stderr, "Remote debugging an Am29050");
ca0622e7
JK
925 processor_type = a29k_freeze_mode;
926 break;
927 case 3:
199b2450 928 fprintf_filtered (gdb_stderr, "Remote debugging an Am29035");
ca0622e7
JK
929 break;
930 case 4:
199b2450 931 fprintf_filtered (gdb_stderr, "Remote debugging an Am29030");
ca0622e7
JK
932 break;
933 case 5:
199b2450 934 fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*");
ca0622e7
JK
935 break;
936 case 6:
199b2450 937 fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*");
ca0622e7
JK
938 break;
939 case 7:
199b2450 940 fprintf_filtered (gdb_stderr, "Remote debugging an Am29040");
ca0622e7
JK
941 break;
942 default:
199b2450 943 fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n");
ca0622e7
JK
944 /* Don't bother to print the revision. */
945 return;
946 }
199b2450 947 fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f));
ca0622e7 948}
946f014b 949
d0b04c6a
SG
950void
951_initialize_29k()
952{
34517ebc
JG
953 extern CORE_ADDR text_end;
954
8f86a4e4
JG
955 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
956 add_show_from_set
957 (add_set_cmd ("rstack_high_address", class_support, var_uinteger,
958 (char *)&rstack_high_address,
959 "Set top address in memory of the register stack.\n\
960Attempts to access registers saved above this address will be ignored\n\
961or will produce the value -1.", &setlist),
962 &showlist);
34517ebc
JG
963
964 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
965 add_show_from_set
966 (add_set_cmd ("call_scratch_address", class_support, var_uinteger,
967 (char *)&text_end,
19327ea5
JG
968"Set address in memory where small amounts of RAM can be used\n\
969when making function calls into the inferior.", &setlist),
34517ebc 970 &showlist);
8f86a4e4 971}
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