CARP: --enable-build-warnings=-Werror: Fix problems stopping GDB being
[deliverable/binutils-gdb.git] / gdb / a29k-tdep.c
CommitLineData
dd3b648e 1/* Target-machine dependent code for the AMD 29000
18b46e7c
SS
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995
3 Free Software Foundation, Inc.
dd3b648e
RP
4 Contributed by Cygnus Support. Written by Jim Kingdon.
5
6This file is part of GDB.
7
8This program is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
99a7de40
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
dd3b648e
RP
12
13This program is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
99a7de40 19along with this program; if not, write to the Free Software
6c9638b4 20Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
dd3b648e
RP
21
22#include "defs.h"
23#include "gdbcore.h"
dd3b648e
RP
24#include "frame.h"
25#include "value.h"
dd3b648e
RP
26#include "symtab.h"
27#include "inferior.h"
8f86a4e4 28#include "gdbcmd.h"
dd3b648e 29
946f014b
JG
30/* If all these bits in an instruction word are zero, it is a "tag word"
31 which precedes a function entry point and gives stack traceback info.
32 This used to be defined as 0xff000000, but that treated 0x00000deb as
33 a tag word, while it is really used as a breakpoint. */
34#define TAGWORD_ZERO_MASK 0xff00f800
35
7730bd5a
JG
36extern CORE_ADDR text_start; /* FIXME, kludge... */
37
8f86a4e4
JG
38/* The user-settable top of the register stack in virtual memory. We
39 won't attempt to access any stored registers above this address, if set
40 nonzero. */
41
42static CORE_ADDR rstack_high_address = UINT_MAX;
43
98760eab
AC
44
45/* Should call_function allocate stack space for a struct return? */
46/* On the a29k objects over 16 words require the caller to allocate space. */
47int
48a29k_use_struct_convention (gcc_p, type)
49 int gcc_p;
50 struct type *type;
51{
52 return (TYPE_LENGTH (type) > 16 * 4);
53}
54
55
dd3b648e 56/* Structure to hold cached info about function prologues. */
669caa9c 57
dd3b648e
RP
58struct prologue_info
59{
60 CORE_ADDR pc; /* First addr after fn prologue */
61 unsigned rsize, msize; /* register stack frame size, mem stack ditto */
62 unsigned mfp_used : 1; /* memory frame pointer used */
63 unsigned rsize_valid : 1; /* Validity bits for the above */
64 unsigned msize_valid : 1;
65 unsigned mfp_valid : 1;
66};
67
68/* Examine the prologue of a function which starts at PC. Return
69 the first addess past the prologue. If MSIZE is non-NULL, then
70 set *MSIZE to the memory stack frame size. If RSIZE is non-NULL,
71 then set *RSIZE to the register stack frame size (not including
72 incoming arguments and the return address & frame pointer stored
73 with them). If no prologue is found, *RSIZE is set to zero.
74 If no prologue is found, or a prologue which doesn't involve
75 allocating a memory stack frame, then set *MSIZE to zero.
76
77 Note that both msize and rsize are in bytes. This is not consistent
78 with the _User's Manual_ with respect to rsize, but it is much more
79 convenient.
80
81 If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory
82 frame pointer is being used. */
669caa9c 83
dd3b648e
RP
84CORE_ADDR
85examine_prologue (pc, rsize, msize, mfp_used)
86 CORE_ADDR pc;
87 unsigned *msize;
88 unsigned *rsize;
89 int *mfp_used;
90{
91 long insn;
92 CORE_ADDR p = pc;
1ab3bf1b 93 struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc);
dd3b648e
RP
94 struct prologue_info *mi = 0;
95
1ab3bf1b 96 if (msymbol != NULL)
07df4831 97 mi = (struct prologue_info *) msymbol -> info;
dd3b648e
RP
98
99 if (mi != 0)
100 {
101 int valid = 1;
102 if (rsize != NULL)
103 {
104 *rsize = mi->rsize;
105 valid &= mi->rsize_valid;
106 }
107 if (msize != NULL)
108 {
109 *msize = mi->msize;
110 valid &= mi->msize_valid;
111 }
112 if (mfp_used != NULL)
113 {
114 *mfp_used = mi->mfp_used;
115 valid &= mi->mfp_valid;
116 }
117 if (valid)
118 return mi->pc;
119 }
120
121 if (rsize != NULL)
122 *rsize = 0;
123 if (msize != NULL)
124 *msize = 0;
125 if (mfp_used != NULL)
126 *mfp_used = 0;
127
128 /* Prologue must start with subtracting a constant from gr1.
129 Normally this is sub gr1,gr1,<rsize * 4>. */
130 insn = read_memory_integer (p, 4);
131 if ((insn & 0xffffff00) != 0x25010100)
132 {
133 /* If the frame is large, instead of a single instruction it
134 might be a pair of instructions:
135 const <reg>, <rsize * 4>
136 sub gr1,gr1,<reg>
137 */
138 int reg;
139 /* Possible value for rsize. */
140 unsigned int rsize0;
141
142 if ((insn & 0xff000000) != 0x03000000)
143 {
144 p = pc;
145 goto done;
146 }
147 reg = (insn >> 8) & 0xff;
148 rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff));
149 p += 4;
150 insn = read_memory_integer (p, 4);
151 if ((insn & 0xffffff00) != 0x24010100
152 || (insn & 0xff) != reg)
153 {
154 p = pc;
155 goto done;
156 }
157 if (rsize != NULL)
158 *rsize = rsize0;
159 }
160 else
161 {
162 if (rsize != NULL)
163 *rsize = (insn & 0xff);
164 }
165 p += 4;
166
7b2bcbf5 167 /* Next instruction ought to be asgeu V_SPILL,gr1,rab.
d0b04c6a
SG
168 * We don't check the vector number to allow for kernel debugging. The
169 * kernel will use a different trap number.
7b2bcbf5
JG
170 * If this insn is missing, we just keep going; Metaware R2.3u compiler
171 * generates prologue that intermixes initializations and puts the asgeu
172 * way down.
d0b04c6a 173 */
dd3b648e 174 insn = read_memory_integer (p, 4);
7b2bcbf5 175 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
dd3b648e 176 {
7b2bcbf5 177 p += 4;
dd3b648e 178 }
dd3b648e
RP
179
180 /* Next instruction usually sets the frame pointer (lr1) by adding
181 <size * 4> from gr1. However, this can (and high C does) be
182 deferred until anytime before the first function call. So it is
d0b04c6a
SG
183 OK if we don't see anything which sets lr1.
184 To allow for alternate register sets (gcc -mkernel-registers) the msp
185 register number is a compile time constant. */
186
dd3b648e
RP
187 /* Normally this is just add lr1,gr1,<size * 4>. */
188 insn = read_memory_integer (p, 4);
189 if ((insn & 0xffffff00) == 0x15810100)
190 p += 4;
191 else
192 {
193 /* However, for large frames it can be
194 const <reg>, <size *4>
195 add lr1,gr1,<reg>
196 */
197 int reg;
198 CORE_ADDR q;
199
200 if ((insn & 0xff000000) == 0x03000000)
201 {
202 reg = (insn >> 8) & 0xff;
203 q = p + 4;
204 insn = read_memory_integer (q, 4);
205 if ((insn & 0xffffff00) == 0x14810100
206 && (insn & 0xff) == reg)
207 p = q;
208 }
209 }
210
211 /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory
212 frame pointer is in use. We just check for add lr<anything>,msp,0;
213 we don't check this rsize against the first instruction, and
214 we don't check that the trace-back tag indicates a memory frame pointer
215 is in use.
d0b04c6a
SG
216 To allow for alternate register sets (gcc -mkernel-registers) the msp
217 register number is a compile time constant.
dd3b648e
RP
218
219 The recommended instruction is actually "sll lr<whatever>,msp,0".
220 We check for that, too. Originally Jim Kingdon's code seemed
221 to be looking for a "sub" instruction here, but the mask was set
222 up to lose all the time. */
223 insn = read_memory_integer (p, 4);
d0b04c6a
SG
224 if (((insn & 0xff80ffff) == (0x15800000|(MSP_HW_REGNUM<<8))) /* add */
225 || ((insn & 0xff80ffff) == (0x81800000|(MSP_HW_REGNUM<<8)))) /* sll */
dd3b648e
RP
226 {
227 p += 4;
228 if (mfp_used != NULL)
229 *mfp_used = 1;
230 }
231
232 /* Next comes a subtraction from msp to allocate a memory frame,
233 but only if a memory frame is
234 being used. We don't check msize against the trace-back tag.
235
d0b04c6a
SG
236 To allow for alternate register sets (gcc -mkernel-registers) the msp
237 register number is a compile time constant.
238
dd3b648e
RP
239 Normally this is just
240 sub msp,msp,<msize>
241 */
242 insn = read_memory_integer (p, 4);
d0b04c6a
SG
243 if ((insn & 0xffffff00) ==
244 (0x25000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8)))
dd3b648e
RP
245 {
246 p += 4;
d0b04c6a 247 if (msize != NULL)
dd3b648e
RP
248 *msize = insn & 0xff;
249 }
250 else
251 {
252 /* For large frames, instead of a single instruction it might
253 be
254
255 const <reg>, <msize>
256 consth <reg>, <msize> ; optional
257 sub msp,msp,<reg>
258 */
259 int reg;
260 unsigned msize0;
261 CORE_ADDR q = p;
262
263 if ((insn & 0xff000000) == 0x03000000)
264 {
265 reg = (insn >> 8) & 0xff;
266 msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff);
267 q += 4;
268 insn = read_memory_integer (q, 4);
269 /* Check for consth. */
270 if ((insn & 0xff000000) == 0x02000000
271 && (insn & 0x0000ff00) == reg)
272 {
273 msize0 |= (insn << 8) & 0xff000000;
274 msize0 |= (insn << 16) & 0x00ff0000;
275 q += 4;
276 insn = read_memory_integer (q, 4);
277 }
278 /* Check for sub msp,msp,<reg>. */
d0b04c6a
SG
279 if ((insn & 0xffffff00) ==
280 (0x24000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8))
dd3b648e
RP
281 && (insn & 0xff) == reg)
282 {
283 p = q + 4;
284 if (msize != NULL)
285 *msize = msize0;
286 }
287 }
288 }
289
7b2bcbf5
JG
290 /* Next instruction might be asgeu V_SPILL,gr1,rab.
291 * We don't check the vector number to allow for kernel debugging. The
292 * kernel will use a different trap number.
293 * Metaware R2.3u compiler
294 * generates prologue that intermixes initializations and puts the asgeu
295 * way down after everything else.
296 */
297 insn = read_memory_integer (p, 4);
298 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
299 {
300 p += 4;
301 }
302
dd3b648e 303 done:
1ab3bf1b 304 if (msymbol != NULL)
dd3b648e
RP
305 {
306 if (mi == 0)
307 {
308 /* Add a new cache entry. */
309 mi = (struct prologue_info *)xmalloc (sizeof (struct prologue_info));
07df4831 310 msymbol -> info = (char *)mi;
dd3b648e
RP
311 mi->rsize_valid = 0;
312 mi->msize_valid = 0;
313 mi->mfp_valid = 0;
314 }
315 /* else, cache entry exists, but info is incomplete. */
316 mi->pc = p;
317 if (rsize != NULL)
318 {
319 mi->rsize = *rsize;
320 mi->rsize_valid = 1;
321 }
322 if (msize != NULL)
323 {
324 mi->msize = *msize;
325 mi->msize_valid = 1;
326 }
327 if (mfp_used != NULL)
328 {
329 mi->mfp_used = *mfp_used;
330 mi->mfp_valid = 1;
331 }
332 }
333 return p;
334}
335
336/* Advance PC across any function entry prologue instructions
337 to reach some "real" code. */
338
339CORE_ADDR
340skip_prologue (pc)
341 CORE_ADDR pc;
342{
669caa9c 343 return examine_prologue (pc, NULL, NULL, NULL);
dd3b648e 344}
669caa9c 345
d0b04c6a
SG
346/*
347 * Examine the one or two word tag at the beginning of a function.
348 * The tag word is expect to be at 'p', if it is not there, we fail
349 * by returning 0. The documentation for the tag word was taken from
350 * page 7-15 of the 29050 User's Manual. We are assuming that the
351 * m bit is in bit 22 of the tag word, which seems to be the agreed upon
352 * convention today (1/15/92).
353 * msize is return in bytes.
354 */
669caa9c 355
d0b04c6a 356static int /* 0/1 - failure/success of finding the tag word */
669caa9c 357examine_tag (p, is_trans, argcount, msize, mfp_used)
d0b04c6a
SG
358 CORE_ADDR p;
359 int *is_trans;
669caa9c 360 int *argcount;
d0b04c6a
SG
361 unsigned *msize;
362 int *mfp_used;
363{
364 unsigned int tag1, tag2;
365
366 tag1 = read_memory_integer (p, 4);
946f014b 367 if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */
d0b04c6a
SG
368 return 0;
369 if (tag1 & (1<<23)) /* A two word tag */
370 {
48855ed5 371 tag2 = read_memory_integer (p-4, 4);
d0b04c6a 372 if (msize)
48855ed5 373 *msize = tag2 * 2;
d0b04c6a
SG
374 }
375 else /* A one word tag */
376 {
377 if (msize)
378 *msize = tag1 & 0x7ff;
379 }
380 if (is_trans)
7f2ffa58
JK
381 *is_trans = ((tag1 & (1<<21)) ? 1 : 0);
382 /* Note that this includes the frame pointer and the return address
383 register, so the actual number of registers of arguments is two less.
384 argcount can be zero, however, sometimes, for strange assembler
385 routines. */
d0b04c6a
SG
386 if (argcount)
387 *argcount = (tag1 >> 16) & 0x1f;
388 if (mfp_used)
389 *mfp_used = ((tag1 & (1<<22)) ? 1 : 0);
669caa9c 390 return 1;
d0b04c6a 391}
dd3b648e
RP
392
393/* Initialize the frame. In addition to setting "extra" frame info,
394 we also set ->frame because we use it in a nonstandard way, and ->pc
395 because we need to know it to get the other stuff. See the diagram
d7d35f00 396 of stacks and the frame cache in tm-a29k.h for more detail. */
669caa9c 397
dd3b648e 398static void
669caa9c 399init_frame_info (innermost_frame, frame)
dd3b648e 400 int innermost_frame;
669caa9c 401 struct frame_info *frame;
dd3b648e
RP
402{
403 CORE_ADDR p;
404 long insn;
405 unsigned rsize;
406 unsigned msize;
d0b04c6a 407 int mfp_used, trans;
dd3b648e
RP
408 struct symbol *func;
409
669caa9c 410 p = frame->pc;
dd3b648e
RP
411
412 if (innermost_frame)
669caa9c 413 frame->frame = read_register (GR1_REGNUM);
dd3b648e 414 else
669caa9c 415 frame->frame = frame->next->frame + frame->next->rsize;
dd3b648e 416
161520dc 417#if 0 /* CALL_DUMMY_LOCATION == ON_STACK */
dd3b648e
RP
418 This wont work;
419#else
420 if (PC_IN_CALL_DUMMY (p, 0, 0))
421#endif
422 {
669caa9c 423 frame->rsize = DUMMY_FRAME_RSIZE;
dd3b648e
RP
424 /* This doesn't matter since we never try to get locals or args
425 from a dummy frame. */
669caa9c 426 frame->msize = 0;
dd3b648e 427 /* Dummy frames always use a memory frame pointer. */
669caa9c
SS
428 frame->saved_msp =
429 read_register_stack_integer (frame->frame + DUMMY_FRAME_RSIZE - 4, 4);
c8623080 430 frame->flags |= (TRANSPARENT_FRAME|MFP_USED);
dd3b648e
RP
431 return;
432 }
433
434 func = find_pc_function (p);
435 if (func != NULL)
436 p = BLOCK_START (SYMBOL_BLOCK_VALUE (func));
437 else
438 {
439 /* Search backward to find the trace-back tag. However,
440 do not trace back beyond the start of the text segment
441 (just as a sanity check to avoid going into never-never land). */
63dcc380 442#if 1
dd3b648e 443 while (p >= text_start
946f014b 444 && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0)
dd3b648e 445 p -= 4;
63dcc380
JK
446#else /* 0 */
447 char pat[4] = {0, 0, 0, 0};
448 char mask[4];
449 char insn_raw[4];
450 store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK);
451 /* Enable this once target_search is enabled and tested. */
452 target_search (4, pat, mask, p, -4, text_start, p+1, &p, &insn_raw);
453 insn = extract_unsigned_integer (insn_raw, 4);
454#endif /* 0 */
455
dd3b648e
RP
456 if (p < text_start)
457 {
458 /* Couldn't find the trace-back tag.
459 Something strange is going on. */
669caa9c
SS
460 frame->saved_msp = 0;
461 frame->rsize = 0;
462 frame->msize = 0;
c8623080 463 frame->flags = TRANSPARENT_FRAME;
dd3b648e
RP
464 return;
465 }
466 else
467 /* Advance to the first word of the function, i.e. the word
468 after the trace-back tag. */
469 p += 4;
470 }
eb5b74ca 471
d0b04c6a 472 /* We've found the start of the function.
eb5b74ca
JG
473 Try looking for a tag word that indicates whether there is a
474 memory frame pointer and what the memory stack allocation is.
475 If one doesn't exist, try using a more exhaustive search of
476 the prologue. */
477
478 if (examine_tag(p-4,&trans,(int *)NULL,&msize,&mfp_used)) /* Found good tag */
d0b04c6a
SG
479 examine_prologue (p, &rsize, 0, 0);
480 else /* No tag try prologue */
481 examine_prologue (p, &rsize, &msize, &mfp_used);
482
669caa9c
SS
483 frame->rsize = rsize;
484 frame->msize = msize;
485 frame->flags = 0;
d0b04c6a 486 if (mfp_used)
669caa9c 487 frame->flags |= MFP_USED;
d0b04c6a 488 if (trans)
c8623080 489 frame->flags |= TRANSPARENT_FRAME;
dd3b648e
RP
490 if (innermost_frame)
491 {
669caa9c 492 frame->saved_msp = read_register (MSP_REGNUM) + msize;
dd3b648e
RP
493 }
494 else
495 {
496 if (mfp_used)
669caa9c
SS
497 frame->saved_msp =
498 read_register_stack_integer (frame->frame + rsize - 4, 4);
dd3b648e 499 else
669caa9c 500 frame->saved_msp = frame->next->saved_msp + msize;
dd3b648e
RP
501 }
502}
503
504void
669caa9c
SS
505init_extra_frame_info (frame)
506 struct frame_info *frame;
dd3b648e 507{
669caa9c 508 if (frame->next == 0)
dd3b648e
RP
509 /* Assume innermost frame. May produce strange results for "info frame"
510 but there isn't any way to tell the difference. */
669caa9c 511 init_frame_info (1, frame);
17f7e032
JG
512 else {
513 /* We're in get_prev_frame_info.
514 Take care of everything in init_frame_pc. */
515 ;
516 }
dd3b648e
RP
517}
518
519void
669caa9c 520init_frame_pc (fromleaf, frame)
dd3b648e 521 int fromleaf;
669caa9c 522 struct frame_info *frame;
dd3b648e 523{
669caa9c
SS
524 frame->pc = (fromleaf ? SAVED_PC_AFTER_CALL (frame->next) :
525 frame->next ? FRAME_SAVED_PC (frame->next) : read_pc ());
526 init_frame_info (fromleaf, frame);
dd3b648e
RP
527}
528\f
529/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
530 offsets being relative to the memory stack pointer (high C) or
531 saved_msp (gcc). */
532
533CORE_ADDR
534frame_locals_address (fi)
535 struct frame_info *fi;
536{
d0b04c6a 537 if (fi->flags & MFP_USED)
dd3b648e
RP
538 return fi->saved_msp;
539 else
540 return fi->saved_msp - fi->msize;
541}
542\f
543/* Routines for reading the register stack. The caller gets to treat
544 the register stack as a uniform stack in memory, from address $gr1
545 straight through $rfb and beyond. */
546
547/* Analogous to read_memory except the length is understood to be 4.
548 Also, myaddr can be NULL (meaning don't bother to read), and
549 if actual_mem_addr is non-NULL, store there the address that it
550 was fetched from (or if from a register the offset within
551 registers). Set *LVAL to lval_memory or lval_register, depending
4d50f90a
JK
552 on where it came from. The contents written into MYADDR are in
553 target format. */
dd3b648e
RP
554void
555read_register_stack (memaddr, myaddr, actual_mem_addr, lval)
556 CORE_ADDR memaddr;
557 char *myaddr;
558 CORE_ADDR *actual_mem_addr;
559 enum lval_type *lval;
560{
561 long rfb = read_register (RFB_REGNUM);
562 long rsp = read_register (RSP_REGNUM);
d0b04c6a 563
d0b04c6a 564 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 565 if (memaddr >= rstack_high_address)
d0b04c6a 566 {
4d50f90a 567 /* a bogus value */
85494909 568 static char val[] = {~0, ~0, ~0, ~0};
d0b04c6a
SG
569 /* It's in a local register, but off the end of the stack. */
570 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
571 if (myaddr != NULL)
4d50f90a
JK
572 {
573 /* Provide bogusness */
574 memcpy (myaddr, val, 4);
575 }
576 supply_register(regnum, val); /* More bogusness */
d0b04c6a
SG
577 if (lval != NULL)
578 *lval = lval_register;
579 if (actual_mem_addr != NULL)
580 *actual_mem_addr = REGISTER_BYTE (regnum);
581 }
946f014b
JG
582 /* If it's in the part of the register stack that's in real registers,
583 get the value from the registers. If it's anywhere else in memory
584 (e.g. in another thread's saved stack), skip this part and get
585 it from real live memory. */
586 else if (memaddr < rfb && memaddr >= rsp)
dd3b648e
RP
587 {
588 /* It's in a register. */
589 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
946f014b 590 if (regnum > LR0_REGNUM + 127)
dd3b648e
RP
591 error ("Attempt to read register stack out of range.");
592 if (myaddr != NULL)
593 read_register_gen (regnum, myaddr);
594 if (lval != NULL)
595 *lval = lval_register;
596 if (actual_mem_addr != NULL)
597 *actual_mem_addr = REGISTER_BYTE (regnum);
598 }
599 else
600 {
601 /* It's in the memory portion of the register stack. */
d0b04c6a 602 if (myaddr != NULL)
4d50f90a 603 read_memory (memaddr, myaddr, 4);
dd3b648e
RP
604 if (lval != NULL)
605 *lval = lval_memory;
606 if (actual_mem_addr != NULL)
17f7e032 607 *actual_mem_addr = memaddr;
dd3b648e
RP
608 }
609}
610
611/* Analogous to read_memory_integer
612 except the length is understood to be 4. */
613long
614read_register_stack_integer (memaddr, len)
615 CORE_ADDR memaddr;
616 int len;
617{
34df79fc
JK
618 char buf[4];
619 read_register_stack (memaddr, buf, NULL, NULL);
620 return extract_signed_integer (buf, 4);
dd3b648e
RP
621}
622
623/* Copy 4 bytes from GDB memory at MYADDR into inferior memory
624 at MEMADDR and put the actual address written into in
625 *ACTUAL_MEM_ADDR. */
626static void
627write_register_stack (memaddr, myaddr, actual_mem_addr)
628 CORE_ADDR memaddr;
629 char *myaddr;
630 CORE_ADDR *actual_mem_addr;
631{
632 long rfb = read_register (RFB_REGNUM);
633 long rsp = read_register (RSP_REGNUM);
d0b04c6a 634 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 635 if (memaddr >= rstack_high_address)
d0b04c6a
SG
636 {
637 /* It's in a register, but off the end of the stack. */
638 if (actual_mem_addr != NULL)
b9163d1a 639 *actual_mem_addr = 0;
d0b04c6a 640 }
8f86a4e4 641 else if (memaddr < rfb)
dd3b648e
RP
642 {
643 /* It's in a register. */
644 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
645 if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127)
646 error ("Attempt to read register stack out of range.");
647 if (myaddr != NULL)
648 write_register (regnum, *(long *)myaddr);
649 if (actual_mem_addr != NULL)
b9163d1a 650 *actual_mem_addr = 0;
dd3b648e
RP
651 }
652 else
653 {
654 /* It's in the memory portion of the register stack. */
655 if (myaddr != NULL)
656 write_memory (memaddr, myaddr, 4);
657 if (actual_mem_addr != NULL)
17f7e032 658 *actual_mem_addr = memaddr;
dd3b648e
RP
659 }
660}
661\f
662/* Find register number REGNUM relative to FRAME and put its
663 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
664 was optimized out (and thus can't be fetched). If the variable
665 was fetched from memory, set *ADDRP to where it was fetched from,
666 otherwise it was fetched from a register.
667
668 The argument RAW_BUFFER must point to aligned memory. */
669caa9c 669
dd3b648e
RP
670void
671get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lvalp)
672 char *raw_buffer;
673 int *optimized;
674 CORE_ADDR *addrp;
669caa9c 675 struct frame_info *frame;
dd3b648e
RP
676 int regnum;
677 enum lval_type *lvalp;
678{
d0b04c6a 679 struct frame_info *fi;
dd3b648e
RP
680 CORE_ADDR addr;
681 enum lval_type lval;
682
888a18ee
JK
683 if (!target_has_registers)
684 error ("No registers.");
685
686 /* Probably now redundant with the target_has_registers check. */
d0b04c6a
SG
687 if (frame == 0)
688 return;
689
dd3b648e
RP
690 /* Once something has a register number, it doesn't get optimized out. */
691 if (optimized != NULL)
692 *optimized = 0;
693 if (regnum == RSP_REGNUM)
694 {
695 if (raw_buffer != NULL)
4d50f90a 696 {
669caa9c 697 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
4d50f90a 698 }
dd3b648e
RP
699 if (lvalp != NULL)
700 *lvalp = not_lval;
701 return;
702 }
48b497ed 703 else if (regnum == PC_REGNUM && frame->next != NULL)
dd3b648e
RP
704 {
705 if (raw_buffer != NULL)
4d50f90a 706 {
669caa9c 707 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc);
4d50f90a 708 }
dd3b648e
RP
709
710 /* Not sure we have to do this. */
711 if (lvalp != NULL)
712 *lvalp = not_lval;
713
714 return;
715 }
716 else if (regnum == MSP_REGNUM)
717 {
718 if (raw_buffer != NULL)
719 {
669caa9c 720 if (frame->next != NULL)
4d50f90a 721 {
968dca8d 722 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
669caa9c 723 frame->next->saved_msp);
4d50f90a 724 }
dd3b648e 725 else
4d50f90a 726 read_register_gen (MSP_REGNUM, raw_buffer);
dd3b648e
RP
727 }
728 /* The value may have been computed, not fetched. */
729 if (lvalp != NULL)
730 *lvalp = not_lval;
731 return;
732 }
733 else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128)
734 {
735 /* These registers are not saved over procedure calls,
736 so just print out the current values. */
737 if (raw_buffer != NULL)
4d50f90a 738 read_register_gen (regnum, raw_buffer);
dd3b648e
RP
739 if (lvalp != NULL)
740 *lvalp = lval_register;
741 if (addrp != NULL)
742 *addrp = REGISTER_BYTE (regnum);
743 return;
744 }
745
669caa9c 746 addr = frame->frame + (regnum - LR0_REGNUM) * 4;
dd3b648e
RP
747 if (raw_buffer != NULL)
748 read_register_stack (addr, raw_buffer, &addr, &lval);
749 if (lvalp != NULL)
750 *lvalp = lval;
751 if (addrp != NULL)
752 *addrp = addr;
753}
754\f
d0b04c6a 755
dd3b648e
RP
756/* Discard from the stack the innermost frame,
757 restoring all saved registers. */
758
759void
760pop_frame ()
761{
669caa9c
SS
762 struct frame_info *frame = get_current_frame ();
763 CORE_ADDR rfb = read_register (RFB_REGNUM);
b6c15646 764 CORE_ADDR gr1 = frame->frame + frame->rsize;
dd3b648e 765 CORE_ADDR lr1;
eb5b74ca
JG
766 CORE_ADDR original_lr0;
767 int must_fix_lr0 = 0;
dd3b648e
RP
768 int i;
769
770 /* If popping a dummy frame, need to restore registers. */
771 if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM),
772 read_register (SP_REGNUM),
669caa9c 773 FRAME_FP (frame)))
dd3b648e 774 {
d0b04c6a 775 int lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 776 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
777 write_register (SR_REGNUM (i + 128),read_register (lrnum++));
778 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
779 write_register (SR_REGNUM(i+160), read_register (lrnum++));
6093e5b0 780 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 781 write_register (RETURN_REGNUM + i, read_register (lrnum++));
eb5b74ca 782 /* Restore the PCs and prepare to restore LR0. */
d0b04c6a 783 write_register(PC_REGNUM, read_register (lrnum++));
eb5b74ca
JG
784 write_register(NPC_REGNUM, read_register (lrnum++));
785 write_register(PC2_REGNUM, read_register (lrnum++));
786 original_lr0 = read_register (lrnum++);
787 must_fix_lr0 = 1;
dd3b648e
RP
788 }
789
790 /* Restore the memory stack pointer. */
669caa9c 791 write_register (MSP_REGNUM, frame->saved_msp);
dd3b648e
RP
792 /* Restore the register stack pointer. */
793 write_register (GR1_REGNUM, gr1);
eb5b74ca
JG
794
795 /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */
796 if (must_fix_lr0)
797 write_register (LR0_REGNUM, original_lr0);
798
dd3b648e
RP
799 /* Check whether we need to fill registers. */
800 lr1 = read_register (LR0_REGNUM + 1);
801 if (lr1 > rfb)
802 {
803 /* Fill. */
804 int num_bytes = lr1 - rfb;
805 int i;
669caa9c
SS
806 long word;
807
dd3b648e
RP
808 write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes);
809 write_register (RFB_REGNUM, lr1);
810 for (i = 0; i < num_bytes; i += 4)
811 {
812 /* Note: word is in host byte order. */
813 word = read_memory_integer (rfb + i, 4);
946f014b 814 write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word);
dd3b648e
RP
815 }
816 }
dd3b648e 817 flush_cached_frames ();
dd3b648e
RP
818}
819
820/* Push an empty stack frame, to record the current PC, etc. */
821
822void
823push_dummy_frame ()
824{
825 long w;
826 CORE_ADDR rab, gr1;
827 CORE_ADDR msp = read_register (MSP_REGNUM);
eb5b74ca
JG
828 int lrnum, i;
829 CORE_ADDR original_lr0;
830
831 /* Read original lr0 before changing gr1. This order isn't really needed
832 since GDB happens to have a snapshot of all the regs and doesn't toss
833 it when gr1 is changed. But it's The Right Thing To Do. */
834 original_lr0 = read_register (LR0_REGNUM);
dd3b648e 835
d0b04c6a 836 /* Allocate the new frame. */
dd3b648e
RP
837 gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE;
838 write_register (GR1_REGNUM, gr1);
839
161520dc
KH
840#ifdef VXWORKS_TARGET
841 /* We force re-reading all registers to get the new local registers set
842 after gr1 has been modified. This fix is due to the lack of single
843 register read/write operation in the RPC interface between VxGDB and
844 VxWorks. This really must be changed ! */
845
846 vx_read_register (-1);
847
848#endif /* VXWORK_TARGET */
849
dd3b648e
RP
850 rab = read_register (RAB_REGNUM);
851 if (gr1 < rab)
852 {
853 /* We need to spill registers. */
854 int num_bytes = rab - gr1;
855 CORE_ADDR rfb = read_register (RFB_REGNUM);
856 int i;
857 long word;
858
859 write_register (RFB_REGNUM, rfb - num_bytes);
860 write_register (RAB_REGNUM, gr1);
861 for (i = 0; i < num_bytes; i += 4)
862 {
863 /* Note: word is in target byte order. */
b9163d1a
SG
864 read_register_gen (LR0_REGNUM + i / 4, (char *) &word);
865 write_memory (rfb - num_bytes + i, (char *) &word, 4);
dd3b648e
RP
866 }
867 }
868
869 /* There are no arguments in to the dummy frame, so we don't need
870 more than rsize plus the return address and lr1. */
871 write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4);
872
873 /* Set the memory frame pointer. */
874 write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp);
875
876 /* Allocate arg_slop. */
877 write_register (MSP_REGNUM, msp - 16 * 4);
878
879 /* Save registers. */
d0b04c6a 880 lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 881 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
882 write_register (lrnum++, read_register (SR_REGNUM (i + 128)));
883 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
884 write_register (lrnum++, read_register (SR_REGNUM (i + 160)));
6093e5b0 885 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 886 write_register (lrnum++, read_register (RETURN_REGNUM + i));
eb5b74ca 887 /* Save the PCs and LR0. */
d0b04c6a 888 write_register (lrnum++, read_register (PC_REGNUM));
eb5b74ca
JG
889 write_register (lrnum++, read_register (NPC_REGNUM));
890 write_register (lrnum++, read_register (PC2_REGNUM));
ae682b80
JK
891
892 /* Why are we saving LR0? What would clobber it? (the dummy frame should
893 be below it on the register stack, no?). */
eb5b74ca 894 write_register (lrnum++, original_lr0);
d0b04c6a
SG
895}
896
eb5b74ca
JG
897
898
899/*
900 This routine takes three arguments and makes the cached frames look
901 as if these arguments defined a frame on the cache. This allows the
902 rest of `info frame' to extract the important arguments without much
903 difficulty. Since an individual frame on the 29K is determined by
904 three values (FP, PC, and MSP), we really need all three to do a
905 good job. */
906
669caa9c 907struct frame_info *
eb5b74ca
JG
908setup_arbitrary_frame (argc, argv)
909 int argc;
669caa9c 910 CORE_ADDR *argv;
eb5b74ca 911{
669caa9c 912 struct frame_info *frame;
eb5b74ca
JG
913
914 if (argc != 3)
915 error ("AMD 29k frame specifications require three arguments: rsp pc msp");
916
669caa9c 917 frame = create_new_frame (argv[0], argv[1]);
eb5b74ca 918
669caa9c 919 if (!frame)
eb5b74ca
JG
920 fatal ("internal: create_new_frame returned invalid frame id");
921
922 /* Creating a new frame munges the `frame' value from the current
923 GR1, so we restore it again here. FIXME, untangle all this
924 29K frame stuff... */
669caa9c 925 frame->frame = argv[0];
eb5b74ca
JG
926
927 /* Our MSP is in argv[2]. It'd be intelligent if we could just
928 save this value in the FRAME. But the way it's set up (FIXME),
929 we must save our caller's MSP. We compute that by adding our
930 memory stack frame size to our MSP. */
669caa9c 931 frame->saved_msp = argv[2] + frame->msize;
eb5b74ca 932
669caa9c 933 return frame;
eb5b74ca
JG
934}
935
18b46e7c
SS
936int
937gdb_print_insn_a29k (memaddr, info)
938 bfd_vma memaddr;
939 disassemble_info *info;
940{
941 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
5ad32be2 942 return print_insn_big_a29k (memaddr, info);
18b46e7c 943 else
5ad32be2 944 return print_insn_little_a29k (memaddr, info);
18b46e7c
SS
945}
946
ca0622e7
JK
947enum a29k_processor_types processor_type = a29k_unknown;
948
949void
950a29k_get_processor_type ()
951{
952 unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM);
953
954 /* Most of these don't have freeze mode. */
955 processor_type = a29k_no_freeze_mode;
956
957 switch ((cfg_reg >> 28) & 0xf)
958 {
959 case 0:
199b2450 960 fprintf_filtered (gdb_stderr, "Remote debugging an Am29000");
ca0622e7
JK
961 break;
962 case 1:
199b2450 963 fprintf_filtered (gdb_stderr, "Remote debugging an Am29005");
ca0622e7
JK
964 break;
965 case 2:
199b2450 966 fprintf_filtered (gdb_stderr, "Remote debugging an Am29050");
ca0622e7
JK
967 processor_type = a29k_freeze_mode;
968 break;
969 case 3:
199b2450 970 fprintf_filtered (gdb_stderr, "Remote debugging an Am29035");
ca0622e7
JK
971 break;
972 case 4:
199b2450 973 fprintf_filtered (gdb_stderr, "Remote debugging an Am29030");
ca0622e7
JK
974 break;
975 case 5:
199b2450 976 fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*");
ca0622e7
JK
977 break;
978 case 6:
199b2450 979 fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*");
ca0622e7
JK
980 break;
981 case 7:
199b2450 982 fprintf_filtered (gdb_stderr, "Remote debugging an Am29040");
ca0622e7
JK
983 break;
984 default:
199b2450 985 fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n");
ca0622e7
JK
986 /* Don't bother to print the revision. */
987 return;
988 }
199b2450 989 fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f));
ca0622e7 990}
946f014b 991
161520dc
KH
992#ifdef GET_LONGJMP_TARGET
993/* Figure out where the longjmp will land. We expect that we have just entered
994 longjmp and haven't yet setup the stack frame, so the args are still in the
995 output regs. lr2 (LR2_REGNUM) points at the jmp_buf structure from which we
996 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
997 This routine returns true on success */
998
999int
1000get_longjmp_target(pc)
1001 CORE_ADDR *pc;
1002{
1003 CORE_ADDR jb_addr;
546e6a39 1004 char buf[sizeof(CORE_ADDR)];
161520dc
KH
1005
1006 jb_addr = read_register(LR2_REGNUM);
1007
546e6a39 1008 if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, (char *) buf,
161520dc
KH
1009 sizeof(CORE_ADDR)))
1010 return 0;
1011
546e6a39 1012 *pc = extract_address ((PTR) buf, sizeof(CORE_ADDR));
161520dc
KH
1013 return 1;
1014}
1015#endif /* GET_LONGJMP_TARGET */
1016
d0b04c6a 1017void
18b46e7c 1018_initialize_a29k_tdep ()
d0b04c6a 1019{
34517ebc
JG
1020 extern CORE_ADDR text_end;
1021
18b46e7c
SS
1022 tm_print_insn = gdb_print_insn_a29k;
1023
8f86a4e4
JG
1024 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
1025 add_show_from_set
1026 (add_set_cmd ("rstack_high_address", class_support, var_uinteger,
1027 (char *)&rstack_high_address,
1028 "Set top address in memory of the register stack.\n\
1029Attempts to access registers saved above this address will be ignored\n\
1030or will produce the value -1.", &setlist),
1031 &showlist);
34517ebc
JG
1032
1033 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
1034 add_show_from_set
1035 (add_set_cmd ("call_scratch_address", class_support, var_uinteger,
1036 (char *)&text_end,
19327ea5
JG
1037"Set address in memory where small amounts of RAM can be used\n\
1038when making function calls into the inferior.", &setlist),
34517ebc 1039 &showlist);
8f86a4e4 1040}
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