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[deliverable/binutils-gdb.git] / gdb / a29k-tdep.c
CommitLineData
c906108c
SS
1/* Target-machine dependent code for the AMD 29000
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995
3 Free Software Foundation, Inc.
4 Contributed by Cygnus Support. Written by Jim Kingdon.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "gdbcore.h"
25#include "frame.h"
26#include "value.h"
27#include "symtab.h"
28#include "inferior.h"
29#include "gdbcmd.h"
30
31/* If all these bits in an instruction word are zero, it is a "tag word"
32 which precedes a function entry point and gives stack traceback info.
33 This used to be defined as 0xff000000, but that treated 0x00000deb as
34 a tag word, while it is really used as a breakpoint. */
35#define TAGWORD_ZERO_MASK 0xff00f800
36
37extern CORE_ADDR text_start; /* FIXME, kludge... */
38
39/* The user-settable top of the register stack in virtual memory. We
40 won't attempt to access any stored registers above this address, if set
41 nonzero. */
42
43static CORE_ADDR rstack_high_address = UINT_MAX;
44
45
46/* Should call_function allocate stack space for a struct return? */
47/* On the a29k objects over 16 words require the caller to allocate space. */
48int
fba45db2 49a29k_use_struct_convention (int gcc_p, struct type *type)
c906108c
SS
50{
51 return (TYPE_LENGTH (type) > 16 * 4);
52}
53
54
55/* Structure to hold cached info about function prologues. */
56
57struct prologue_info
58{
59 CORE_ADDR pc; /* First addr after fn prologue */
60 unsigned rsize, msize; /* register stack frame size, mem stack ditto */
c5aa993b
JM
61 unsigned mfp_used:1; /* memory frame pointer used */
62 unsigned rsize_valid:1; /* Validity bits for the above */
63 unsigned msize_valid:1;
64 unsigned mfp_valid:1;
c906108c
SS
65};
66
67/* Examine the prologue of a function which starts at PC. Return
68 the first addess past the prologue. If MSIZE is non-NULL, then
69 set *MSIZE to the memory stack frame size. If RSIZE is non-NULL,
70 then set *RSIZE to the register stack frame size (not including
71 incoming arguments and the return address & frame pointer stored
72 with them). If no prologue is found, *RSIZE is set to zero.
73 If no prologue is found, or a prologue which doesn't involve
74 allocating a memory stack frame, then set *MSIZE to zero.
75
76 Note that both msize and rsize are in bytes. This is not consistent
77 with the _User's Manual_ with respect to rsize, but it is much more
78 convenient.
79
80 If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory
81 frame pointer is being used. */
82
83CORE_ADDR
fba45db2 84examine_prologue (CORE_ADDR pc, unsigned *rsize, unsigned *msize, int *mfp_used)
c906108c
SS
85{
86 long insn;
87 CORE_ADDR p = pc;
88 struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc);
89 struct prologue_info *mi = 0;
90
91 if (msymbol != NULL)
c5aa993b 92 mi = (struct prologue_info *) msymbol->info;
c906108c
SS
93
94 if (mi != 0)
95 {
96 int valid = 1;
97 if (rsize != NULL)
98 {
99 *rsize = mi->rsize;
100 valid &= mi->rsize_valid;
101 }
102 if (msize != NULL)
103 {
104 *msize = mi->msize;
105 valid &= mi->msize_valid;
106 }
107 if (mfp_used != NULL)
108 {
109 *mfp_used = mi->mfp_used;
110 valid &= mi->mfp_valid;
111 }
112 if (valid)
113 return mi->pc;
114 }
115
116 if (rsize != NULL)
117 *rsize = 0;
118 if (msize != NULL)
119 *msize = 0;
120 if (mfp_used != NULL)
121 *mfp_used = 0;
c5aa993b 122
c906108c
SS
123 /* Prologue must start with subtracting a constant from gr1.
124 Normally this is sub gr1,gr1,<rsize * 4>. */
125 insn = read_memory_integer (p, 4);
126 if ((insn & 0xffffff00) != 0x25010100)
127 {
128 /* If the frame is large, instead of a single instruction it
c5aa993b
JM
129 might be a pair of instructions:
130 const <reg>, <rsize * 4>
131 sub gr1,gr1,<reg>
132 */
c906108c
SS
133 int reg;
134 /* Possible value for rsize. */
135 unsigned int rsize0;
c5aa993b 136
c906108c
SS
137 if ((insn & 0xff000000) != 0x03000000)
138 {
139 p = pc;
140 goto done;
141 }
142 reg = (insn >> 8) & 0xff;
143 rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff));
144 p += 4;
145 insn = read_memory_integer (p, 4);
146 if ((insn & 0xffffff00) != 0x24010100
147 || (insn & 0xff) != reg)
148 {
149 p = pc;
150 goto done;
151 }
152 if (rsize != NULL)
153 *rsize = rsize0;
154 }
155 else
156 {
157 if (rsize != NULL)
158 *rsize = (insn & 0xff);
159 }
160 p += 4;
161
162 /* Next instruction ought to be asgeu V_SPILL,gr1,rab.
163 * We don't check the vector number to allow for kernel debugging. The
164 * kernel will use a different trap number.
165 * If this insn is missing, we just keep going; Metaware R2.3u compiler
166 * generates prologue that intermixes initializations and puts the asgeu
167 * way down.
168 */
169 insn = read_memory_integer (p, 4);
c5aa993b 170 if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM))
c906108c
SS
171 {
172 p += 4;
173 }
174
175 /* Next instruction usually sets the frame pointer (lr1) by adding
176 <size * 4> from gr1. However, this can (and high C does) be
177 deferred until anytime before the first function call. So it is
178 OK if we don't see anything which sets lr1.
179 To allow for alternate register sets (gcc -mkernel-registers) the msp
180 register number is a compile time constant. */
181
182 /* Normally this is just add lr1,gr1,<size * 4>. */
183 insn = read_memory_integer (p, 4);
184 if ((insn & 0xffffff00) == 0x15810100)
185 p += 4;
186 else
187 {
188 /* However, for large frames it can be
c5aa993b
JM
189 const <reg>, <size *4>
190 add lr1,gr1,<reg>
191 */
c906108c
SS
192 int reg;
193 CORE_ADDR q;
194
195 if ((insn & 0xff000000) == 0x03000000)
196 {
197 reg = (insn >> 8) & 0xff;
198 q = p + 4;
199 insn = read_memory_integer (q, 4);
200 if ((insn & 0xffffff00) == 0x14810100
201 && (insn & 0xff) == reg)
202 p = q;
203 }
204 }
205
206 /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory
207 frame pointer is in use. We just check for add lr<anything>,msp,0;
208 we don't check this rsize against the first instruction, and
209 we don't check that the trace-back tag indicates a memory frame pointer
210 is in use.
211 To allow for alternate register sets (gcc -mkernel-registers) the msp
212 register number is a compile time constant.
213
214 The recommended instruction is actually "sll lr<whatever>,msp,0".
215 We check for that, too. Originally Jim Kingdon's code seemed
216 to be looking for a "sub" instruction here, but the mask was set
217 up to lose all the time. */
218 insn = read_memory_integer (p, 4);
c5aa993b
JM
219 if (((insn & 0xff80ffff) == (0x15800000 | (MSP_HW_REGNUM << 8))) /* add */
220 || ((insn & 0xff80ffff) == (0x81800000 | (MSP_HW_REGNUM << 8)))) /* sll */
c906108c
SS
221 {
222 p += 4;
223 if (mfp_used != NULL)
224 *mfp_used = 1;
225 }
226
227 /* Next comes a subtraction from msp to allocate a memory frame,
228 but only if a memory frame is
229 being used. We don't check msize against the trace-back tag.
230
231 To allow for alternate register sets (gcc -mkernel-registers) the msp
232 register number is a compile time constant.
233
234 Normally this is just
235 sub msp,msp,<msize>
c5aa993b 236 */
c906108c 237 insn = read_memory_integer (p, 4);
c5aa993b
JM
238 if ((insn & 0xffffff00) ==
239 (0x25000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8)))
c906108c
SS
240 {
241 p += 4;
c5aa993b 242 if (msize != NULL)
c906108c
SS
243 *msize = insn & 0xff;
244 }
245 else
246 {
247 /* For large frames, instead of a single instruction it might
c5aa993b 248 be
c906108c 249
c5aa993b
JM
250 const <reg>, <msize>
251 consth <reg>, <msize> ; optional
252 sub msp,msp,<reg>
253 */
c906108c
SS
254 int reg;
255 unsigned msize0;
256 CORE_ADDR q = p;
257
258 if ((insn & 0xff000000) == 0x03000000)
259 {
260 reg = (insn >> 8) & 0xff;
261 msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff);
262 q += 4;
263 insn = read_memory_integer (q, 4);
264 /* Check for consth. */
265 if ((insn & 0xff000000) == 0x02000000
266 && (insn & 0x0000ff00) == reg)
267 {
268 msize0 |= (insn << 8) & 0xff000000;
269 msize0 |= (insn << 16) & 0x00ff0000;
270 q += 4;
271 insn = read_memory_integer (q, 4);
272 }
273 /* Check for sub msp,msp,<reg>. */
c5aa993b
JM
274 if ((insn & 0xffffff00) ==
275 (0x24000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8))
c906108c
SS
276 && (insn & 0xff) == reg)
277 {
278 p = q + 4;
279 if (msize != NULL)
280 *msize = msize0;
281 }
282 }
283 }
284
285 /* Next instruction might be asgeu V_SPILL,gr1,rab.
286 * We don't check the vector number to allow for kernel debugging. The
287 * kernel will use a different trap number.
288 * Metaware R2.3u compiler
289 * generates prologue that intermixes initializations and puts the asgeu
290 * way down after everything else.
291 */
292 insn = read_memory_integer (p, 4);
c5aa993b 293 if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM))
c906108c
SS
294 {
295 p += 4;
296 }
297
c5aa993b 298done:
c906108c
SS
299 if (msymbol != NULL)
300 {
301 if (mi == 0)
302 {
303 /* Add a new cache entry. */
c5aa993b
JM
304 mi = (struct prologue_info *) xmalloc (sizeof (struct prologue_info));
305 msymbol->info = (char *) mi;
c906108c
SS
306 mi->rsize_valid = 0;
307 mi->msize_valid = 0;
308 mi->mfp_valid = 0;
309 }
310 /* else, cache entry exists, but info is incomplete. */
311 mi->pc = p;
312 if (rsize != NULL)
313 {
314 mi->rsize = *rsize;
315 mi->rsize_valid = 1;
316 }
317 if (msize != NULL)
318 {
319 mi->msize = *msize;
320 mi->msize_valid = 1;
321 }
322 if (mfp_used != NULL)
323 {
324 mi->mfp_used = *mfp_used;
325 mi->mfp_valid = 1;
326 }
327 }
328 return p;
329}
330
331/* Advance PC across any function entry prologue instructions
332 to reach some "real" code. */
333
334CORE_ADDR
fba45db2 335a29k_skip_prologue (CORE_ADDR pc)
c906108c
SS
336{
337 return examine_prologue (pc, NULL, NULL, NULL);
338}
339
340/*
341 * Examine the one or two word tag at the beginning of a function.
342 * The tag word is expect to be at 'p', if it is not there, we fail
343 * by returning 0. The documentation for the tag word was taken from
344 * page 7-15 of the 29050 User's Manual. We are assuming that the
345 * m bit is in bit 22 of the tag word, which seems to be the agreed upon
346 * convention today (1/15/92).
347 * msize is return in bytes.
348 */
349
c5aa993b 350static int /* 0/1 - failure/success of finding the tag word */
fba45db2
KB
351examine_tag (CORE_ADDR p, int *is_trans, int *argcount, unsigned *msize,
352 int *mfp_used)
c906108c
SS
353{
354 unsigned int tag1, tag2;
355
356 tag1 = read_memory_integer (p, 4);
357 if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */
358 return 0;
c5aa993b 359 if (tag1 & (1 << 23)) /* A two word tag */
c906108c 360 {
c5aa993b
JM
361 tag2 = read_memory_integer (p - 4, 4);
362 if (msize)
363 *msize = tag2 * 2;
c906108c 364 }
c5aa993b
JM
365 else
366 /* A one word tag */
c906108c 367 {
c5aa993b
JM
368 if (msize)
369 *msize = tag1 & 0x7ff;
c906108c
SS
370 }
371 if (is_trans)
c5aa993b 372 *is_trans = ((tag1 & (1 << 21)) ? 1 : 0);
c906108c
SS
373 /* Note that this includes the frame pointer and the return address
374 register, so the actual number of registers of arguments is two less.
375 argcount can be zero, however, sometimes, for strange assembler
376 routines. */
377 if (argcount)
378 *argcount = (tag1 >> 16) & 0x1f;
379 if (mfp_used)
c5aa993b 380 *mfp_used = ((tag1 & (1 << 22)) ? 1 : 0);
c906108c
SS
381 return 1;
382}
383
384/* Initialize the frame. In addition to setting "extra" frame info,
385 we also set ->frame because we use it in a nonstandard way, and ->pc
386 because we need to know it to get the other stuff. See the diagram
387 of stacks and the frame cache in tm-a29k.h for more detail. */
388
389static void
fba45db2 390init_frame_info (int innermost_frame, struct frame_info *frame)
c906108c
SS
391{
392 CORE_ADDR p;
393 long insn;
394 unsigned rsize;
395 unsigned msize;
396 int mfp_used, trans;
397 struct symbol *func;
398
399 p = frame->pc;
400
401 if (innermost_frame)
402 frame->frame = read_register (GR1_REGNUM);
403 else
404 frame->frame = frame->next->frame + frame->next->rsize;
c5aa993b
JM
405
406#if 0 /* CALL_DUMMY_LOCATION == ON_STACK */
c906108c
SS
407 This wont work;
408#else
409 if (PC_IN_CALL_DUMMY (p, 0, 0))
410#endif
411 {
412 frame->rsize = DUMMY_FRAME_RSIZE;
413 /* This doesn't matter since we never try to get locals or args
c5aa993b 414 from a dummy frame. */
c906108c
SS
415 frame->msize = 0;
416 /* Dummy frames always use a memory frame pointer. */
c5aa993b 417 frame->saved_msp =
c906108c 418 read_register_stack_integer (frame->frame + DUMMY_FRAME_RSIZE - 4, 4);
c5aa993b 419 frame->flags |= (TRANSPARENT_FRAME | MFP_USED);
c906108c
SS
420 return;
421 }
c5aa993b 422
c906108c
SS
423 func = find_pc_function (p);
424 if (func != NULL)
425 p = BLOCK_START (SYMBOL_BLOCK_VALUE (func));
426 else
427 {
428 /* Search backward to find the trace-back tag. However,
c5aa993b
JM
429 do not trace back beyond the start of the text segment
430 (just as a sanity check to avoid going into never-never land). */
c906108c
SS
431#if 1
432 while (p >= text_start
c5aa993b 433 && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0)
c906108c
SS
434 p -= 4;
435#else /* 0 */
c5aa993b
JM
436 char pat[4] =
437 {0, 0, 0, 0};
c906108c
SS
438 char mask[4];
439 char insn_raw[4];
440 store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK);
441 /* Enable this once target_search is enabled and tested. */
c5aa993b 442 target_search (4, pat, mask, p, -4, text_start, p + 1, &p, &insn_raw);
c906108c
SS
443 insn = extract_unsigned_integer (insn_raw, 4);
444#endif /* 0 */
445
446 if (p < text_start)
447 {
448 /* Couldn't find the trace-back tag.
449 Something strange is going on. */
450 frame->saved_msp = 0;
451 frame->rsize = 0;
452 frame->msize = 0;
453 frame->flags = TRANSPARENT_FRAME;
454 return;
455 }
456 else
457 /* Advance to the first word of the function, i.e. the word
458 after the trace-back tag. */
459 p += 4;
460 }
461
462 /* We've found the start of the function.
463 Try looking for a tag word that indicates whether there is a
464 memory frame pointer and what the memory stack allocation is.
465 If one doesn't exist, try using a more exhaustive search of
466 the prologue. */
467
c5aa993b
JM
468 if (examine_tag (p - 4, &trans, (int *) NULL, &msize, &mfp_used)) /* Found good tag */
469 examine_prologue (p, &rsize, 0, 0);
470 else /* No tag try prologue */
471 examine_prologue (p, &rsize, &msize, &mfp_used);
c906108c
SS
472
473 frame->rsize = rsize;
474 frame->msize = msize;
475 frame->flags = 0;
476 if (mfp_used)
c5aa993b 477 frame->flags |= MFP_USED;
c906108c 478 if (trans)
c5aa993b 479 frame->flags |= TRANSPARENT_FRAME;
c906108c
SS
480 if (innermost_frame)
481 {
482 frame->saved_msp = read_register (MSP_REGNUM) + msize;
483 }
484 else
485 {
486 if (mfp_used)
c5aa993b
JM
487 frame->saved_msp =
488 read_register_stack_integer (frame->frame + rsize - 4, 4);
c906108c 489 else
c5aa993b 490 frame->saved_msp = frame->next->saved_msp + msize;
c906108c
SS
491 }
492}
493
494void
fba45db2 495init_extra_frame_info (struct frame_info *frame)
c906108c
SS
496{
497 if (frame->next == 0)
498 /* Assume innermost frame. May produce strange results for "info frame"
499 but there isn't any way to tell the difference. */
500 init_frame_info (1, frame);
c5aa993b
JM
501 else
502 {
7a292a7a 503 /* We're in get_prev_frame.
c906108c
SS
504 Take care of everything in init_frame_pc. */
505 ;
506 }
507}
508
509void
fba45db2 510init_frame_pc (int fromleaf, struct frame_info *frame)
c906108c
SS
511{
512 frame->pc = (fromleaf ? SAVED_PC_AFTER_CALL (frame->next) :
c5aa993b 513 frame->next ? FRAME_SAVED_PC (frame->next) : read_pc ());
c906108c
SS
514 init_frame_info (fromleaf, frame);
515}
516\f
517/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
518 offsets being relative to the memory stack pointer (high C) or
519 saved_msp (gcc). */
520
521CORE_ADDR
fba45db2 522frame_locals_address (struct frame_info *fi)
c906108c 523{
c5aa993b 524 if (fi->flags & MFP_USED)
c906108c
SS
525 return fi->saved_msp;
526 else
527 return fi->saved_msp - fi->msize;
528}
529\f
530/* Routines for reading the register stack. The caller gets to treat
531 the register stack as a uniform stack in memory, from address $gr1
532 straight through $rfb and beyond. */
533
534/* Analogous to read_memory except the length is understood to be 4.
535 Also, myaddr can be NULL (meaning don't bother to read), and
536 if actual_mem_addr is non-NULL, store there the address that it
537 was fetched from (or if from a register the offset within
538 registers). Set *LVAL to lval_memory or lval_register, depending
539 on where it came from. The contents written into MYADDR are in
540 target format. */
541void
fba45db2
KB
542read_register_stack (CORE_ADDR memaddr, char *myaddr,
543 CORE_ADDR *actual_mem_addr, enum lval_type *lval)
c906108c
SS
544{
545 long rfb = read_register (RFB_REGNUM);
546 long rsp = read_register (RSP_REGNUM);
547
548 /* If we don't do this 'info register' stops in the middle. */
c5aa993b 549 if (memaddr >= rstack_high_address)
c906108c
SS
550 {
551 /* a bogus value */
c5aa993b
JM
552 static char val[] =
553 {~0, ~0, ~0, ~0};
c906108c
SS
554 /* It's in a local register, but off the end of the stack. */
555 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
556 if (myaddr != NULL)
557 {
558 /* Provide bogusness */
559 memcpy (myaddr, val, 4);
560 }
c5aa993b 561 supply_register (regnum, val); /* More bogusness */
c906108c
SS
562 if (lval != NULL)
563 *lval = lval_register;
564 if (actual_mem_addr != NULL)
565 *actual_mem_addr = REGISTER_BYTE (regnum);
566 }
567 /* If it's in the part of the register stack that's in real registers,
568 get the value from the registers. If it's anywhere else in memory
569 (e.g. in another thread's saved stack), skip this part and get
570 it from real live memory. */
571 else if (memaddr < rfb && memaddr >= rsp)
572 {
573 /* It's in a register. */
574 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
575 if (regnum > LR0_REGNUM + 127)
576 error ("Attempt to read register stack out of range.");
577 if (myaddr != NULL)
578 read_register_gen (regnum, myaddr);
579 if (lval != NULL)
580 *lval = lval_register;
581 if (actual_mem_addr != NULL)
582 *actual_mem_addr = REGISTER_BYTE (regnum);
583 }
584 else
585 {
586 /* It's in the memory portion of the register stack. */
c5aa993b 587 if (myaddr != NULL)
c906108c
SS
588 read_memory (memaddr, myaddr, 4);
589 if (lval != NULL)
590 *lval = lval_memory;
591 if (actual_mem_addr != NULL)
592 *actual_mem_addr = memaddr;
593 }
594}
595
596/* Analogous to read_memory_integer
597 except the length is understood to be 4. */
598long
fba45db2 599read_register_stack_integer (CORE_ADDR memaddr, int len)
c906108c
SS
600{
601 char buf[4];
602 read_register_stack (memaddr, buf, NULL, NULL);
603 return extract_signed_integer (buf, 4);
604}
605
606/* Copy 4 bytes from GDB memory at MYADDR into inferior memory
607 at MEMADDR and put the actual address written into in
608 *ACTUAL_MEM_ADDR. */
609static void
fba45db2
KB
610write_register_stack (CORE_ADDR memaddr, char *myaddr,
611 CORE_ADDR *actual_mem_addr)
c906108c
SS
612{
613 long rfb = read_register (RFB_REGNUM);
614 long rsp = read_register (RSP_REGNUM);
615 /* If we don't do this 'info register' stops in the middle. */
c5aa993b 616 if (memaddr >= rstack_high_address)
c906108c
SS
617 {
618 /* It's in a register, but off the end of the stack. */
619 if (actual_mem_addr != NULL)
c5aa993b 620 *actual_mem_addr = 0;
c906108c
SS
621 }
622 else if (memaddr < rfb)
623 {
624 /* It's in a register. */
625 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
626 if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127)
627 error ("Attempt to read register stack out of range.");
628 if (myaddr != NULL)
c5aa993b 629 write_register (regnum, *(long *) myaddr);
c906108c
SS
630 if (actual_mem_addr != NULL)
631 *actual_mem_addr = 0;
632 }
633 else
634 {
635 /* It's in the memory portion of the register stack. */
636 if (myaddr != NULL)
637 write_memory (memaddr, myaddr, 4);
638 if (actual_mem_addr != NULL)
639 *actual_mem_addr = memaddr;
640 }
641}
642\f
643/* Find register number REGNUM relative to FRAME and put its
644 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
645 was optimized out (and thus can't be fetched). If the variable
646 was fetched from memory, set *ADDRP to where it was fetched from,
647 otherwise it was fetched from a register.
648
649 The argument RAW_BUFFER must point to aligned memory. */
650
651void
fba45db2
KB
652a29k_get_saved_register (char *raw_buffer, int *optimized, CORE_ADDR *addrp,
653 struct frame_info *frame, int regnum,
654 enum lval_type *lvalp)
c906108c
SS
655{
656 struct frame_info *fi;
657 CORE_ADDR addr;
658 enum lval_type lval;
659
660 if (!target_has_registers)
661 error ("No registers.");
662
663 /* Probably now redundant with the target_has_registers check. */
664 if (frame == 0)
665 return;
666
667 /* Once something has a register number, it doesn't get optimized out. */
668 if (optimized != NULL)
669 *optimized = 0;
670 if (regnum == RSP_REGNUM)
671 {
672 if (raw_buffer != NULL)
673 {
674 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
675 }
676 if (lvalp != NULL)
677 *lvalp = not_lval;
678 return;
679 }
680 else if (regnum == PC_REGNUM && frame->next != NULL)
681 {
682 if (raw_buffer != NULL)
683 {
684 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc);
685 }
686
687 /* Not sure we have to do this. */
688 if (lvalp != NULL)
689 *lvalp = not_lval;
690
691 return;
692 }
693 else if (regnum == MSP_REGNUM)
694 {
695 if (raw_buffer != NULL)
696 {
697 if (frame->next != NULL)
698 {
699 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
700 frame->next->saved_msp);
701 }
702 else
703 read_register_gen (MSP_REGNUM, raw_buffer);
704 }
705 /* The value may have been computed, not fetched. */
706 if (lvalp != NULL)
707 *lvalp = not_lval;
708 return;
709 }
710 else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128)
711 {
712 /* These registers are not saved over procedure calls,
c5aa993b 713 so just print out the current values. */
c906108c
SS
714 if (raw_buffer != NULL)
715 read_register_gen (regnum, raw_buffer);
716 if (lvalp != NULL)
717 *lvalp = lval_register;
718 if (addrp != NULL)
719 *addrp = REGISTER_BYTE (regnum);
720 return;
721 }
c5aa993b 722
c906108c
SS
723 addr = frame->frame + (regnum - LR0_REGNUM) * 4;
724 if (raw_buffer != NULL)
725 read_register_stack (addr, raw_buffer, &addr, &lval);
726 if (lvalp != NULL)
727 *lvalp = lval;
728 if (addrp != NULL)
729 *addrp = addr;
730}
731\f
732
733/* Discard from the stack the innermost frame,
734 restoring all saved registers. */
735
736void
fba45db2 737pop_frame (void)
c906108c
SS
738{
739 struct frame_info *frame = get_current_frame ();
c5aa993b 740 CORE_ADDR rfb = read_register (RFB_REGNUM);
c906108c 741 CORE_ADDR gr1 = frame->frame + frame->rsize;
c5aa993b 742 CORE_ADDR lr1;
c906108c
SS
743 CORE_ADDR original_lr0;
744 int must_fix_lr0 = 0;
745 int i;
746
747 /* If popping a dummy frame, need to restore registers. */
748 if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM),
749 read_register (SP_REGNUM),
750 FRAME_FP (frame)))
751 {
c5aa993b 752 int lrnum = LR0_REGNUM + DUMMY_ARG / 4;
c906108c 753 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
c5aa993b 754 write_register (SR_REGNUM (i + 128), read_register (lrnum++));
c906108c 755 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
c5aa993b 756 write_register (SR_REGNUM (i + 160), read_register (lrnum++));
c906108c
SS
757 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
758 write_register (RETURN_REGNUM + i, read_register (lrnum++));
759 /* Restore the PCs and prepare to restore LR0. */
c5aa993b
JM
760 write_register (PC_REGNUM, read_register (lrnum++));
761 write_register (NPC_REGNUM, read_register (lrnum++));
762 write_register (PC2_REGNUM, read_register (lrnum++));
c906108c
SS
763 original_lr0 = read_register (lrnum++);
764 must_fix_lr0 = 1;
765 }
766
767 /* Restore the memory stack pointer. */
768 write_register (MSP_REGNUM, frame->saved_msp);
c5aa993b 769 /* Restore the register stack pointer. */
c906108c
SS
770 write_register (GR1_REGNUM, gr1);
771
772 /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */
c5aa993b 773 if (must_fix_lr0)
c906108c
SS
774 write_register (LR0_REGNUM, original_lr0);
775
c5aa993b
JM
776 /* Check whether we need to fill registers. */
777 lr1 = read_register (LR0_REGNUM + 1);
778 if (lr1 > rfb)
779 {
780 /* Fill. */
c906108c 781 int num_bytes = lr1 - rfb;
c5aa993b 782 int i;
c906108c 783 long word;
c5aa993b
JM
784
785 write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes);
786 write_register (RFB_REGNUM, lr1);
787 for (i = 0; i < num_bytes; i += 4)
788 {
c906108c 789 /* Note: word is in host byte order. */
c5aa993b
JM
790 word = read_memory_integer (rfb + i, 4);
791 write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word);
792 }
c906108c 793 }
c5aa993b 794 flush_cached_frames ();
c906108c
SS
795}
796
797/* Push an empty stack frame, to record the current PC, etc. */
798
c5aa993b 799void
fba45db2 800push_dummy_frame (void)
c906108c
SS
801{
802 long w;
803 CORE_ADDR rab, gr1;
804 CORE_ADDR msp = read_register (MSP_REGNUM);
805 int lrnum, i;
806 CORE_ADDR original_lr0;
c5aa993b 807
c906108c
SS
808 /* Read original lr0 before changing gr1. This order isn't really needed
809 since GDB happens to have a snapshot of all the regs and doesn't toss
810 it when gr1 is changed. But it's The Right Thing To Do. */
811 original_lr0 = read_register (LR0_REGNUM);
812
c5aa993b 813 /* Allocate the new frame. */
c906108c
SS
814 gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE;
815 write_register (GR1_REGNUM, gr1);
816
817#ifdef VXWORKS_TARGET
818 /* We force re-reading all registers to get the new local registers set
819 after gr1 has been modified. This fix is due to the lack of single
820 register read/write operation in the RPC interface between VxGDB and
821 VxWorks. This really must be changed ! */
822
823 vx_read_register (-1);
824
825#endif /* VXWORK_TARGET */
826
827 rab = read_register (RAB_REGNUM);
828 if (gr1 < rab)
829 {
830 /* We need to spill registers. */
831 int num_bytes = rab - gr1;
832 CORE_ADDR rfb = read_register (RFB_REGNUM);
833 int i;
834 long word;
835
836 write_register (RFB_REGNUM, rfb - num_bytes);
837 write_register (RAB_REGNUM, gr1);
838 for (i = 0; i < num_bytes; i += 4)
839 {
840 /* Note: word is in target byte order. */
841 read_register_gen (LR0_REGNUM + i / 4, (char *) &word);
842 write_memory (rfb - num_bytes + i, (char *) &word, 4);
843 }
844 }
845
846 /* There are no arguments in to the dummy frame, so we don't need
847 more than rsize plus the return address and lr1. */
848 write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4);
849
850 /* Set the memory frame pointer. */
851 write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp);
852
853 /* Allocate arg_slop. */
854 write_register (MSP_REGNUM, msp - 16 * 4);
855
856 /* Save registers. */
c5aa993b 857 lrnum = LR0_REGNUM + DUMMY_ARG / 4;
c906108c
SS
858 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
859 write_register (lrnum++, read_register (SR_REGNUM (i + 128)));
860 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
861 write_register (lrnum++, read_register (SR_REGNUM (i + 160)));
862 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
863 write_register (lrnum++, read_register (RETURN_REGNUM + i));
864 /* Save the PCs and LR0. */
865 write_register (lrnum++, read_register (PC_REGNUM));
866 write_register (lrnum++, read_register (NPC_REGNUM));
867 write_register (lrnum++, read_register (PC2_REGNUM));
868
869 /* Why are we saving LR0? What would clobber it? (the dummy frame should
870 be below it on the register stack, no?). */
871 write_register (lrnum++, original_lr0);
872}
873
874
875
876/*
877 This routine takes three arguments and makes the cached frames look
878 as if these arguments defined a frame on the cache. This allows the
879 rest of `info frame' to extract the important arguments without much
880 difficulty. Since an individual frame on the 29K is determined by
881 three values (FP, PC, and MSP), we really need all three to do a
882 good job. */
883
884struct frame_info *
fba45db2 885setup_arbitrary_frame (int argc, CORE_ADDR *argv)
c906108c
SS
886{
887 struct frame_info *frame;
888
889 if (argc != 3)
890 error ("AMD 29k frame specifications require three arguments: rsp pc msp");
891
892 frame = create_new_frame (argv[0], argv[1]);
893
894 if (!frame)
96baa820 895 internal_error ("create_new_frame returned invalid frame id");
c5aa993b 896
c906108c
SS
897 /* Creating a new frame munges the `frame' value from the current
898 GR1, so we restore it again here. FIXME, untangle all this
899 29K frame stuff... */
900 frame->frame = argv[0];
901
902 /* Our MSP is in argv[2]. It'd be intelligent if we could just
903 save this value in the FRAME. But the way it's set up (FIXME),
904 we must save our caller's MSP. We compute that by adding our
905 memory stack frame size to our MSP. */
906 frame->saved_msp = argv[2] + frame->msize;
907
908 return frame;
909}
910
911int
fba45db2 912gdb_print_insn_a29k (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
913{
914 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
915 return print_insn_big_a29k (memaddr, info);
916 else
917 return print_insn_little_a29k (memaddr, info);
918}
919
920enum a29k_processor_types processor_type = a29k_unknown;
921
922void
fba45db2 923a29k_get_processor_type (void)
c906108c
SS
924{
925 unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM);
926
927 /* Most of these don't have freeze mode. */
928 processor_type = a29k_no_freeze_mode;
929
930 switch ((cfg_reg >> 28) & 0xf)
931 {
932 case 0:
933 fprintf_filtered (gdb_stderr, "Remote debugging an Am29000");
934 break;
935 case 1:
936 fprintf_filtered (gdb_stderr, "Remote debugging an Am29005");
937 break;
938 case 2:
939 fprintf_filtered (gdb_stderr, "Remote debugging an Am29050");
940 processor_type = a29k_freeze_mode;
941 break;
942 case 3:
943 fprintf_filtered (gdb_stderr, "Remote debugging an Am29035");
944 break;
945 case 4:
946 fprintf_filtered (gdb_stderr, "Remote debugging an Am29030");
947 break;
948 case 5:
949 fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*");
950 break;
951 case 6:
952 fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*");
953 break;
954 case 7:
955 fprintf_filtered (gdb_stderr, "Remote debugging an Am29040");
956 break;
957 default:
958 fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n");
959 /* Don't bother to print the revision. */
960 return;
961 }
962 fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f));
963}
964
965#ifdef GET_LONGJMP_TARGET
966/* Figure out where the longjmp will land. We expect that we have just entered
c5aa993b 967 longjmp and haven't yet setup the stack frame, so the args are still in the
c906108c
SS
968 output regs. lr2 (LR2_REGNUM) points at the jmp_buf structure from which we
969 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
970 This routine returns true on success */
971
972int
fba45db2 973get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
974{
975 CORE_ADDR jb_addr;
c5aa993b 976 char buf[sizeof (CORE_ADDR)];
c906108c 977
c5aa993b 978 jb_addr = read_register (LR2_REGNUM);
c906108c 979
c5aa993b
JM
980 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, (char *) buf,
981 sizeof (CORE_ADDR)))
c906108c
SS
982 return 0;
983
c5aa993b 984 *pc = extract_address ((PTR) buf, sizeof (CORE_ADDR));
c906108c
SS
985 return 1;
986}
987#endif /* GET_LONGJMP_TARGET */
988
989void
fba45db2 990_initialize_a29k_tdep (void)
c906108c
SS
991{
992 extern CORE_ADDR text_end;
993
994 tm_print_insn = gdb_print_insn_a29k;
995
996 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
997 add_show_from_set
998 (add_set_cmd ("rstack_high_address", class_support, var_uinteger,
c5aa993b 999 (char *) &rstack_high_address,
c906108c
SS
1000 "Set top address in memory of the register stack.\n\
1001Attempts to access registers saved above this address will be ignored\n\
1002or will produce the value -1.", &setlist),
1003 &showlist);
1004
1005 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
1006 add_show_from_set
1007 (add_set_cmd ("call_scratch_address", class_support, var_uinteger,
c5aa993b
JM
1008 (char *) &text_end,
1009 "Set address in memory where small amounts of RAM can be used\n\
c906108c
SS
1010when making function calls into the inferior.", &setlist),
1011 &showlist);
1012}
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