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9d19df75 MS |
1 | /* Native-dependent code for GNU/Linux AArch64. |
2 | ||
e2882c85 | 3 | Copyright (C) 2011-2018 Free Software Foundation, Inc. |
9d19df75 MS |
4 | Contributed by ARM Ltd. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "defs.h" | |
22 | ||
23 | #include "inferior.h" | |
24 | #include "gdbcore.h" | |
25 | #include "regcache.h" | |
26 | #include "linux-nat.h" | |
27 | #include "target-descriptions.h" | |
28 | #include "auxv.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "aarch64-tdep.h" | |
31 | #include "aarch64-linux-tdep.h" | |
607685ec | 32 | #include "aarch32-linux-nat.h" |
db3cb7cb | 33 | #include "nat/aarch64-linux.h" |
554717a3 | 34 | #include "nat/aarch64-linux-hw-point.h" |
607685ec YQ |
35 | |
36 | #include "elf/external.h" | |
9d19df75 MS |
37 | #include "elf/common.h" |
38 | ||
5826e159 | 39 | #include "nat/gdb_ptrace.h" |
9d19df75 | 40 | #include <sys/utsname.h> |
036cd381 | 41 | #include <asm/ptrace.h> |
9d19df75 MS |
42 | |
43 | #include "gregset.h" | |
44 | ||
9d19df75 MS |
45 | /* Defines ps_err_e, struct ps_prochandle. */ |
46 | #include "gdb_proc_service.h" | |
47 | ||
48 | #ifndef TRAP_HWBKPT | |
49 | #define TRAP_HWBKPT 0x0004 | |
50 | #endif | |
51 | ||
f6ac5f3d PA |
52 | class aarch64_linux_nat_target final : public linux_nat_target |
53 | { | |
54 | public: | |
55 | /* Add our register access methods. */ | |
56 | void fetch_registers (struct regcache *, int) override; | |
57 | void store_registers (struct regcache *, int) override; | |
58 | ||
59 | const struct target_desc *read_description () override; | |
60 | ||
61 | /* Add our hardware breakpoint and watchpoint implementation. */ | |
62 | int can_use_hw_breakpoint (enum bptype, int, int) override; | |
63 | int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; | |
64 | int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; | |
65 | int region_ok_for_hw_watchpoint (CORE_ADDR, int) override; | |
66 | int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, | |
67 | struct expression *) override; | |
68 | int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, | |
69 | struct expression *) override; | |
57810aa7 PA |
70 | bool stopped_by_watchpoint () override; |
71 | bool stopped_data_address (CORE_ADDR *) override; | |
72 | bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override; | |
f6ac5f3d PA |
73 | |
74 | int can_do_single_step () override; | |
75 | ||
76 | /* Override the GNU/Linux inferior startup hook. */ | |
77 | void post_startup_inferior (ptid_t) override; | |
135340af PA |
78 | |
79 | /* These three defer to common nat/ code. */ | |
80 | void low_new_thread (struct lwp_info *lp) override | |
81 | { aarch64_linux_new_thread (lp); } | |
82 | void low_delete_thread (struct arch_lwp_info *lp) override | |
83 | { aarch64_linux_delete_thread (lp); } | |
84 | void low_prepare_to_resume (struct lwp_info *lp) override | |
85 | { aarch64_linux_prepare_to_resume (lp); } | |
86 | ||
87 | void low_new_fork (struct lwp_info *parent, pid_t child_pid) override; | |
88 | void low_forget_process (pid_t pid) override; | |
89 | ||
90 | /* Add our siginfo layout converter. */ | |
91 | bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction) | |
92 | override; | |
f6ac5f3d PA |
93 | }; |
94 | ||
95 | static aarch64_linux_nat_target the_aarch64_linux_nat_target; | |
96 | ||
d6c44983 YZ |
97 | /* Per-process data. We don't bind this to a per-inferior registry |
98 | because of targets like x86 GNU/Linux that need to keep track of | |
99 | processes that aren't bound to any inferior (e.g., fork children, | |
100 | checkpoints). */ | |
9d19df75 | 101 | |
d6c44983 | 102 | struct aarch64_process_info |
9d19df75 | 103 | { |
d6c44983 YZ |
104 | /* Linked list. */ |
105 | struct aarch64_process_info *next; | |
9d19df75 | 106 | |
d6c44983 YZ |
107 | /* The process identifier. */ |
108 | pid_t pid; | |
9d19df75 | 109 | |
d6c44983 YZ |
110 | /* Copy of aarch64 hardware debug registers. */ |
111 | struct aarch64_debug_reg_state state; | |
112 | }; | |
113 | ||
114 | static struct aarch64_process_info *aarch64_process_list = NULL; | |
115 | ||
116 | /* Find process data for process PID. */ | |
117 | ||
118 | static struct aarch64_process_info * | |
119 | aarch64_find_process_pid (pid_t pid) | |
120 | { | |
121 | struct aarch64_process_info *proc; | |
122 | ||
123 | for (proc = aarch64_process_list; proc; proc = proc->next) | |
124 | if (proc->pid == pid) | |
125 | return proc; | |
126 | ||
127 | return NULL; | |
9d19df75 MS |
128 | } |
129 | ||
d6c44983 YZ |
130 | /* Add process data for process PID. Returns newly allocated info |
131 | object. */ | |
9d19df75 | 132 | |
d6c44983 YZ |
133 | static struct aarch64_process_info * |
134 | aarch64_add_process (pid_t pid) | |
9d19df75 | 135 | { |
d6c44983 | 136 | struct aarch64_process_info *proc; |
9d19df75 | 137 | |
8d749320 | 138 | proc = XCNEW (struct aarch64_process_info); |
d6c44983 | 139 | proc->pid = pid; |
9d19df75 | 140 | |
d6c44983 YZ |
141 | proc->next = aarch64_process_list; |
142 | aarch64_process_list = proc; | |
143 | ||
144 | return proc; | |
145 | } | |
146 | ||
147 | /* Get data specific info for process PID, creating it if necessary. | |
148 | Never returns NULL. */ | |
149 | ||
150 | static struct aarch64_process_info * | |
151 | aarch64_process_info_get (pid_t pid) | |
9d19df75 | 152 | { |
d6c44983 YZ |
153 | struct aarch64_process_info *proc; |
154 | ||
155 | proc = aarch64_find_process_pid (pid); | |
156 | if (proc == NULL) | |
157 | proc = aarch64_add_process (pid); | |
9d19df75 | 158 | |
d6c44983 | 159 | return proc; |
9d19df75 MS |
160 | } |
161 | ||
d6c44983 YZ |
162 | /* Called whenever GDB is no longer debugging process PID. It deletes |
163 | data structures that keep track of debug register state. */ | |
9d19df75 | 164 | |
135340af PA |
165 | void |
166 | aarch64_linux_nat_target::low_forget_process (pid_t pid) | |
9d19df75 | 167 | { |
d6c44983 | 168 | struct aarch64_process_info *proc, **proc_link; |
9d19df75 | 169 | |
d6c44983 YZ |
170 | proc = aarch64_process_list; |
171 | proc_link = &aarch64_process_list; | |
172 | ||
173 | while (proc != NULL) | |
9d19df75 | 174 | { |
d6c44983 YZ |
175 | if (proc->pid == pid) |
176 | { | |
177 | *proc_link = proc->next; | |
9d19df75 | 178 | |
d6c44983 YZ |
179 | xfree (proc); |
180 | return; | |
181 | } | |
182 | ||
183 | proc_link = &proc->next; | |
184 | proc = *proc_link; | |
185 | } | |
9d19df75 MS |
186 | } |
187 | ||
d6c44983 | 188 | /* Get debug registers state for process PID. */ |
9d19df75 | 189 | |
db3cb7cb | 190 | struct aarch64_debug_reg_state * |
d6c44983 | 191 | aarch64_get_debug_reg_state (pid_t pid) |
9d19df75 | 192 | { |
d6c44983 | 193 | return &aarch64_process_info_get (pid)->state; |
9d19df75 MS |
194 | } |
195 | ||
9d19df75 MS |
196 | /* Fill GDB's register array with the general-purpose register values |
197 | from the current thread. */ | |
198 | ||
199 | static void | |
200 | fetch_gregs_from_thread (struct regcache *regcache) | |
201 | { | |
607685ec | 202 | int ret, tid; |
ac7936df | 203 | struct gdbarch *gdbarch = regcache->arch (); |
9d19df75 MS |
204 | elf_gregset_t regs; |
205 | struct iovec iovec; | |
206 | ||
607685ec YQ |
207 | /* Make sure REGS can hold all registers contents on both aarch64 |
208 | and arm. */ | |
209 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
210 | ||
55119686 | 211 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
212 | |
213 | iovec.iov_base = ®s; | |
607685ec YQ |
214 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
215 | iovec.iov_len = 18 * 4; | |
216 | else | |
217 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
218 | |
219 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
220 | if (ret < 0) | |
221 | perror_with_name (_("Unable to fetch general registers.")); | |
222 | ||
607685ec YQ |
223 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
224 | aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1); | |
225 | else | |
226 | { | |
227 | int regno; | |
228 | ||
229 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
230 | regcache_raw_supply (regcache, regno, ®s[regno - AARCH64_X0_REGNUM]); | |
231 | } | |
9d19df75 MS |
232 | } |
233 | ||
234 | /* Store to the current thread the valid general-purpose register | |
235 | values in the GDB's register array. */ | |
236 | ||
237 | static void | |
238 | store_gregs_to_thread (const struct regcache *regcache) | |
239 | { | |
607685ec | 240 | int ret, tid; |
9d19df75 MS |
241 | elf_gregset_t regs; |
242 | struct iovec iovec; | |
ac7936df | 243 | struct gdbarch *gdbarch = regcache->arch (); |
9d19df75 | 244 | |
607685ec YQ |
245 | /* Make sure REGS can hold all registers contents on both aarch64 |
246 | and arm. */ | |
247 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
55119686 | 248 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
249 | |
250 | iovec.iov_base = ®s; | |
607685ec YQ |
251 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
252 | iovec.iov_len = 18 * 4; | |
253 | else | |
254 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
255 | |
256 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
257 | if (ret < 0) | |
258 | perror_with_name (_("Unable to fetch general registers.")); | |
259 | ||
607685ec YQ |
260 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
261 | aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1); | |
262 | else | |
263 | { | |
264 | int regno; | |
265 | ||
266 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
267 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
268 | regcache_raw_collect (regcache, regno, | |
269 | ®s[regno - AARCH64_X0_REGNUM]); | |
270 | } | |
9d19df75 MS |
271 | |
272 | ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec); | |
273 | if (ret < 0) | |
274 | perror_with_name (_("Unable to store general registers.")); | |
275 | } | |
276 | ||
277 | /* Fill GDB's register array with the fp/simd register values | |
278 | from the current thread. */ | |
279 | ||
280 | static void | |
281 | fetch_fpregs_from_thread (struct regcache *regcache) | |
282 | { | |
607685ec | 283 | int ret, tid; |
9d19df75 MS |
284 | elf_fpregset_t regs; |
285 | struct iovec iovec; | |
ac7936df | 286 | struct gdbarch *gdbarch = regcache->arch (); |
607685ec YQ |
287 | |
288 | /* Make sure REGS can hold all VFP registers contents on both aarch64 | |
289 | and arm. */ | |
290 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
9d19df75 | 291 | |
55119686 | 292 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
293 | |
294 | iovec.iov_base = ®s; | |
9d19df75 | 295 | |
607685ec YQ |
296 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
297 | { | |
298 | iovec.iov_len = VFP_REGS_SIZE; | |
299 | ||
300 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); | |
301 | if (ret < 0) | |
302 | perror_with_name (_("Unable to fetch VFP registers.")); | |
303 | ||
304 | aarch32_vfp_regcache_supply (regcache, (gdb_byte *) ®s, 32); | |
305 | } | |
306 | else | |
307 | { | |
308 | int regno; | |
309 | ||
310 | iovec.iov_len = sizeof (regs); | |
9d19df75 | 311 | |
607685ec YQ |
312 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); |
313 | if (ret < 0) | |
314 | perror_with_name (_("Unable to fetch vFP/SIMD registers.")); | |
9d19df75 | 315 | |
607685ec YQ |
316 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) |
317 | regcache_raw_supply (regcache, regno, | |
318 | ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
319 | ||
320 | regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, ®s.fpsr); | |
321 | regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, ®s.fpcr); | |
322 | } | |
9d19df75 MS |
323 | } |
324 | ||
325 | /* Store to the current thread the valid fp/simd register | |
326 | values in the GDB's register array. */ | |
327 | ||
328 | static void | |
329 | store_fpregs_to_thread (const struct regcache *regcache) | |
330 | { | |
607685ec | 331 | int ret, tid; |
9d19df75 MS |
332 | elf_fpregset_t regs; |
333 | struct iovec iovec; | |
ac7936df | 334 | struct gdbarch *gdbarch = regcache->arch (); |
9d19df75 | 335 | |
607685ec YQ |
336 | /* Make sure REGS can hold all VFP registers contents on both aarch64 |
337 | and arm. */ | |
338 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
55119686 | 339 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
340 | |
341 | iovec.iov_base = ®s; | |
9d19df75 | 342 | |
607685ec YQ |
343 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
344 | { | |
345 | iovec.iov_len = VFP_REGS_SIZE; | |
9d19df75 | 346 | |
607685ec YQ |
347 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); |
348 | if (ret < 0) | |
349 | perror_with_name (_("Unable to fetch VFP registers.")); | |
9d19df75 | 350 | |
607685ec YQ |
351 | aarch32_vfp_regcache_collect (regcache, (gdb_byte *) ®s, 32); |
352 | } | |
353 | else | |
354 | { | |
355 | int regno; | |
9d19df75 | 356 | |
607685ec YQ |
357 | iovec.iov_len = sizeof (regs); |
358 | ||
359 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); | |
360 | if (ret < 0) | |
361 | perror_with_name (_("Unable to fetch FP/SIMD registers.")); | |
362 | ||
363 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) | |
364 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
365 | regcache_raw_collect (regcache, regno, | |
366 | (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
367 | ||
368 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM)) | |
369 | regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM, | |
370 | (char *) ®s.fpsr); | |
371 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM)) | |
372 | regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM, | |
373 | (char *) ®s.fpcr); | |
374 | } | |
375 | ||
376 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) | |
377 | { | |
378 | ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec); | |
379 | if (ret < 0) | |
380 | perror_with_name (_("Unable to store VFP registers.")); | |
381 | } | |
382 | else | |
383 | { | |
384 | ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec); | |
385 | if (ret < 0) | |
386 | perror_with_name (_("Unable to store FP/SIMD registers.")); | |
387 | } | |
9d19df75 MS |
388 | } |
389 | ||
f6ac5f3d | 390 | /* Implement the "fetch_registers" target_ops method. */ |
9d19df75 | 391 | |
f6ac5f3d PA |
392 | void |
393 | aarch64_linux_nat_target::fetch_registers (struct regcache *regcache, | |
394 | int regno) | |
9d19df75 MS |
395 | { |
396 | if (regno == -1) | |
397 | { | |
398 | fetch_gregs_from_thread (regcache); | |
399 | fetch_fpregs_from_thread (regcache); | |
400 | } | |
401 | else if (regno < AARCH64_V0_REGNUM) | |
402 | fetch_gregs_from_thread (regcache); | |
403 | else | |
404 | fetch_fpregs_from_thread (regcache); | |
405 | } | |
406 | ||
f6ac5f3d | 407 | /* Implement the "store_registers" target_ops method. */ |
9d19df75 | 408 | |
f6ac5f3d PA |
409 | void |
410 | aarch64_linux_nat_target::store_registers (struct regcache *regcache, | |
411 | int regno) | |
9d19df75 MS |
412 | { |
413 | if (regno == -1) | |
414 | { | |
415 | store_gregs_to_thread (regcache); | |
416 | store_fpregs_to_thread (regcache); | |
417 | } | |
418 | else if (regno < AARCH64_V0_REGNUM) | |
419 | store_gregs_to_thread (regcache); | |
420 | else | |
421 | store_fpregs_to_thread (regcache); | |
422 | } | |
423 | ||
424 | /* Fill register REGNO (if it is a general-purpose register) in | |
425 | *GREGSETPS with the value in GDB's register array. If REGNO is -1, | |
426 | do this for all registers. */ | |
427 | ||
428 | void | |
429 | fill_gregset (const struct regcache *regcache, | |
430 | gdb_gregset_t *gregsetp, int regno) | |
431 | { | |
d4d793bf AA |
432 | regcache_collect_regset (&aarch64_linux_gregset, regcache, |
433 | regno, (gdb_byte *) gregsetp, | |
434 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
435 | } |
436 | ||
437 | /* Fill GDB's register array with the general-purpose register values | |
438 | in *GREGSETP. */ | |
439 | ||
440 | void | |
441 | supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | |
442 | { | |
d4d793bf AA |
443 | regcache_supply_regset (&aarch64_linux_gregset, regcache, -1, |
444 | (const gdb_byte *) gregsetp, | |
445 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
446 | } |
447 | ||
448 | /* Fill register REGNO (if it is a floating-point register) in | |
449 | *FPREGSETP with the value in GDB's register array. If REGNO is -1, | |
450 | do this for all registers. */ | |
451 | ||
452 | void | |
453 | fill_fpregset (const struct regcache *regcache, | |
454 | gdb_fpregset_t *fpregsetp, int regno) | |
455 | { | |
d4d793bf AA |
456 | regcache_collect_regset (&aarch64_linux_fpregset, regcache, |
457 | regno, (gdb_byte *) fpregsetp, | |
458 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
459 | } |
460 | ||
461 | /* Fill GDB's register array with the floating-point register values | |
462 | in *FPREGSETP. */ | |
463 | ||
464 | void | |
465 | supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | |
466 | { | |
d4d793bf AA |
467 | regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1, |
468 | (const gdb_byte *) fpregsetp, | |
469 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
470 | } |
471 | ||
d6c44983 YZ |
472 | /* linux_nat_new_fork hook. */ |
473 | ||
135340af PA |
474 | void |
475 | aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent, | |
476 | pid_t child_pid) | |
d6c44983 YZ |
477 | { |
478 | pid_t parent_pid; | |
479 | struct aarch64_debug_reg_state *parent_state; | |
480 | struct aarch64_debug_reg_state *child_state; | |
481 | ||
482 | /* NULL means no watchpoint has ever been set in the parent. In | |
483 | that case, there's nothing to do. */ | |
484 | if (parent->arch_private == NULL) | |
485 | return; | |
486 | ||
487 | /* GDB core assumes the child inherits the watchpoints/hw | |
488 | breakpoints of the parent, and will remove them all from the | |
489 | forked off process. Copy the debug registers mirrors into the | |
490 | new process so that all breakpoints and watchpoints can be | |
491 | removed together. */ | |
492 | ||
493 | parent_pid = ptid_get_pid (parent->ptid); | |
494 | parent_state = aarch64_get_debug_reg_state (parent_pid); | |
495 | child_state = aarch64_get_debug_reg_state (child_pid); | |
496 | *child_state = *parent_state; | |
497 | } | |
9d19df75 MS |
498 | \f |
499 | ||
500 | /* Called by libthread_db. Returns a pointer to the thread local | |
501 | storage (or its descriptor). */ | |
502 | ||
503 | ps_err_e | |
754653a7 | 504 | ps_get_thread_area (struct ps_prochandle *ph, |
9d19df75 MS |
505 | lwpid_t lwpid, int idx, void **base) |
506 | { | |
a0cc84cd YQ |
507 | int is_64bit_p |
508 | = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64); | |
9d19df75 | 509 | |
a0cc84cd | 510 | return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p); |
9d19df75 MS |
511 | } |
512 | \f | |
513 | ||
f6ac5f3d | 514 | /* Implement the "post_startup_inferior" target_ops method. */ |
9d19df75 | 515 | |
f6ac5f3d PA |
516 | void |
517 | aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid) | |
9d19df75 | 518 | { |
135340af | 519 | low_forget_process (ptid_get_pid (ptid)); |
af1b22f3 | 520 | aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid)); |
f6ac5f3d | 521 | linux_nat_target::post_startup_inferior (ptid); |
9d19df75 MS |
522 | } |
523 | ||
607685ec YQ |
524 | extern struct target_desc *tdesc_arm_with_neon; |
525 | ||
f6ac5f3d | 526 | /* Implement the "read_description" target_ops method. */ |
9d19df75 | 527 | |
f6ac5f3d PA |
528 | const struct target_desc * |
529 | aarch64_linux_nat_target::read_description () | |
9d19df75 | 530 | { |
6f67973b YQ |
531 | int ret, tid; |
532 | gdb_byte regbuf[VFP_REGS_SIZE]; | |
533 | struct iovec iovec; | |
607685ec | 534 | |
6f67973b | 535 | tid = ptid_get_lwp (inferior_ptid); |
607685ec | 536 | |
6f67973b YQ |
537 | iovec.iov_base = regbuf; |
538 | iovec.iov_len = VFP_REGS_SIZE; | |
607685ec | 539 | |
6f67973b YQ |
540 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); |
541 | if (ret == 0) | |
542 | return tdesc_arm_with_neon; | |
543 | else | |
da434ccb | 544 | return aarch64_read_description (); |
9d19df75 MS |
545 | } |
546 | ||
ade90bde YQ |
547 | /* Convert a native/host siginfo object, into/from the siginfo in the |
548 | layout of the inferiors' architecture. Returns true if any | |
549 | conversion was done; false otherwise. If DIRECTION is 1, then copy | |
550 | from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to | |
551 | INF. */ | |
552 | ||
135340af PA |
553 | bool |
554 | aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf, | |
555 | int direction) | |
ade90bde YQ |
556 | { |
557 | struct gdbarch *gdbarch = get_frame_arch (get_current_frame ()); | |
558 | ||
559 | /* Is the inferior 32-bit? If so, then do fixup the siginfo | |
560 | object. */ | |
561 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) | |
562 | { | |
563 | if (direction == 0) | |
564 | aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf, | |
565 | native); | |
566 | else | |
567 | aarch64_siginfo_from_compat_siginfo (native, | |
568 | (struct compat_siginfo *) inf); | |
569 | ||
135340af | 570 | return true; |
ade90bde YQ |
571 | } |
572 | ||
135340af | 573 | return false; |
ade90bde YQ |
574 | } |
575 | ||
9d19df75 MS |
576 | /* Returns the number of hardware watchpoints of type TYPE that we can |
577 | set. Value is positive if we can set CNT watchpoints, zero if | |
578 | setting watchpoints of type TYPE is not supported, and negative if | |
579 | CNT is more than the maximum number of watchpoints of type TYPE | |
580 | that we can support. TYPE is one of bp_hardware_watchpoint, | |
581 | bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint. | |
582 | CNT is the number of such watchpoints used so far (including this | |
583 | one). OTHERTYPE is non-zero if other types of watchpoints are | |
c2fbdc59 | 584 | currently enabled. */ |
9d19df75 | 585 | |
f6ac5f3d PA |
586 | int |
587 | aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type, | |
588 | int cnt, int othertype) | |
9d19df75 | 589 | { |
c2fbdc59 YQ |
590 | if (type == bp_hardware_watchpoint || type == bp_read_watchpoint |
591 | || type == bp_access_watchpoint || type == bp_watchpoint) | |
592 | { | |
593 | if (aarch64_num_wp_regs == 0) | |
594 | return 0; | |
595 | } | |
596 | else if (type == bp_hardware_breakpoint) | |
597 | { | |
598 | if (aarch64_num_bp_regs == 0) | |
599 | return 0; | |
600 | } | |
601 | else | |
602 | gdb_assert_not_reached ("unexpected breakpoint type"); | |
603 | ||
604 | /* We always return 1 here because we don't have enough information | |
605 | about possible overlap of addresses that they want to watch. As an | |
606 | extreme example, consider the case where all the watchpoints watch | |
607 | the same address and the same region length: then we can handle a | |
608 | virtually unlimited number of watchpoints, due to debug register | |
609 | sharing implemented via reference counts. */ | |
9d19df75 MS |
610 | return 1; |
611 | } | |
612 | ||
0d5ed153 | 613 | /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address. |
9d19df75 MS |
614 | Return 0 on success, -1 on failure. */ |
615 | ||
f6ac5f3d PA |
616 | int |
617 | aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch, | |
618 | struct bp_target_info *bp_tgt) | |
9d19df75 MS |
619 | { |
620 | int ret; | |
0d5ed153 | 621 | CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; |
8d689ee5 | 622 | int len; |
2ecd81c2 | 623 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
624 | struct aarch64_debug_reg_state *state |
625 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 626 | |
8d689ee5 YQ |
627 | gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); |
628 | ||
c5e92cca | 629 | if (show_debug_regs) |
9d19df75 MS |
630 | fprintf_unfiltered |
631 | (gdb_stdlog, | |
632 | "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
633 | (unsigned long) addr, len); | |
634 | ||
c67ca4de | 635 | ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 636 | |
c5e92cca | 637 | if (show_debug_regs) |
d6c44983 | 638 | { |
d6c44983 | 639 | aarch64_show_debug_reg_state (state, |
2fd0f80d | 640 | "insert_hw_breakpoint", addr, len, type); |
d6c44983 | 641 | } |
9d19df75 MS |
642 | |
643 | return ret; | |
644 | } | |
645 | ||
646 | /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address. | |
647 | Return 0 on success, -1 on failure. */ | |
648 | ||
f6ac5f3d PA |
649 | int |
650 | aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch, | |
651 | struct bp_target_info *bp_tgt) | |
9d19df75 MS |
652 | { |
653 | int ret; | |
654 | CORE_ADDR addr = bp_tgt->placed_address; | |
8d689ee5 | 655 | int len = 4; |
2ecd81c2 | 656 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
657 | struct aarch64_debug_reg_state *state |
658 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 659 | |
8d689ee5 YQ |
660 | gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); |
661 | ||
c5e92cca | 662 | if (show_debug_regs) |
9d19df75 MS |
663 | fprintf_unfiltered |
664 | (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
665 | (unsigned long) addr, len); | |
666 | ||
c67ca4de | 667 | ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 668 | |
c5e92cca | 669 | if (show_debug_regs) |
d6c44983 | 670 | { |
d6c44983 YZ |
671 | aarch64_show_debug_reg_state (state, |
672 | "remove_hw_watchpoint", addr, len, type); | |
673 | } | |
9d19df75 MS |
674 | |
675 | return ret; | |
676 | } | |
677 | ||
f6ac5f3d | 678 | /* Implement the "insert_watchpoint" target_ops method. |
9d19df75 MS |
679 | |
680 | Insert a watchpoint to watch a memory region which starts at | |
681 | address ADDR and whose length is LEN bytes. Watch memory accesses | |
682 | of the type TYPE. Return 0 on success, -1 on failure. */ | |
683 | ||
f6ac5f3d PA |
684 | int |
685 | aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len, | |
686 | enum target_hw_bp_type type, | |
687 | struct expression *cond) | |
9d19df75 MS |
688 | { |
689 | int ret; | |
c67ca4de YQ |
690 | struct aarch64_debug_reg_state *state |
691 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 692 | |
c5e92cca | 693 | if (show_debug_regs) |
9d19df75 MS |
694 | fprintf_unfiltered (gdb_stdlog, |
695 | "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
696 | (unsigned long) addr, len); | |
697 | ||
698 | gdb_assert (type != hw_execute); | |
699 | ||
c67ca4de | 700 | ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 701 | |
c5e92cca | 702 | if (show_debug_regs) |
d6c44983 | 703 | { |
d6c44983 YZ |
704 | aarch64_show_debug_reg_state (state, |
705 | "insert_watchpoint", addr, len, type); | |
706 | } | |
9d19df75 MS |
707 | |
708 | return ret; | |
709 | } | |
710 | ||
f6ac5f3d | 711 | /* Implement the "remove_watchpoint" target_ops method. |
9d19df75 MS |
712 | Remove a watchpoint that watched the memory region which starts at |
713 | address ADDR, whose length is LEN bytes, and for accesses of the | |
714 | type TYPE. Return 0 on success, -1 on failure. */ | |
715 | ||
f6ac5f3d PA |
716 | int |
717 | aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len, | |
718 | enum target_hw_bp_type type, | |
719 | struct expression *cond) | |
9d19df75 MS |
720 | { |
721 | int ret; | |
c67ca4de YQ |
722 | struct aarch64_debug_reg_state *state |
723 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 724 | |
c5e92cca | 725 | if (show_debug_regs) |
9d19df75 MS |
726 | fprintf_unfiltered (gdb_stdlog, |
727 | "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
728 | (unsigned long) addr, len); | |
729 | ||
730 | gdb_assert (type != hw_execute); | |
731 | ||
c67ca4de | 732 | ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 733 | |
c5e92cca | 734 | if (show_debug_regs) |
d6c44983 | 735 | { |
d6c44983 YZ |
736 | aarch64_show_debug_reg_state (state, |
737 | "remove_watchpoint", addr, len, type); | |
738 | } | |
9d19df75 MS |
739 | |
740 | return ret; | |
741 | } | |
742 | ||
f6ac5f3d | 743 | /* Implement the "region_ok_for_hw_watchpoint" target_ops method. */ |
9d19df75 | 744 | |
f6ac5f3d PA |
745 | int |
746 | aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len) | |
9d19df75 | 747 | { |
39edd165 | 748 | return aarch64_linux_region_ok_for_watchpoint (addr, len); |
9d19df75 MS |
749 | } |
750 | ||
f6ac5f3d | 751 | /* Implement the "stopped_data_address" target_ops method. */ |
9d19df75 | 752 | |
57810aa7 | 753 | bool |
f6ac5f3d | 754 | aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p) |
9d19df75 MS |
755 | { |
756 | siginfo_t siginfo; | |
757 | int i, tid; | |
758 | struct aarch64_debug_reg_state *state; | |
759 | ||
760 | if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) | |
57810aa7 | 761 | return false; |
9d19df75 MS |
762 | |
763 | /* This must be a hardware breakpoint. */ | |
764 | if (siginfo.si_signo != SIGTRAP | |
765 | || (siginfo.si_code & 0xffff) != TRAP_HWBKPT) | |
57810aa7 | 766 | return false; |
9d19df75 MS |
767 | |
768 | /* Check if the address matches any watched address. */ | |
d6c44983 | 769 | state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); |
9d19df75 MS |
770 | for (i = aarch64_num_wp_regs - 1; i >= 0; --i) |
771 | { | |
a3b60e45 JK |
772 | const unsigned int offset |
773 | = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]); | |
9d19df75 MS |
774 | const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]); |
775 | const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr; | |
a3b60e45 JK |
776 | const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset; |
777 | const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8); | |
778 | const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i]; | |
9d19df75 MS |
779 | |
780 | if (state->dr_ref_count_wp[i] | |
781 | && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i]) | |
a3b60e45 | 782 | && addr_trap >= addr_watch_aligned |
9d19df75 MS |
783 | && addr_trap < addr_watch + len) |
784 | { | |
a3b60e45 JK |
785 | /* ADDR_TRAP reports the first address of the memory range |
786 | accessed by the CPU, regardless of what was the memory | |
787 | range watched. Thus, a large CPU access that straddles | |
788 | the ADDR_WATCH..ADDR_WATCH+LEN range may result in an | |
789 | ADDR_TRAP that is lower than the | |
790 | ADDR_WATCH..ADDR_WATCH+LEN range. E.g.: | |
791 | ||
792 | addr: | 4 | 5 | 6 | 7 | 8 | | |
793 | |---- range watched ----| | |
794 | |----------- range accessed ------------| | |
795 | ||
796 | In this case, ADDR_TRAP will be 4. | |
797 | ||
798 | To match a watchpoint known to GDB core, we must never | |
799 | report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN | |
800 | range. ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false | |
801 | positive on kernels older than 4.10. See PR | |
802 | external/20207. */ | |
803 | *addr_p = addr_orig; | |
57810aa7 | 804 | return true; |
9d19df75 MS |
805 | } |
806 | } | |
807 | ||
57810aa7 | 808 | return false; |
9d19df75 MS |
809 | } |
810 | ||
f6ac5f3d | 811 | /* Implement the "stopped_by_watchpoint" target_ops method. */ |
9d19df75 | 812 | |
57810aa7 | 813 | bool |
f6ac5f3d | 814 | aarch64_linux_nat_target::stopped_by_watchpoint () |
9d19df75 MS |
815 | { |
816 | CORE_ADDR addr; | |
817 | ||
f6ac5f3d | 818 | return stopped_data_address (&addr); |
9d19df75 MS |
819 | } |
820 | ||
f6ac5f3d | 821 | /* Implement the "watchpoint_addr_within_range" target_ops method. */ |
9d19df75 | 822 | |
57810aa7 | 823 | bool |
f6ac5f3d PA |
824 | aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr, |
825 | CORE_ADDR start, int length) | |
9d19df75 MS |
826 | { |
827 | return start <= addr && start + length - 1 >= addr; | |
828 | } | |
829 | ||
f6ac5f3d | 830 | /* Implement the "can_do_single_step" target_ops method. */ |
750ce8d1 | 831 | |
f6ac5f3d PA |
832 | int |
833 | aarch64_linux_nat_target::can_do_single_step () | |
750ce8d1 YQ |
834 | { |
835 | return 1; | |
836 | } | |
837 | ||
9d19df75 MS |
838 | /* Define AArch64 maintenance commands. */ |
839 | ||
840 | static void | |
841 | add_show_debug_regs_command (void) | |
842 | { | |
843 | /* A maintenance command to enable printing the internal DRi mirror | |
844 | variables. */ | |
845 | add_setshow_boolean_cmd ("show-debug-regs", class_maintenance, | |
c5e92cca | 846 | &show_debug_regs, _("\ |
9d19df75 MS |
847 | Set whether to show variables that mirror the AArch64 debug registers."), _("\ |
848 | Show whether to show variables that mirror the AArch64 debug registers."), _("\ | |
849 | Use \"on\" to enable, \"off\" to disable.\n\ | |
850 | If enabled, the debug registers values are shown when GDB inserts\n\ | |
851 | or removes a hardware breakpoint or watchpoint, and when the inferior\n\ | |
852 | triggers a breakpoint or watchpoint."), | |
853 | NULL, | |
854 | NULL, | |
855 | &maintenance_set_cmdlist, | |
856 | &maintenance_show_cmdlist); | |
857 | } | |
858 | ||
9d19df75 MS |
859 | void |
860 | _initialize_aarch64_linux_nat (void) | |
861 | { | |
9d19df75 MS |
862 | add_show_debug_regs_command (); |
863 | ||
9d19df75 | 864 | /* Register the target. */ |
f6ac5f3d | 865 | linux_target = &the_aarch64_linux_nat_target; |
d9f719f1 | 866 | add_inf_child_target (&the_aarch64_linux_nat_target); |
9d19df75 | 867 | } |