sim: ft32: correct simulation of MEMCPY and MEMSET
[deliverable/binutils-gdb.git] / gdb / aarch64-linux-nat.c
CommitLineData
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1/* Native-dependent code for GNU/Linux AArch64.
2
32d0add0 3 Copyright (C) 2011-2015 Free Software Foundation, Inc.
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4 Contributed by ARM Ltd.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#include "defs.h"
22
23#include "inferior.h"
24#include "gdbcore.h"
25#include "regcache.h"
26#include "linux-nat.h"
27#include "target-descriptions.h"
28#include "auxv.h"
29#include "gdbcmd.h"
30#include "aarch64-tdep.h"
31#include "aarch64-linux-tdep.h"
607685ec 32#include "aarch32-linux-nat.h"
db3cb7cb 33#include "nat/aarch64-linux.h"
554717a3 34#include "nat/aarch64-linux-hw-point.h"
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35
36#include "elf/external.h"
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37#include "elf/common.h"
38
5826e159 39#include "nat/gdb_ptrace.h"
9d19df75 40#include <sys/utsname.h>
036cd381 41#include <asm/ptrace.h>
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42
43#include "gregset.h"
44
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45/* Defines ps_err_e, struct ps_prochandle. */
46#include "gdb_proc_service.h"
47
48#ifndef TRAP_HWBKPT
49#define TRAP_HWBKPT 0x0004
50#endif
51
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52/* Per-process data. We don't bind this to a per-inferior registry
53 because of targets like x86 GNU/Linux that need to keep track of
54 processes that aren't bound to any inferior (e.g., fork children,
55 checkpoints). */
9d19df75 56
d6c44983 57struct aarch64_process_info
9d19df75 58{
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59 /* Linked list. */
60 struct aarch64_process_info *next;
9d19df75 61
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62 /* The process identifier. */
63 pid_t pid;
9d19df75 64
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65 /* Copy of aarch64 hardware debug registers. */
66 struct aarch64_debug_reg_state state;
67};
68
69static struct aarch64_process_info *aarch64_process_list = NULL;
70
71/* Find process data for process PID. */
72
73static struct aarch64_process_info *
74aarch64_find_process_pid (pid_t pid)
75{
76 struct aarch64_process_info *proc;
77
78 for (proc = aarch64_process_list; proc; proc = proc->next)
79 if (proc->pid == pid)
80 return proc;
81
82 return NULL;
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83}
84
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85/* Add process data for process PID. Returns newly allocated info
86 object. */
9d19df75 87
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88static struct aarch64_process_info *
89aarch64_add_process (pid_t pid)
9d19df75 90{
d6c44983 91 struct aarch64_process_info *proc;
9d19df75 92
8d749320 93 proc = XCNEW (struct aarch64_process_info);
d6c44983 94 proc->pid = pid;
9d19df75 95
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96 proc->next = aarch64_process_list;
97 aarch64_process_list = proc;
98
99 return proc;
100}
101
102/* Get data specific info for process PID, creating it if necessary.
103 Never returns NULL. */
104
105static struct aarch64_process_info *
106aarch64_process_info_get (pid_t pid)
9d19df75 107{
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108 struct aarch64_process_info *proc;
109
110 proc = aarch64_find_process_pid (pid);
111 if (proc == NULL)
112 proc = aarch64_add_process (pid);
9d19df75 113
d6c44983 114 return proc;
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115}
116
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117/* Called whenever GDB is no longer debugging process PID. It deletes
118 data structures that keep track of debug register state. */
9d19df75 119
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120static void
121aarch64_forget_process (pid_t pid)
9d19df75 122{
d6c44983 123 struct aarch64_process_info *proc, **proc_link;
9d19df75 124
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125 proc = aarch64_process_list;
126 proc_link = &aarch64_process_list;
127
128 while (proc != NULL)
9d19df75 129 {
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130 if (proc->pid == pid)
131 {
132 *proc_link = proc->next;
9d19df75 133
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134 xfree (proc);
135 return;
136 }
137
138 proc_link = &proc->next;
139 proc = *proc_link;
140 }
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141}
142
d6c44983 143/* Get debug registers state for process PID. */
9d19df75 144
db3cb7cb 145struct aarch64_debug_reg_state *
d6c44983 146aarch64_get_debug_reg_state (pid_t pid)
9d19df75 147{
d6c44983 148 return &aarch64_process_info_get (pid)->state;
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149}
150
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151/* Fill GDB's register array with the general-purpose register values
152 from the current thread. */
153
154static void
155fetch_gregs_from_thread (struct regcache *regcache)
156{
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157 int ret, tid;
158 struct gdbarch *gdbarch = get_regcache_arch (regcache);
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159 elf_gregset_t regs;
160 struct iovec iovec;
161
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162 /* Make sure REGS can hold all registers contents on both aarch64
163 and arm. */
164 gdb_static_assert (sizeof (regs) >= 18 * 4);
165
d89fa914 166 tid = ptid_get_lwp (inferior_ptid);
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167
168 iovec.iov_base = &regs;
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169 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
170 iovec.iov_len = 18 * 4;
171 else
172 iovec.iov_len = sizeof (regs);
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173
174 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
175 if (ret < 0)
176 perror_with_name (_("Unable to fetch general registers."));
177
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178 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
179 aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
180 else
181 {
182 int regno;
183
184 for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
185 regcache_raw_supply (regcache, regno, &regs[regno - AARCH64_X0_REGNUM]);
186 }
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187}
188
189/* Store to the current thread the valid general-purpose register
190 values in the GDB's register array. */
191
192static void
193store_gregs_to_thread (const struct regcache *regcache)
194{
607685ec 195 int ret, tid;
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196 elf_gregset_t regs;
197 struct iovec iovec;
607685ec 198 struct gdbarch *gdbarch = get_regcache_arch (regcache);
9d19df75 199
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200 /* Make sure REGS can hold all registers contents on both aarch64
201 and arm. */
202 gdb_static_assert (sizeof (regs) >= 18 * 4);
d89fa914 203 tid = ptid_get_lwp (inferior_ptid);
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204
205 iovec.iov_base = &regs;
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206 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
207 iovec.iov_len = 18 * 4;
208 else
209 iovec.iov_len = sizeof (regs);
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210
211 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
212 if (ret < 0)
213 perror_with_name (_("Unable to fetch general registers."));
214
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215 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
216 aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
217 else
218 {
219 int regno;
220
221 for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
222 if (REG_VALID == regcache_register_status (regcache, regno))
223 regcache_raw_collect (regcache, regno,
224 &regs[regno - AARCH64_X0_REGNUM]);
225 }
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226
227 ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
228 if (ret < 0)
229 perror_with_name (_("Unable to store general registers."));
230}
231
232/* Fill GDB's register array with the fp/simd register values
233 from the current thread. */
234
235static void
236fetch_fpregs_from_thread (struct regcache *regcache)
237{
607685ec 238 int ret, tid;
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239 elf_fpregset_t regs;
240 struct iovec iovec;
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241 struct gdbarch *gdbarch = get_regcache_arch (regcache);
242
243 /* Make sure REGS can hold all VFP registers contents on both aarch64
244 and arm. */
245 gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
9d19df75 246
d89fa914 247 tid = ptid_get_lwp (inferior_ptid);
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248
249 iovec.iov_base = &regs;
9d19df75 250
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251 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
252 {
253 iovec.iov_len = VFP_REGS_SIZE;
254
255 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
256 if (ret < 0)
257 perror_with_name (_("Unable to fetch VFP registers."));
258
259 aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
260 }
261 else
262 {
263 int regno;
264
265 iovec.iov_len = sizeof (regs);
9d19df75 266
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267 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
268 if (ret < 0)
269 perror_with_name (_("Unable to fetch vFP/SIMD registers."));
9d19df75 270
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271 for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
272 regcache_raw_supply (regcache, regno,
273 &regs.vregs[regno - AARCH64_V0_REGNUM]);
274
275 regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, &regs.fpsr);
276 regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, &regs.fpcr);
277 }
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278}
279
280/* Store to the current thread the valid fp/simd register
281 values in the GDB's register array. */
282
283static void
284store_fpregs_to_thread (const struct regcache *regcache)
285{
607685ec 286 int ret, tid;
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287 elf_fpregset_t regs;
288 struct iovec iovec;
607685ec 289 struct gdbarch *gdbarch = get_regcache_arch (regcache);
9d19df75 290
607685ec
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291 /* Make sure REGS can hold all VFP registers contents on both aarch64
292 and arm. */
293 gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
d89fa914 294 tid = ptid_get_lwp (inferior_ptid);
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MS
295
296 iovec.iov_base = &regs;
9d19df75 297
607685ec
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298 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
299 {
300 iovec.iov_len = VFP_REGS_SIZE;
9d19df75 301
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302 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
303 if (ret < 0)
304 perror_with_name (_("Unable to fetch VFP registers."));
9d19df75 305
607685ec
YQ
306 aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
307 }
308 else
309 {
310 int regno;
9d19df75 311
607685ec
YQ
312 iovec.iov_len = sizeof (regs);
313
314 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
315 if (ret < 0)
316 perror_with_name (_("Unable to fetch FP/SIMD registers."));
317
318 for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
319 if (REG_VALID == regcache_register_status (regcache, regno))
320 regcache_raw_collect (regcache, regno,
321 (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
322
323 if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM))
324 regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM,
325 (char *) &regs.fpsr);
326 if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM))
327 regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM,
328 (char *) &regs.fpcr);
329 }
330
331 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
332 {
333 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
334 if (ret < 0)
335 perror_with_name (_("Unable to store VFP registers."));
336 }
337 else
338 {
339 ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
340 if (ret < 0)
341 perror_with_name (_("Unable to store FP/SIMD registers."));
342 }
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MS
343}
344
345/* Implement the "to_fetch_register" target_ops method. */
346
347static void
348aarch64_linux_fetch_inferior_registers (struct target_ops *ops,
349 struct regcache *regcache,
350 int regno)
351{
352 if (regno == -1)
353 {
354 fetch_gregs_from_thread (regcache);
355 fetch_fpregs_from_thread (regcache);
356 }
357 else if (regno < AARCH64_V0_REGNUM)
358 fetch_gregs_from_thread (regcache);
359 else
360 fetch_fpregs_from_thread (regcache);
361}
362
363/* Implement the "to_store_register" target_ops method. */
364
365static void
366aarch64_linux_store_inferior_registers (struct target_ops *ops,
367 struct regcache *regcache,
368 int regno)
369{
370 if (regno == -1)
371 {
372 store_gregs_to_thread (regcache);
373 store_fpregs_to_thread (regcache);
374 }
375 else if (regno < AARCH64_V0_REGNUM)
376 store_gregs_to_thread (regcache);
377 else
378 store_fpregs_to_thread (regcache);
379}
380
381/* Fill register REGNO (if it is a general-purpose register) in
382 *GREGSETPS with the value in GDB's register array. If REGNO is -1,
383 do this for all registers. */
384
385void
386fill_gregset (const struct regcache *regcache,
387 gdb_gregset_t *gregsetp, int regno)
388{
d4d793bf
AA
389 regcache_collect_regset (&aarch64_linux_gregset, regcache,
390 regno, (gdb_byte *) gregsetp,
391 AARCH64_LINUX_SIZEOF_GREGSET);
9d19df75
MS
392}
393
394/* Fill GDB's register array with the general-purpose register values
395 in *GREGSETP. */
396
397void
398supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
399{
d4d793bf
AA
400 regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
401 (const gdb_byte *) gregsetp,
402 AARCH64_LINUX_SIZEOF_GREGSET);
9d19df75
MS
403}
404
405/* Fill register REGNO (if it is a floating-point register) in
406 *FPREGSETP with the value in GDB's register array. If REGNO is -1,
407 do this for all registers. */
408
409void
410fill_fpregset (const struct regcache *regcache,
411 gdb_fpregset_t *fpregsetp, int regno)
412{
d4d793bf
AA
413 regcache_collect_regset (&aarch64_linux_fpregset, regcache,
414 regno, (gdb_byte *) fpregsetp,
415 AARCH64_LINUX_SIZEOF_FPREGSET);
9d19df75
MS
416}
417
418/* Fill GDB's register array with the floating-point register values
419 in *FPREGSETP. */
420
421void
422supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
423{
d4d793bf
AA
424 regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
425 (const gdb_byte *) fpregsetp,
426 AARCH64_LINUX_SIZEOF_FPREGSET);
9d19df75
MS
427}
428
d6c44983
YZ
429/* linux_nat_new_fork hook. */
430
431static void
432aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
433{
434 pid_t parent_pid;
435 struct aarch64_debug_reg_state *parent_state;
436 struct aarch64_debug_reg_state *child_state;
437
438 /* NULL means no watchpoint has ever been set in the parent. In
439 that case, there's nothing to do. */
440 if (parent->arch_private == NULL)
441 return;
442
443 /* GDB core assumes the child inherits the watchpoints/hw
444 breakpoints of the parent, and will remove them all from the
445 forked off process. Copy the debug registers mirrors into the
446 new process so that all breakpoints and watchpoints can be
447 removed together. */
448
449 parent_pid = ptid_get_pid (parent->ptid);
450 parent_state = aarch64_get_debug_reg_state (parent_pid);
451 child_state = aarch64_get_debug_reg_state (child_pid);
452 *child_state = *parent_state;
453}
9d19df75
MS
454\f
455
456/* Called by libthread_db. Returns a pointer to the thread local
457 storage (or its descriptor). */
458
459ps_err_e
460ps_get_thread_area (const struct ps_prochandle *ph,
461 lwpid_t lwpid, int idx, void **base)
462{
a0cc84cd
YQ
463 int is_64bit_p
464 = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
9d19df75 465
a0cc84cd 466 return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
9d19df75
MS
467}
468\f
469
2e97a79e
TT
470static void (*super_post_startup_inferior) (struct target_ops *self,
471 ptid_t ptid);
9d19df75
MS
472
473/* Implement the "to_post_startup_inferior" target_ops method. */
474
475static void
2e97a79e
TT
476aarch64_linux_child_post_startup_inferior (struct target_ops *self,
477 ptid_t ptid)
9d19df75 478{
d6c44983 479 aarch64_forget_process (ptid_get_pid (ptid));
af1b22f3 480 aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid));
2e97a79e 481 super_post_startup_inferior (self, ptid);
9d19df75
MS
482}
483
607685ec
YQ
484extern struct target_desc *tdesc_arm_with_vfpv3;
485extern struct target_desc *tdesc_arm_with_neon;
486
9d19df75
MS
487/* Implement the "to_read_description" target_ops method. */
488
489static const struct target_desc *
490aarch64_linux_read_description (struct target_ops *ops)
491{
607685ec
YQ
492 CORE_ADDR at_phent;
493
494 if (target_auxv_search (ops, AT_PHENT, &at_phent) == 1)
495 {
496 if (at_phent == sizeof (Elf64_External_Phdr))
497 return tdesc_aarch64;
498 else
499 {
500 CORE_ADDR arm_hwcap = 0;
501
502 if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
503 return ops->beneath->to_read_description (ops->beneath);
504
505#ifndef COMPAT_HWCAP_VFP
506#define COMPAT_HWCAP_VFP (1 << 6)
507#endif
508#ifndef COMPAT_HWCAP_NEON
509#define COMPAT_HWCAP_NEON (1 << 12)
510#endif
511#ifndef COMPAT_HWCAP_VFPv3
512#define COMPAT_HWCAP_VFPv3 (1 << 13)
513#endif
514
515 if (arm_hwcap & COMPAT_HWCAP_VFP)
516 {
517 char *buf;
518 const struct target_desc *result = NULL;
519
520 if (arm_hwcap & COMPAT_HWCAP_NEON)
521 result = tdesc_arm_with_neon;
522 else if (arm_hwcap & COMPAT_HWCAP_VFPv3)
523 result = tdesc_arm_with_vfpv3;
524
525 return result;
526 }
527
528 return NULL;
529 }
530 }
531
9d19df75
MS
532 return tdesc_aarch64;
533}
534
ade90bde
YQ
535/* Convert a native/host siginfo object, into/from the siginfo in the
536 layout of the inferiors' architecture. Returns true if any
537 conversion was done; false otherwise. If DIRECTION is 1, then copy
538 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
539 INF. */
540
541static int
542aarch64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction)
543{
544 struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
545
546 /* Is the inferior 32-bit? If so, then do fixup the siginfo
547 object. */
548 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
549 {
550 if (direction == 0)
551 aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
552 native);
553 else
554 aarch64_siginfo_from_compat_siginfo (native,
555 (struct compat_siginfo *) inf);
556
557 return 1;
558 }
559
560 return 0;
561}
562
9d19df75
MS
563/* Returns the number of hardware watchpoints of type TYPE that we can
564 set. Value is positive if we can set CNT watchpoints, zero if
565 setting watchpoints of type TYPE is not supported, and negative if
566 CNT is more than the maximum number of watchpoints of type TYPE
567 that we can support. TYPE is one of bp_hardware_watchpoint,
568 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
569 CNT is the number of such watchpoints used so far (including this
570 one). OTHERTYPE is non-zero if other types of watchpoints are
c2fbdc59 571 currently enabled. */
9d19df75
MS
572
573static int
5461485a 574aarch64_linux_can_use_hw_breakpoint (struct target_ops *self,
f486487f
SM
575 enum bptype type,
576 int cnt, int othertype)
9d19df75 577{
c2fbdc59
YQ
578 if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
579 || type == bp_access_watchpoint || type == bp_watchpoint)
580 {
581 if (aarch64_num_wp_regs == 0)
582 return 0;
583 }
584 else if (type == bp_hardware_breakpoint)
585 {
586 if (aarch64_num_bp_regs == 0)
587 return 0;
588 }
589 else
590 gdb_assert_not_reached ("unexpected breakpoint type");
591
592 /* We always return 1 here because we don't have enough information
593 about possible overlap of addresses that they want to watch. As an
594 extreme example, consider the case where all the watchpoints watch
595 the same address and the same region length: then we can handle a
596 virtually unlimited number of watchpoints, due to debug register
597 sharing implemented via reference counts. */
9d19df75
MS
598 return 1;
599}
600
0d5ed153 601/* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
9d19df75
MS
602 Return 0 on success, -1 on failure. */
603
604static int
23a26771
TT
605aarch64_linux_insert_hw_breakpoint (struct target_ops *self,
606 struct gdbarch *gdbarch,
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607 struct bp_target_info *bp_tgt)
608{
609 int ret;
0d5ed153 610 CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
9d19df75 611 const int len = 4;
2ecd81c2 612 const enum target_hw_bp_type type = hw_execute;
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613 struct aarch64_debug_reg_state *state
614 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 615
c5e92cca 616 if (show_debug_regs)
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617 fprintf_unfiltered
618 (gdb_stdlog,
619 "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
620 (unsigned long) addr, len);
621
c67ca4de 622 ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
9d19df75 623
c5e92cca 624 if (show_debug_regs)
d6c44983 625 {
d6c44983 626 aarch64_show_debug_reg_state (state,
2fd0f80d 627 "insert_hw_breakpoint", addr, len, type);
d6c44983 628 }
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629
630 return ret;
631}
632
633/* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
634 Return 0 on success, -1 on failure. */
635
636static int
a64dc96c
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637aarch64_linux_remove_hw_breakpoint (struct target_ops *self,
638 struct gdbarch *gdbarch,
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639 struct bp_target_info *bp_tgt)
640{
641 int ret;
642 CORE_ADDR addr = bp_tgt->placed_address;
643 const int len = 4;
2ecd81c2 644 const enum target_hw_bp_type type = hw_execute;
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645 struct aarch64_debug_reg_state *state
646 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 647
c5e92cca 648 if (show_debug_regs)
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649 fprintf_unfiltered
650 (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
651 (unsigned long) addr, len);
652
c67ca4de 653 ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
9d19df75 654
c5e92cca 655 if (show_debug_regs)
d6c44983 656 {
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657 aarch64_show_debug_reg_state (state,
658 "remove_hw_watchpoint", addr, len, type);
659 }
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660
661 return ret;
662}
663
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664/* Implement the "to_insert_watchpoint" target_ops method.
665
666 Insert a watchpoint to watch a memory region which starts at
667 address ADDR and whose length is LEN bytes. Watch memory accesses
668 of the type TYPE. Return 0 on success, -1 on failure. */
669
670static int
7bb99c53 671aarch64_linux_insert_watchpoint (struct target_ops *self,
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672 CORE_ADDR addr, int len,
673 enum target_hw_bp_type type,
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674 struct expression *cond)
675{
676 int ret;
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677 struct aarch64_debug_reg_state *state
678 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 679
c5e92cca 680 if (show_debug_regs)
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681 fprintf_unfiltered (gdb_stdlog,
682 "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
683 (unsigned long) addr, len);
684
685 gdb_assert (type != hw_execute);
686
c67ca4de 687 ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
9d19df75 688
c5e92cca 689 if (show_debug_regs)
d6c44983 690 {
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691 aarch64_show_debug_reg_state (state,
692 "insert_watchpoint", addr, len, type);
693 }
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694
695 return ret;
696}
697
698/* Implement the "to_remove_watchpoint" target_ops method.
699 Remove a watchpoint that watched the memory region which starts at
700 address ADDR, whose length is LEN bytes, and for accesses of the
701 type TYPE. Return 0 on success, -1 on failure. */
702
703static int
11b5219a 704aarch64_linux_remove_watchpoint (struct target_ops *self,
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705 CORE_ADDR addr, int len,
706 enum target_hw_bp_type type,
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707 struct expression *cond)
708{
709 int ret;
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710 struct aarch64_debug_reg_state *state
711 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 712
c5e92cca 713 if (show_debug_regs)
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714 fprintf_unfiltered (gdb_stdlog,
715 "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
716 (unsigned long) addr, len);
717
718 gdb_assert (type != hw_execute);
719
c67ca4de 720 ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
9d19df75 721
c5e92cca 722 if (show_debug_regs)
d6c44983 723 {
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724 aarch64_show_debug_reg_state (state,
725 "remove_watchpoint", addr, len, type);
726 }
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727
728 return ret;
729}
730
731/* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */
732
733static int
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TT
734aarch64_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
735 CORE_ADDR addr, int len)
9d19df75 736{
39edd165 737 return aarch64_linux_region_ok_for_watchpoint (addr, len);
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738}
739
740/* Implement the "to_stopped_data_address" target_ops method. */
741
742static int
743aarch64_linux_stopped_data_address (struct target_ops *target,
744 CORE_ADDR *addr_p)
745{
746 siginfo_t siginfo;
747 int i, tid;
748 struct aarch64_debug_reg_state *state;
749
750 if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
751 return 0;
752
753 /* This must be a hardware breakpoint. */
754 if (siginfo.si_signo != SIGTRAP
755 || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
756 return 0;
757
758 /* Check if the address matches any watched address. */
d6c44983 759 state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
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760 for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
761 {
762 const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
763 const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
764 const CORE_ADDR addr_watch = state->dr_addr_wp[i];
765
766 if (state->dr_ref_count_wp[i]
767 && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
768 && addr_trap >= addr_watch
769 && addr_trap < addr_watch + len)
770 {
771 *addr_p = addr_trap;
772 return 1;
773 }
774 }
775
776 return 0;
777}
778
779/* Implement the "to_stopped_by_watchpoint" target_ops method. */
780
781static int
6a109b6b 782aarch64_linux_stopped_by_watchpoint (struct target_ops *ops)
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783{
784 CORE_ADDR addr;
785
6a109b6b 786 return aarch64_linux_stopped_data_address (ops, &addr);
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787}
788
789/* Implement the "to_watchpoint_addr_within_range" target_ops method. */
790
791static int
792aarch64_linux_watchpoint_addr_within_range (struct target_ops *target,
793 CORE_ADDR addr,
794 CORE_ADDR start, int length)
795{
796 return start <= addr && start + length - 1 >= addr;
797}
798
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799/* Implement the "to_can_do_single_step" target_ops method. */
800
801static int
802aarch64_linux_can_do_single_step (struct target_ops *target)
803{
804 return 1;
805}
806
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807/* Define AArch64 maintenance commands. */
808
809static void
810add_show_debug_regs_command (void)
811{
812 /* A maintenance command to enable printing the internal DRi mirror
813 variables. */
814 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
c5e92cca 815 &show_debug_regs, _("\
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816Set whether to show variables that mirror the AArch64 debug registers."), _("\
817Show whether to show variables that mirror the AArch64 debug registers."), _("\
818Use \"on\" to enable, \"off\" to disable.\n\
819If enabled, the debug registers values are shown when GDB inserts\n\
820or removes a hardware breakpoint or watchpoint, and when the inferior\n\
821triggers a breakpoint or watchpoint."),
822 NULL,
823 NULL,
824 &maintenance_set_cmdlist,
825 &maintenance_show_cmdlist);
826}
827
828/* -Wmissing-prototypes. */
829void _initialize_aarch64_linux_nat (void);
830
831void
832_initialize_aarch64_linux_nat (void)
833{
834 struct target_ops *t;
835
836 /* Fill in the generic GNU/Linux methods. */
837 t = linux_target ();
838
839 add_show_debug_regs_command ();
840
841 /* Add our register access methods. */
842 t->to_fetch_registers = aarch64_linux_fetch_inferior_registers;
843 t->to_store_registers = aarch64_linux_store_inferior_registers;
844
845 t->to_read_description = aarch64_linux_read_description;
846
847 t->to_can_use_hw_breakpoint = aarch64_linux_can_use_hw_breakpoint;
848 t->to_insert_hw_breakpoint = aarch64_linux_insert_hw_breakpoint;
849 t->to_remove_hw_breakpoint = aarch64_linux_remove_hw_breakpoint;
850 t->to_region_ok_for_hw_watchpoint =
851 aarch64_linux_region_ok_for_hw_watchpoint;
852 t->to_insert_watchpoint = aarch64_linux_insert_watchpoint;
853 t->to_remove_watchpoint = aarch64_linux_remove_watchpoint;
854 t->to_stopped_by_watchpoint = aarch64_linux_stopped_by_watchpoint;
855 t->to_stopped_data_address = aarch64_linux_stopped_data_address;
856 t->to_watchpoint_addr_within_range =
857 aarch64_linux_watchpoint_addr_within_range;
750ce8d1 858 t->to_can_do_single_step = aarch64_linux_can_do_single_step;
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859
860 /* Override the GNU/Linux inferior startup hook. */
861 super_post_startup_inferior = t->to_post_startup_inferior;
862 t->to_post_startup_inferior = aarch64_linux_child_post_startup_inferior;
863
864 /* Register the target. */
865 linux_nat_add_target (t);
866 linux_nat_set_new_thread (t, aarch64_linux_new_thread);
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867 linux_nat_set_new_fork (t, aarch64_linux_new_fork);
868 linux_nat_set_forget_process (t, aarch64_forget_process);
9d19df75 869 linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume);
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870
871 /* Add our siginfo layout converter. */
872 linux_nat_set_siginfo_fixup (t, aarch64_linux_siginfo_fixup);
9d19df75 873}
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