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9d19df75 MS |
1 | /* Native-dependent code for GNU/Linux AArch64. |
2 | ||
32d0add0 | 3 | Copyright (C) 2011-2015 Free Software Foundation, Inc. |
9d19df75 MS |
4 | Contributed by ARM Ltd. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "defs.h" | |
22 | ||
23 | #include "inferior.h" | |
24 | #include "gdbcore.h" | |
25 | #include "regcache.h" | |
26 | #include "linux-nat.h" | |
27 | #include "target-descriptions.h" | |
28 | #include "auxv.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "aarch64-tdep.h" | |
31 | #include "aarch64-linux-tdep.h" | |
607685ec | 32 | #include "aarch32-linux-nat.h" |
554717a3 | 33 | #include "nat/aarch64-linux-hw-point.h" |
607685ec YQ |
34 | |
35 | #include "elf/external.h" | |
9d19df75 MS |
36 | #include "elf/common.h" |
37 | ||
5826e159 | 38 | #include "nat/gdb_ptrace.h" |
9d19df75 | 39 | #include <sys/utsname.h> |
036cd381 | 40 | #include <asm/ptrace.h> |
9d19df75 MS |
41 | |
42 | #include "gregset.h" | |
43 | ||
9d19df75 MS |
44 | /* Defines ps_err_e, struct ps_prochandle. */ |
45 | #include "gdb_proc_service.h" | |
46 | ||
47 | #ifndef TRAP_HWBKPT | |
48 | #define TRAP_HWBKPT 0x0004 | |
49 | #endif | |
50 | ||
d6c44983 YZ |
51 | /* Per-process data. We don't bind this to a per-inferior registry |
52 | because of targets like x86 GNU/Linux that need to keep track of | |
53 | processes that aren't bound to any inferior (e.g., fork children, | |
54 | checkpoints). */ | |
9d19df75 | 55 | |
d6c44983 | 56 | struct aarch64_process_info |
9d19df75 | 57 | { |
d6c44983 YZ |
58 | /* Linked list. */ |
59 | struct aarch64_process_info *next; | |
9d19df75 | 60 | |
d6c44983 YZ |
61 | /* The process identifier. */ |
62 | pid_t pid; | |
9d19df75 | 63 | |
d6c44983 YZ |
64 | /* Copy of aarch64 hardware debug registers. */ |
65 | struct aarch64_debug_reg_state state; | |
66 | }; | |
67 | ||
68 | static struct aarch64_process_info *aarch64_process_list = NULL; | |
69 | ||
70 | /* Find process data for process PID. */ | |
71 | ||
72 | static struct aarch64_process_info * | |
73 | aarch64_find_process_pid (pid_t pid) | |
74 | { | |
75 | struct aarch64_process_info *proc; | |
76 | ||
77 | for (proc = aarch64_process_list; proc; proc = proc->next) | |
78 | if (proc->pid == pid) | |
79 | return proc; | |
80 | ||
81 | return NULL; | |
9d19df75 MS |
82 | } |
83 | ||
d6c44983 YZ |
84 | /* Add process data for process PID. Returns newly allocated info |
85 | object. */ | |
9d19df75 | 86 | |
d6c44983 YZ |
87 | static struct aarch64_process_info * |
88 | aarch64_add_process (pid_t pid) | |
9d19df75 | 89 | { |
d6c44983 | 90 | struct aarch64_process_info *proc; |
9d19df75 | 91 | |
d6c44983 YZ |
92 | proc = xcalloc (1, sizeof (*proc)); |
93 | proc->pid = pid; | |
9d19df75 | 94 | |
d6c44983 YZ |
95 | proc->next = aarch64_process_list; |
96 | aarch64_process_list = proc; | |
97 | ||
98 | return proc; | |
99 | } | |
100 | ||
101 | /* Get data specific info for process PID, creating it if necessary. | |
102 | Never returns NULL. */ | |
103 | ||
104 | static struct aarch64_process_info * | |
105 | aarch64_process_info_get (pid_t pid) | |
9d19df75 | 106 | { |
d6c44983 YZ |
107 | struct aarch64_process_info *proc; |
108 | ||
109 | proc = aarch64_find_process_pid (pid); | |
110 | if (proc == NULL) | |
111 | proc = aarch64_add_process (pid); | |
9d19df75 | 112 | |
d6c44983 | 113 | return proc; |
9d19df75 MS |
114 | } |
115 | ||
d6c44983 YZ |
116 | /* Called whenever GDB is no longer debugging process PID. It deletes |
117 | data structures that keep track of debug register state. */ | |
9d19df75 | 118 | |
d6c44983 YZ |
119 | static void |
120 | aarch64_forget_process (pid_t pid) | |
9d19df75 | 121 | { |
d6c44983 | 122 | struct aarch64_process_info *proc, **proc_link; |
9d19df75 | 123 | |
d6c44983 YZ |
124 | proc = aarch64_process_list; |
125 | proc_link = &aarch64_process_list; | |
126 | ||
127 | while (proc != NULL) | |
9d19df75 | 128 | { |
d6c44983 YZ |
129 | if (proc->pid == pid) |
130 | { | |
131 | *proc_link = proc->next; | |
9d19df75 | 132 | |
d6c44983 YZ |
133 | xfree (proc); |
134 | return; | |
135 | } | |
136 | ||
137 | proc_link = &proc->next; | |
138 | proc = *proc_link; | |
139 | } | |
9d19df75 MS |
140 | } |
141 | ||
d6c44983 | 142 | /* Get debug registers state for process PID. */ |
9d19df75 MS |
143 | |
144 | static struct aarch64_debug_reg_state * | |
d6c44983 | 145 | aarch64_get_debug_reg_state (pid_t pid) |
9d19df75 | 146 | { |
d6c44983 | 147 | return &aarch64_process_info_get (pid)->state; |
9d19df75 MS |
148 | } |
149 | ||
9d19df75 MS |
150 | struct aarch64_dr_update_callback_param |
151 | { | |
152 | int is_watchpoint; | |
153 | unsigned int idx; | |
154 | }; | |
155 | ||
d6c44983 | 156 | /* Callback for iterate_over_lwps. Records the |
9d19df75 MS |
157 | information about the change of one hardware breakpoint/watchpoint |
158 | setting for the thread LWP. | |
159 | The information is passed in via PTR. | |
160 | N.B. The actual updating of hardware debug registers is not | |
161 | carried out until the moment the thread is resumed. */ | |
162 | ||
163 | static int | |
164 | debug_reg_change_callback (struct lwp_info *lwp, void *ptr) | |
165 | { | |
166 | struct aarch64_dr_update_callback_param *param_p | |
167 | = (struct aarch64_dr_update_callback_param *) ptr; | |
d89fa914 | 168 | int pid = ptid_get_lwp (lwp->ptid); |
9d19df75 MS |
169 | int idx = param_p->idx; |
170 | int is_watchpoint = param_p->is_watchpoint; | |
171 | struct arch_lwp_info *info = lwp->arch_private; | |
172 | dr_changed_t *dr_changed_ptr; | |
173 | dr_changed_t dr_changed; | |
174 | ||
175 | if (info == NULL) | |
176 | info = lwp->arch_private = XCNEW (struct arch_lwp_info); | |
177 | ||
c5e92cca | 178 | if (show_debug_regs) |
9d19df75 MS |
179 | { |
180 | fprintf_unfiltered (gdb_stdlog, | |
181 | "debug_reg_change_callback: \n\tOn entry:\n"); | |
182 | fprintf_unfiltered (gdb_stdlog, | |
1d3ffd6b MS |
183 | "\tpid%d, dr_changed_bp=0x%s, " |
184 | "dr_changed_wp=0x%s\n", | |
185 | pid, phex (info->dr_changed_bp, 8), | |
186 | phex (info->dr_changed_wp, 8)); | |
9d19df75 MS |
187 | } |
188 | ||
189 | dr_changed_ptr = is_watchpoint ? &info->dr_changed_wp | |
190 | : &info->dr_changed_bp; | |
191 | dr_changed = *dr_changed_ptr; | |
192 | ||
193 | gdb_assert (idx >= 0 | |
194 | && (idx <= (is_watchpoint ? aarch64_num_wp_regs | |
195 | : aarch64_num_bp_regs))); | |
196 | ||
197 | /* The actual update is done later just before resuming the lwp, | |
198 | we just mark that one register pair needs updating. */ | |
199 | DR_MARK_N_CHANGED (dr_changed, idx); | |
200 | *dr_changed_ptr = dr_changed; | |
201 | ||
202 | /* If the lwp isn't stopped, force it to momentarily pause, so | |
203 | we can update its debug registers. */ | |
204 | if (!lwp->stopped) | |
205 | linux_stop_lwp (lwp); | |
206 | ||
c5e92cca | 207 | if (show_debug_regs) |
9d19df75 MS |
208 | { |
209 | fprintf_unfiltered (gdb_stdlog, | |
1d3ffd6b MS |
210 | "\tOn exit:\n\tpid%d, dr_changed_bp=0x%s, " |
211 | "dr_changed_wp=0x%s\n", | |
212 | pid, phex (info->dr_changed_bp, 8), | |
213 | phex (info->dr_changed_wp, 8)); | |
9d19df75 MS |
214 | } |
215 | ||
216 | /* Continue the iteration. */ | |
217 | return 0; | |
218 | } | |
219 | ||
220 | /* Notify each thread that their IDXth breakpoint/watchpoint register | |
221 | pair needs to be updated. The message will be recorded in each | |
222 | thread's arch-specific data area, the actual updating will be done | |
223 | when the thread is resumed. */ | |
224 | ||
554717a3 | 225 | void |
9d19df75 MS |
226 | aarch64_notify_debug_reg_change (const struct aarch64_debug_reg_state *state, |
227 | int is_watchpoint, unsigned int idx) | |
228 | { | |
229 | struct aarch64_dr_update_callback_param param; | |
d6c44983 | 230 | ptid_t pid_ptid = pid_to_ptid (ptid_get_pid (inferior_ptid)); |
9d19df75 MS |
231 | |
232 | param.is_watchpoint = is_watchpoint; | |
233 | param.idx = idx; | |
234 | ||
d6c44983 | 235 | iterate_over_lwps (pid_ptid, debug_reg_change_callback, (void *) ¶m); |
9d19df75 MS |
236 | } |
237 | ||
9d19df75 MS |
238 | /* Fill GDB's register array with the general-purpose register values |
239 | from the current thread. */ | |
240 | ||
241 | static void | |
242 | fetch_gregs_from_thread (struct regcache *regcache) | |
243 | { | |
607685ec YQ |
244 | int ret, tid; |
245 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
9d19df75 MS |
246 | elf_gregset_t regs; |
247 | struct iovec iovec; | |
248 | ||
607685ec YQ |
249 | /* Make sure REGS can hold all registers contents on both aarch64 |
250 | and arm. */ | |
251 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
252 | ||
d89fa914 | 253 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
254 | |
255 | iovec.iov_base = ®s; | |
607685ec YQ |
256 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
257 | iovec.iov_len = 18 * 4; | |
258 | else | |
259 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
260 | |
261 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
262 | if (ret < 0) | |
263 | perror_with_name (_("Unable to fetch general registers.")); | |
264 | ||
607685ec YQ |
265 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
266 | aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1); | |
267 | else | |
268 | { | |
269 | int regno; | |
270 | ||
271 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
272 | regcache_raw_supply (regcache, regno, ®s[regno - AARCH64_X0_REGNUM]); | |
273 | } | |
9d19df75 MS |
274 | } |
275 | ||
276 | /* Store to the current thread the valid general-purpose register | |
277 | values in the GDB's register array. */ | |
278 | ||
279 | static void | |
280 | store_gregs_to_thread (const struct regcache *regcache) | |
281 | { | |
607685ec | 282 | int ret, tid; |
9d19df75 MS |
283 | elf_gregset_t regs; |
284 | struct iovec iovec; | |
607685ec | 285 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
9d19df75 | 286 | |
607685ec YQ |
287 | /* Make sure REGS can hold all registers contents on both aarch64 |
288 | and arm. */ | |
289 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
d89fa914 | 290 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
291 | |
292 | iovec.iov_base = ®s; | |
607685ec YQ |
293 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
294 | iovec.iov_len = 18 * 4; | |
295 | else | |
296 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
297 | |
298 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
299 | if (ret < 0) | |
300 | perror_with_name (_("Unable to fetch general registers.")); | |
301 | ||
607685ec YQ |
302 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
303 | aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1); | |
304 | else | |
305 | { | |
306 | int regno; | |
307 | ||
308 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
309 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
310 | regcache_raw_collect (regcache, regno, | |
311 | ®s[regno - AARCH64_X0_REGNUM]); | |
312 | } | |
9d19df75 MS |
313 | |
314 | ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec); | |
315 | if (ret < 0) | |
316 | perror_with_name (_("Unable to store general registers.")); | |
317 | } | |
318 | ||
319 | /* Fill GDB's register array with the fp/simd register values | |
320 | from the current thread. */ | |
321 | ||
322 | static void | |
323 | fetch_fpregs_from_thread (struct regcache *regcache) | |
324 | { | |
607685ec | 325 | int ret, tid; |
9d19df75 MS |
326 | elf_fpregset_t regs; |
327 | struct iovec iovec; | |
607685ec YQ |
328 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
329 | ||
330 | /* Make sure REGS can hold all VFP registers contents on both aarch64 | |
331 | and arm. */ | |
332 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
9d19df75 | 333 | |
d89fa914 | 334 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
335 | |
336 | iovec.iov_base = ®s; | |
9d19df75 | 337 | |
607685ec YQ |
338 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
339 | { | |
340 | iovec.iov_len = VFP_REGS_SIZE; | |
341 | ||
342 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); | |
343 | if (ret < 0) | |
344 | perror_with_name (_("Unable to fetch VFP registers.")); | |
345 | ||
346 | aarch32_vfp_regcache_supply (regcache, (gdb_byte *) ®s, 32); | |
347 | } | |
348 | else | |
349 | { | |
350 | int regno; | |
351 | ||
352 | iovec.iov_len = sizeof (regs); | |
9d19df75 | 353 | |
607685ec YQ |
354 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); |
355 | if (ret < 0) | |
356 | perror_with_name (_("Unable to fetch vFP/SIMD registers.")); | |
9d19df75 | 357 | |
607685ec YQ |
358 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) |
359 | regcache_raw_supply (regcache, regno, | |
360 | ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
361 | ||
362 | regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, ®s.fpsr); | |
363 | regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, ®s.fpcr); | |
364 | } | |
9d19df75 MS |
365 | } |
366 | ||
367 | /* Store to the current thread the valid fp/simd register | |
368 | values in the GDB's register array. */ | |
369 | ||
370 | static void | |
371 | store_fpregs_to_thread (const struct regcache *regcache) | |
372 | { | |
607685ec | 373 | int ret, tid; |
9d19df75 MS |
374 | elf_fpregset_t regs; |
375 | struct iovec iovec; | |
607685ec | 376 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
9d19df75 | 377 | |
607685ec YQ |
378 | /* Make sure REGS can hold all VFP registers contents on both aarch64 |
379 | and arm. */ | |
380 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
d89fa914 | 381 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
382 | |
383 | iovec.iov_base = ®s; | |
9d19df75 | 384 | |
607685ec YQ |
385 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
386 | { | |
387 | iovec.iov_len = VFP_REGS_SIZE; | |
9d19df75 | 388 | |
607685ec YQ |
389 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); |
390 | if (ret < 0) | |
391 | perror_with_name (_("Unable to fetch VFP registers.")); | |
9d19df75 | 392 | |
607685ec YQ |
393 | aarch32_vfp_regcache_collect (regcache, (gdb_byte *) ®s, 32); |
394 | } | |
395 | else | |
396 | { | |
397 | int regno; | |
9d19df75 | 398 | |
607685ec YQ |
399 | iovec.iov_len = sizeof (regs); |
400 | ||
401 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); | |
402 | if (ret < 0) | |
403 | perror_with_name (_("Unable to fetch FP/SIMD registers.")); | |
404 | ||
405 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) | |
406 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
407 | regcache_raw_collect (regcache, regno, | |
408 | (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
409 | ||
410 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM)) | |
411 | regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM, | |
412 | (char *) ®s.fpsr); | |
413 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM)) | |
414 | regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM, | |
415 | (char *) ®s.fpcr); | |
416 | } | |
417 | ||
418 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) | |
419 | { | |
420 | ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec); | |
421 | if (ret < 0) | |
422 | perror_with_name (_("Unable to store VFP registers.")); | |
423 | } | |
424 | else | |
425 | { | |
426 | ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec); | |
427 | if (ret < 0) | |
428 | perror_with_name (_("Unable to store FP/SIMD registers.")); | |
429 | } | |
9d19df75 MS |
430 | } |
431 | ||
432 | /* Implement the "to_fetch_register" target_ops method. */ | |
433 | ||
434 | static void | |
435 | aarch64_linux_fetch_inferior_registers (struct target_ops *ops, | |
436 | struct regcache *regcache, | |
437 | int regno) | |
438 | { | |
439 | if (regno == -1) | |
440 | { | |
441 | fetch_gregs_from_thread (regcache); | |
442 | fetch_fpregs_from_thread (regcache); | |
443 | } | |
444 | else if (regno < AARCH64_V0_REGNUM) | |
445 | fetch_gregs_from_thread (regcache); | |
446 | else | |
447 | fetch_fpregs_from_thread (regcache); | |
448 | } | |
449 | ||
450 | /* Implement the "to_store_register" target_ops method. */ | |
451 | ||
452 | static void | |
453 | aarch64_linux_store_inferior_registers (struct target_ops *ops, | |
454 | struct regcache *regcache, | |
455 | int regno) | |
456 | { | |
457 | if (regno == -1) | |
458 | { | |
459 | store_gregs_to_thread (regcache); | |
460 | store_fpregs_to_thread (regcache); | |
461 | } | |
462 | else if (regno < AARCH64_V0_REGNUM) | |
463 | store_gregs_to_thread (regcache); | |
464 | else | |
465 | store_fpregs_to_thread (regcache); | |
466 | } | |
467 | ||
468 | /* Fill register REGNO (if it is a general-purpose register) in | |
469 | *GREGSETPS with the value in GDB's register array. If REGNO is -1, | |
470 | do this for all registers. */ | |
471 | ||
472 | void | |
473 | fill_gregset (const struct regcache *regcache, | |
474 | gdb_gregset_t *gregsetp, int regno) | |
475 | { | |
d4d793bf AA |
476 | regcache_collect_regset (&aarch64_linux_gregset, regcache, |
477 | regno, (gdb_byte *) gregsetp, | |
478 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
479 | } |
480 | ||
481 | /* Fill GDB's register array with the general-purpose register values | |
482 | in *GREGSETP. */ | |
483 | ||
484 | void | |
485 | supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | |
486 | { | |
d4d793bf AA |
487 | regcache_supply_regset (&aarch64_linux_gregset, regcache, -1, |
488 | (const gdb_byte *) gregsetp, | |
489 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
490 | } |
491 | ||
492 | /* Fill register REGNO (if it is a floating-point register) in | |
493 | *FPREGSETP with the value in GDB's register array. If REGNO is -1, | |
494 | do this for all registers. */ | |
495 | ||
496 | void | |
497 | fill_fpregset (const struct regcache *regcache, | |
498 | gdb_fpregset_t *fpregsetp, int regno) | |
499 | { | |
d4d793bf AA |
500 | regcache_collect_regset (&aarch64_linux_fpregset, regcache, |
501 | regno, (gdb_byte *) fpregsetp, | |
502 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
503 | } |
504 | ||
505 | /* Fill GDB's register array with the floating-point register values | |
506 | in *FPREGSETP. */ | |
507 | ||
508 | void | |
509 | supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | |
510 | { | |
d4d793bf AA |
511 | regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1, |
512 | (const gdb_byte *) fpregsetp, | |
513 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
514 | } |
515 | ||
516 | /* Called when resuming a thread. | |
517 | The hardware debug registers are updated when there is any change. */ | |
518 | ||
519 | static void | |
520 | aarch64_linux_prepare_to_resume (struct lwp_info *lwp) | |
521 | { | |
522 | struct arch_lwp_info *info = lwp->arch_private; | |
523 | ||
524 | /* NULL means this is the main thread still going through the shell, | |
525 | or, no watchpoint has been set yet. In that case, there's | |
526 | nothing to do. */ | |
527 | if (info == NULL) | |
528 | return; | |
529 | ||
530 | if (DR_HAS_CHANGED (info->dr_changed_bp) | |
531 | || DR_HAS_CHANGED (info->dr_changed_wp)) | |
532 | { | |
dfd4cc63 | 533 | int tid = ptid_get_lwp (lwp->ptid); |
d6c44983 YZ |
534 | struct aarch64_debug_reg_state *state |
535 | = aarch64_get_debug_reg_state (ptid_get_pid (lwp->ptid)); | |
9d19df75 | 536 | |
c5e92cca | 537 | if (show_debug_regs) |
9d19df75 MS |
538 | fprintf_unfiltered (gdb_stdlog, "prepare_to_resume thread %d\n", tid); |
539 | ||
540 | /* Watchpoints. */ | |
541 | if (DR_HAS_CHANGED (info->dr_changed_wp)) | |
542 | { | |
543 | aarch64_linux_set_debug_regs (state, tid, 1); | |
544 | DR_CLEAR_CHANGED (info->dr_changed_wp); | |
545 | } | |
546 | ||
547 | /* Breakpoints. */ | |
548 | if (DR_HAS_CHANGED (info->dr_changed_bp)) | |
549 | { | |
550 | aarch64_linux_set_debug_regs (state, tid, 0); | |
551 | DR_CLEAR_CHANGED (info->dr_changed_bp); | |
552 | } | |
553 | } | |
554 | } | |
555 | ||
556 | static void | |
557 | aarch64_linux_new_thread (struct lwp_info *lp) | |
558 | { | |
559 | struct arch_lwp_info *info = XCNEW (struct arch_lwp_info); | |
560 | ||
561 | /* Mark that all the hardware breakpoint/watchpoint register pairs | |
562 | for this thread need to be initialized. */ | |
563 | DR_MARK_ALL_CHANGED (info->dr_changed_bp, aarch64_num_bp_regs); | |
564 | DR_MARK_ALL_CHANGED (info->dr_changed_wp, aarch64_num_wp_regs); | |
565 | ||
566 | lp->arch_private = info; | |
567 | } | |
d6c44983 YZ |
568 | |
569 | /* linux_nat_new_fork hook. */ | |
570 | ||
571 | static void | |
572 | aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid) | |
573 | { | |
574 | pid_t parent_pid; | |
575 | struct aarch64_debug_reg_state *parent_state; | |
576 | struct aarch64_debug_reg_state *child_state; | |
577 | ||
578 | /* NULL means no watchpoint has ever been set in the parent. In | |
579 | that case, there's nothing to do. */ | |
580 | if (parent->arch_private == NULL) | |
581 | return; | |
582 | ||
583 | /* GDB core assumes the child inherits the watchpoints/hw | |
584 | breakpoints of the parent, and will remove them all from the | |
585 | forked off process. Copy the debug registers mirrors into the | |
586 | new process so that all breakpoints and watchpoints can be | |
587 | removed together. */ | |
588 | ||
589 | parent_pid = ptid_get_pid (parent->ptid); | |
590 | parent_state = aarch64_get_debug_reg_state (parent_pid); | |
591 | child_state = aarch64_get_debug_reg_state (child_pid); | |
592 | *child_state = *parent_state; | |
593 | } | |
9d19df75 MS |
594 | \f |
595 | ||
596 | /* Called by libthread_db. Returns a pointer to the thread local | |
597 | storage (or its descriptor). */ | |
598 | ||
599 | ps_err_e | |
600 | ps_get_thread_area (const struct ps_prochandle *ph, | |
601 | lwpid_t lwpid, int idx, void **base) | |
602 | { | |
603 | struct iovec iovec; | |
604 | uint64_t reg; | |
605 | ||
606 | iovec.iov_base = ® | |
607 | iovec.iov_len = sizeof (reg); | |
608 | ||
609 | if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0) | |
610 | return PS_ERR; | |
611 | ||
612 | /* IDX is the bias from the thread pointer to the beginning of the | |
613 | thread descriptor. It has to be subtracted due to implementation | |
614 | quirks in libthread_db. */ | |
615 | *base = (void *) (reg - idx); | |
616 | ||
617 | return PS_OK; | |
618 | } | |
619 | \f | |
620 | ||
2e97a79e TT |
621 | static void (*super_post_startup_inferior) (struct target_ops *self, |
622 | ptid_t ptid); | |
9d19df75 MS |
623 | |
624 | /* Implement the "to_post_startup_inferior" target_ops method. */ | |
625 | ||
626 | static void | |
2e97a79e TT |
627 | aarch64_linux_child_post_startup_inferior (struct target_ops *self, |
628 | ptid_t ptid) | |
9d19df75 | 629 | { |
d6c44983 | 630 | aarch64_forget_process (ptid_get_pid (ptid)); |
af1b22f3 | 631 | aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid)); |
2e97a79e | 632 | super_post_startup_inferior (self, ptid); |
9d19df75 MS |
633 | } |
634 | ||
607685ec YQ |
635 | extern struct target_desc *tdesc_arm_with_vfpv3; |
636 | extern struct target_desc *tdesc_arm_with_neon; | |
637 | ||
9d19df75 MS |
638 | /* Implement the "to_read_description" target_ops method. */ |
639 | ||
640 | static const struct target_desc * | |
641 | aarch64_linux_read_description (struct target_ops *ops) | |
642 | { | |
607685ec YQ |
643 | CORE_ADDR at_phent; |
644 | ||
645 | if (target_auxv_search (ops, AT_PHENT, &at_phent) == 1) | |
646 | { | |
647 | if (at_phent == sizeof (Elf64_External_Phdr)) | |
648 | return tdesc_aarch64; | |
649 | else | |
650 | { | |
651 | CORE_ADDR arm_hwcap = 0; | |
652 | ||
653 | if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1) | |
654 | return ops->beneath->to_read_description (ops->beneath); | |
655 | ||
656 | #ifndef COMPAT_HWCAP_VFP | |
657 | #define COMPAT_HWCAP_VFP (1 << 6) | |
658 | #endif | |
659 | #ifndef COMPAT_HWCAP_NEON | |
660 | #define COMPAT_HWCAP_NEON (1 << 12) | |
661 | #endif | |
662 | #ifndef COMPAT_HWCAP_VFPv3 | |
663 | #define COMPAT_HWCAP_VFPv3 (1 << 13) | |
664 | #endif | |
665 | ||
666 | if (arm_hwcap & COMPAT_HWCAP_VFP) | |
667 | { | |
668 | char *buf; | |
669 | const struct target_desc *result = NULL; | |
670 | ||
671 | if (arm_hwcap & COMPAT_HWCAP_NEON) | |
672 | result = tdesc_arm_with_neon; | |
673 | else if (arm_hwcap & COMPAT_HWCAP_VFPv3) | |
674 | result = tdesc_arm_with_vfpv3; | |
675 | ||
676 | return result; | |
677 | } | |
678 | ||
679 | return NULL; | |
680 | } | |
681 | } | |
682 | ||
9d19df75 MS |
683 | return tdesc_aarch64; |
684 | } | |
685 | ||
9d19df75 MS |
686 | /* Returns the number of hardware watchpoints of type TYPE that we can |
687 | set. Value is positive if we can set CNT watchpoints, zero if | |
688 | setting watchpoints of type TYPE is not supported, and negative if | |
689 | CNT is more than the maximum number of watchpoints of type TYPE | |
690 | that we can support. TYPE is one of bp_hardware_watchpoint, | |
691 | bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint. | |
692 | CNT is the number of such watchpoints used so far (including this | |
693 | one). OTHERTYPE is non-zero if other types of watchpoints are | |
c2fbdc59 | 694 | currently enabled. */ |
9d19df75 MS |
695 | |
696 | static int | |
5461485a | 697 | aarch64_linux_can_use_hw_breakpoint (struct target_ops *self, |
f486487f SM |
698 | enum bptype type, |
699 | int cnt, int othertype) | |
9d19df75 | 700 | { |
c2fbdc59 YQ |
701 | if (type == bp_hardware_watchpoint || type == bp_read_watchpoint |
702 | || type == bp_access_watchpoint || type == bp_watchpoint) | |
703 | { | |
704 | if (aarch64_num_wp_regs == 0) | |
705 | return 0; | |
706 | } | |
707 | else if (type == bp_hardware_breakpoint) | |
708 | { | |
709 | if (aarch64_num_bp_regs == 0) | |
710 | return 0; | |
711 | } | |
712 | else | |
713 | gdb_assert_not_reached ("unexpected breakpoint type"); | |
714 | ||
715 | /* We always return 1 here because we don't have enough information | |
716 | about possible overlap of addresses that they want to watch. As an | |
717 | extreme example, consider the case where all the watchpoints watch | |
718 | the same address and the same region length: then we can handle a | |
719 | virtually unlimited number of watchpoints, due to debug register | |
720 | sharing implemented via reference counts. */ | |
9d19df75 MS |
721 | return 1; |
722 | } | |
723 | ||
0d5ed153 | 724 | /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address. |
9d19df75 MS |
725 | Return 0 on success, -1 on failure. */ |
726 | ||
727 | static int | |
23a26771 TT |
728 | aarch64_linux_insert_hw_breakpoint (struct target_ops *self, |
729 | struct gdbarch *gdbarch, | |
9d19df75 MS |
730 | struct bp_target_info *bp_tgt) |
731 | { | |
732 | int ret; | |
0d5ed153 | 733 | CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; |
9d19df75 | 734 | const int len = 4; |
2ecd81c2 | 735 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
736 | struct aarch64_debug_reg_state *state |
737 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 738 | |
c5e92cca | 739 | if (show_debug_regs) |
9d19df75 MS |
740 | fprintf_unfiltered |
741 | (gdb_stdlog, | |
742 | "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
743 | (unsigned long) addr, len); | |
744 | ||
c67ca4de | 745 | ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 746 | |
c5e92cca | 747 | if (show_debug_regs) |
d6c44983 | 748 | { |
d6c44983 | 749 | aarch64_show_debug_reg_state (state, |
2fd0f80d | 750 | "insert_hw_breakpoint", addr, len, type); |
d6c44983 | 751 | } |
9d19df75 MS |
752 | |
753 | return ret; | |
754 | } | |
755 | ||
756 | /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address. | |
757 | Return 0 on success, -1 on failure. */ | |
758 | ||
759 | static int | |
a64dc96c TT |
760 | aarch64_linux_remove_hw_breakpoint (struct target_ops *self, |
761 | struct gdbarch *gdbarch, | |
9d19df75 MS |
762 | struct bp_target_info *bp_tgt) |
763 | { | |
764 | int ret; | |
765 | CORE_ADDR addr = bp_tgt->placed_address; | |
766 | const int len = 4; | |
2ecd81c2 | 767 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
768 | struct aarch64_debug_reg_state *state |
769 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 770 | |
c5e92cca | 771 | if (show_debug_regs) |
9d19df75 MS |
772 | fprintf_unfiltered |
773 | (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
774 | (unsigned long) addr, len); | |
775 | ||
c67ca4de | 776 | ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 777 | |
c5e92cca | 778 | if (show_debug_regs) |
d6c44983 | 779 | { |
d6c44983 YZ |
780 | aarch64_show_debug_reg_state (state, |
781 | "remove_hw_watchpoint", addr, len, type); | |
782 | } | |
9d19df75 MS |
783 | |
784 | return ret; | |
785 | } | |
786 | ||
9d19df75 MS |
787 | /* Implement the "to_insert_watchpoint" target_ops method. |
788 | ||
789 | Insert a watchpoint to watch a memory region which starts at | |
790 | address ADDR and whose length is LEN bytes. Watch memory accesses | |
791 | of the type TYPE. Return 0 on success, -1 on failure. */ | |
792 | ||
793 | static int | |
7bb99c53 | 794 | aarch64_linux_insert_watchpoint (struct target_ops *self, |
f486487f SM |
795 | CORE_ADDR addr, int len, |
796 | enum target_hw_bp_type type, | |
9d19df75 MS |
797 | struct expression *cond) |
798 | { | |
799 | int ret; | |
c67ca4de YQ |
800 | struct aarch64_debug_reg_state *state |
801 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 802 | |
c5e92cca | 803 | if (show_debug_regs) |
9d19df75 MS |
804 | fprintf_unfiltered (gdb_stdlog, |
805 | "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
806 | (unsigned long) addr, len); | |
807 | ||
808 | gdb_assert (type != hw_execute); | |
809 | ||
c67ca4de | 810 | ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 811 | |
c5e92cca | 812 | if (show_debug_regs) |
d6c44983 | 813 | { |
d6c44983 YZ |
814 | aarch64_show_debug_reg_state (state, |
815 | "insert_watchpoint", addr, len, type); | |
816 | } | |
9d19df75 MS |
817 | |
818 | return ret; | |
819 | } | |
820 | ||
821 | /* Implement the "to_remove_watchpoint" target_ops method. | |
822 | Remove a watchpoint that watched the memory region which starts at | |
823 | address ADDR, whose length is LEN bytes, and for accesses of the | |
824 | type TYPE. Return 0 on success, -1 on failure. */ | |
825 | ||
826 | static int | |
11b5219a | 827 | aarch64_linux_remove_watchpoint (struct target_ops *self, |
f486487f SM |
828 | CORE_ADDR addr, int len, |
829 | enum target_hw_bp_type type, | |
9d19df75 MS |
830 | struct expression *cond) |
831 | { | |
832 | int ret; | |
c67ca4de YQ |
833 | struct aarch64_debug_reg_state *state |
834 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 835 | |
c5e92cca | 836 | if (show_debug_regs) |
9d19df75 MS |
837 | fprintf_unfiltered (gdb_stdlog, |
838 | "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
839 | (unsigned long) addr, len); | |
840 | ||
841 | gdb_assert (type != hw_execute); | |
842 | ||
c67ca4de | 843 | ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 844 | |
c5e92cca | 845 | if (show_debug_regs) |
d6c44983 | 846 | { |
d6c44983 YZ |
847 | aarch64_show_debug_reg_state (state, |
848 | "remove_watchpoint", addr, len, type); | |
849 | } | |
9d19df75 MS |
850 | |
851 | return ret; | |
852 | } | |
853 | ||
854 | /* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */ | |
855 | ||
856 | static int | |
31568a15 TT |
857 | aarch64_linux_region_ok_for_hw_watchpoint (struct target_ops *self, |
858 | CORE_ADDR addr, int len) | |
9d19df75 MS |
859 | { |
860 | CORE_ADDR aligned_addr; | |
861 | ||
862 | /* Can not set watchpoints for zero or negative lengths. */ | |
863 | if (len <= 0) | |
864 | return 0; | |
865 | ||
866 | /* Must have hardware watchpoint debug register(s). */ | |
867 | if (aarch64_num_wp_regs == 0) | |
868 | return 0; | |
869 | ||
870 | /* We support unaligned watchpoint address and arbitrary length, | |
871 | as long as the size of the whole watched area after alignment | |
872 | doesn't exceed size of the total area that all watchpoint debug | |
873 | registers can watch cooperatively. | |
874 | ||
875 | This is a very relaxed rule, but unfortunately there are | |
876 | limitations, e.g. false-positive hits, due to limited support of | |
877 | hardware debug registers in the kernel. See comment above | |
878 | aarch64_align_watchpoint for more information. */ | |
879 | ||
880 | aligned_addr = addr & ~(AARCH64_HWP_MAX_LEN_PER_REG - 1); | |
881 | if (aligned_addr + aarch64_num_wp_regs * AARCH64_HWP_MAX_LEN_PER_REG | |
882 | < addr + len) | |
883 | return 0; | |
884 | ||
885 | /* All tests passed so we are likely to be able to set the watchpoint. | |
886 | The reason that it is 'likely' rather than 'must' is because | |
887 | we don't check the current usage of the watchpoint registers, and | |
888 | there may not be enough registers available for this watchpoint. | |
889 | Ideally we should check the cached debug register state, however | |
890 | the checking is costly. */ | |
891 | return 1; | |
892 | } | |
893 | ||
894 | /* Implement the "to_stopped_data_address" target_ops method. */ | |
895 | ||
896 | static int | |
897 | aarch64_linux_stopped_data_address (struct target_ops *target, | |
898 | CORE_ADDR *addr_p) | |
899 | { | |
900 | siginfo_t siginfo; | |
901 | int i, tid; | |
902 | struct aarch64_debug_reg_state *state; | |
903 | ||
904 | if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) | |
905 | return 0; | |
906 | ||
907 | /* This must be a hardware breakpoint. */ | |
908 | if (siginfo.si_signo != SIGTRAP | |
909 | || (siginfo.si_code & 0xffff) != TRAP_HWBKPT) | |
910 | return 0; | |
911 | ||
912 | /* Check if the address matches any watched address. */ | |
d6c44983 | 913 | state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); |
9d19df75 MS |
914 | for (i = aarch64_num_wp_regs - 1; i >= 0; --i) |
915 | { | |
916 | const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]); | |
917 | const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr; | |
918 | const CORE_ADDR addr_watch = state->dr_addr_wp[i]; | |
919 | ||
920 | if (state->dr_ref_count_wp[i] | |
921 | && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i]) | |
922 | && addr_trap >= addr_watch | |
923 | && addr_trap < addr_watch + len) | |
924 | { | |
925 | *addr_p = addr_trap; | |
926 | return 1; | |
927 | } | |
928 | } | |
929 | ||
930 | return 0; | |
931 | } | |
932 | ||
933 | /* Implement the "to_stopped_by_watchpoint" target_ops method. */ | |
934 | ||
935 | static int | |
6a109b6b | 936 | aarch64_linux_stopped_by_watchpoint (struct target_ops *ops) |
9d19df75 MS |
937 | { |
938 | CORE_ADDR addr; | |
939 | ||
6a109b6b | 940 | return aarch64_linux_stopped_data_address (ops, &addr); |
9d19df75 MS |
941 | } |
942 | ||
943 | /* Implement the "to_watchpoint_addr_within_range" target_ops method. */ | |
944 | ||
945 | static int | |
946 | aarch64_linux_watchpoint_addr_within_range (struct target_ops *target, | |
947 | CORE_ADDR addr, | |
948 | CORE_ADDR start, int length) | |
949 | { | |
950 | return start <= addr && start + length - 1 >= addr; | |
951 | } | |
952 | ||
953 | /* Define AArch64 maintenance commands. */ | |
954 | ||
955 | static void | |
956 | add_show_debug_regs_command (void) | |
957 | { | |
958 | /* A maintenance command to enable printing the internal DRi mirror | |
959 | variables. */ | |
960 | add_setshow_boolean_cmd ("show-debug-regs", class_maintenance, | |
c5e92cca | 961 | &show_debug_regs, _("\ |
9d19df75 MS |
962 | Set whether to show variables that mirror the AArch64 debug registers."), _("\ |
963 | Show whether to show variables that mirror the AArch64 debug registers."), _("\ | |
964 | Use \"on\" to enable, \"off\" to disable.\n\ | |
965 | If enabled, the debug registers values are shown when GDB inserts\n\ | |
966 | or removes a hardware breakpoint or watchpoint, and when the inferior\n\ | |
967 | triggers a breakpoint or watchpoint."), | |
968 | NULL, | |
969 | NULL, | |
970 | &maintenance_set_cmdlist, | |
971 | &maintenance_show_cmdlist); | |
972 | } | |
973 | ||
974 | /* -Wmissing-prototypes. */ | |
975 | void _initialize_aarch64_linux_nat (void); | |
976 | ||
977 | void | |
978 | _initialize_aarch64_linux_nat (void) | |
979 | { | |
980 | struct target_ops *t; | |
981 | ||
982 | /* Fill in the generic GNU/Linux methods. */ | |
983 | t = linux_target (); | |
984 | ||
985 | add_show_debug_regs_command (); | |
986 | ||
987 | /* Add our register access methods. */ | |
988 | t->to_fetch_registers = aarch64_linux_fetch_inferior_registers; | |
989 | t->to_store_registers = aarch64_linux_store_inferior_registers; | |
990 | ||
991 | t->to_read_description = aarch64_linux_read_description; | |
992 | ||
993 | t->to_can_use_hw_breakpoint = aarch64_linux_can_use_hw_breakpoint; | |
994 | t->to_insert_hw_breakpoint = aarch64_linux_insert_hw_breakpoint; | |
995 | t->to_remove_hw_breakpoint = aarch64_linux_remove_hw_breakpoint; | |
996 | t->to_region_ok_for_hw_watchpoint = | |
997 | aarch64_linux_region_ok_for_hw_watchpoint; | |
998 | t->to_insert_watchpoint = aarch64_linux_insert_watchpoint; | |
999 | t->to_remove_watchpoint = aarch64_linux_remove_watchpoint; | |
1000 | t->to_stopped_by_watchpoint = aarch64_linux_stopped_by_watchpoint; | |
1001 | t->to_stopped_data_address = aarch64_linux_stopped_data_address; | |
1002 | t->to_watchpoint_addr_within_range = | |
1003 | aarch64_linux_watchpoint_addr_within_range; | |
9d19df75 MS |
1004 | |
1005 | /* Override the GNU/Linux inferior startup hook. */ | |
1006 | super_post_startup_inferior = t->to_post_startup_inferior; | |
1007 | t->to_post_startup_inferior = aarch64_linux_child_post_startup_inferior; | |
1008 | ||
1009 | /* Register the target. */ | |
1010 | linux_nat_add_target (t); | |
1011 | linux_nat_set_new_thread (t, aarch64_linux_new_thread); | |
d6c44983 YZ |
1012 | linux_nat_set_new_fork (t, aarch64_linux_new_fork); |
1013 | linux_nat_set_forget_process (t, aarch64_forget_process); | |
9d19df75 MS |
1014 | linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume); |
1015 | } |