* top.h (lim_at_start): Declare.
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
dc129d82
JT
42
43#include "elf-bfd.h"
44
45#include "alpha-tdep.h"
46
c906108c 47\f
fa88f677 48static const char *
636a6dfc
JT
49alpha_register_name (int regno)
50{
5ab84872 51 static const char * const register_names[] =
636a6dfc
JT
52 {
53 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
54 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
55 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
56 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
57 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
58 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
59 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
60 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 61 "pc", "", "unique"
636a6dfc
JT
62 };
63
64 if (regno < 0)
5ab84872 65 return NULL;
636a6dfc 66 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
67 return NULL;
68 return register_names[regno];
636a6dfc 69}
d734c450 70
dc129d82 71static int
d734c450
JT
72alpha_cannot_fetch_register (int regno)
73{
44d88583 74 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
75}
76
dc129d82 77static int
d734c450
JT
78alpha_cannot_store_register (int regno)
79{
44d88583 80 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
81}
82
dc129d82 83static int
d734c450
JT
84alpha_register_convertible (int regno)
85{
86 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
87}
0d056799 88
dc129d82 89static struct type *
0d056799
JT
90alpha_register_virtual_type (int regno)
91{
92 return ((regno >= FP0_REGNUM && regno < (FP0_REGNUM+31))
93 ? builtin_type_double : builtin_type_long);
94}
f8453e34 95
615967cb
RH
96/* Is REGNUM a member of REGGROUP? */
97
98static int
99alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
100 struct reggroup *group)
101{
102 /* Filter out any registers eliminated, but whose regnum is
103 reserved for backward compatibility, e.g. the vfp. */
104 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
105 return 0;
106
107 /* Since we implement no pseudo registers, save/restore is equal to all. */
108 if (group == all_reggroup
109 || group == save_reggroup
110 || group == restore_reggroup)
111 return 1;
112
113 /* All other groups are non-overlapping. */
114
115 /* Since this is really a PALcode memory slot... */
116 if (regnum == ALPHA_UNIQUE_REGNUM)
117 return group == system_reggroup;
118
119 /* Force the FPCR to be considered part of the floating point state. */
120 if (regnum == ALPHA_FPCR_REGNUM)
121 return group == float_reggroup;
122
123 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
124 return group == float_reggroup;
125 else
126 return group == general_reggroup;
127}
128
dc129d82 129static int
f8453e34
JT
130alpha_register_byte (int regno)
131{
132 return (regno * 8);
133}
134
dc129d82 135static int
f8453e34
JT
136alpha_register_raw_size (int regno)
137{
138 return 8;
139}
140
dc129d82 141static int
f8453e34
JT
142alpha_register_virtual_size (int regno)
143{
144 return 8;
145}
636a6dfc 146
d2427a71
RH
147/* The alpha needs a conversion between register and memory format if the
148 register is a floating point register and memory format is float, as the
149 register format must be double or memory format is an integer with 4
150 bytes or less, as the representation of integers in floating point
151 registers is different. */
152
153static void
154alpha_register_convert_to_virtual (int regnum, struct type *valtype,
155 char *raw_buffer, char *virtual_buffer)
5868c862 156{
d2427a71
RH
157 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
158 {
159 memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (regnum));
160 return;
161 }
162
163 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
164 {
165 double d = deprecated_extract_floating (raw_buffer, REGISTER_RAW_SIZE (regnum));
166 deprecated_store_floating (virtual_buffer, TYPE_LENGTH (valtype), d);
167 }
168 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
169 {
170 ULONGEST l;
171 l = extract_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum));
172 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
173 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
174 }
175 else
176 error ("Cannot retrieve value from floating point register");
177}
5868c862 178
d2427a71
RH
179static void
180alpha_register_convert_to_raw (struct type *valtype, int regnum,
181 char *virtual_buffer, char *raw_buffer)
182{
183 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
184 {
185 memcpy (raw_buffer, virtual_buffer, REGISTER_RAW_SIZE (regnum));
186 return;
187 }
5868c862 188
d2427a71
RH
189 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
190 {
191 double d = deprecated_extract_floating (virtual_buffer, TYPE_LENGTH (valtype));
192 deprecated_store_floating (raw_buffer, REGISTER_RAW_SIZE (regnum), d);
193 }
194 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
195 {
196 ULONGEST l;
197 if (TYPE_UNSIGNED (valtype))
198 l = extract_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype));
199 else
200 l = extract_signed_integer (virtual_buffer, TYPE_LENGTH (valtype));
201 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
202 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), l);
203 }
204 else
205 error ("Cannot store value in floating point register");
5868c862
JT
206}
207
d2427a71
RH
208\f
209/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
210 the stack. The register arguments are stored in ARG_REG_BUFFER, and
211 then moved into the register file; this simplifies the passing of a
212 large struct which extends from the registers to the stack, plus avoids
213 three ptrace invocations per word.
214
215 We don't bother tracking which register values should go in integer
216 regs or fp regs; we load the same values into both.
217
d2427a71
RH
218 If the called function is returning a structure, the address of the
219 structure to be returned is passed as a hidden first argument. */
c906108c 220
d2427a71 221static CORE_ADDR
c88e30c0
RH
222alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
223 struct regcache *regcache, CORE_ADDR bp_addr,
224 int nargs, struct value **args, CORE_ADDR sp,
225 int struct_return, CORE_ADDR struct_addr)
c906108c 226{
d2427a71
RH
227 int i;
228 int accumulate_size = struct_return ? 8 : 0;
d2427a71 229 struct alpha_arg
c906108c 230 {
d2427a71
RH
231 char *contents;
232 int len;
233 int offset;
234 };
c88e30c0
RH
235 struct alpha_arg *alpha_args
236 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
d2427a71 237 register struct alpha_arg *m_arg;
c88e30c0 238 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 239 int required_arg_regs;
c906108c 240
c88e30c0
RH
241 /* The ABI places the address of the called function in T12. */
242 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
243
244 /* Set the return address register to point to the entry point
245 of the program, where a breakpoint lies in wait. */
246 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
247
248 /* Lay out the arguments in memory. */
d2427a71
RH
249 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
250 {
251 struct value *arg = args[i];
252 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 253
d2427a71
RH
254 /* Cast argument to long if necessary as the compiler does it too. */
255 switch (TYPE_CODE (arg_type))
c906108c 256 {
d2427a71
RH
257 case TYPE_CODE_INT:
258 case TYPE_CODE_BOOL:
259 case TYPE_CODE_CHAR:
260 case TYPE_CODE_RANGE:
261 case TYPE_CODE_ENUM:
262 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
263 {
264 arg_type = builtin_type_long;
265 arg = value_cast (arg_type, arg);
266 }
267 break;
c88e30c0
RH
268 case TYPE_CODE_FLT:
269 /* "float" arguments loaded in registers must be passed in
270 register format, aka "double". */
271 if (accumulate_size < sizeof (arg_reg_buffer)
272 && TYPE_LENGTH (arg_type) == 4)
273 {
274 arg_type = builtin_type_double;
275 arg = value_cast (arg_type, arg);
276 }
277 /* Tru64 5.1 has a 128-bit long double, and passes this by
278 invisible reference. No one else uses this data type. */
279 else if (TYPE_LENGTH (arg_type) == 16)
280 {
281 /* Allocate aligned storage. */
282 sp = (sp & -16) - 16;
283
284 /* Write the real data into the stack. */
285 write_memory (sp, VALUE_CONTENTS (arg), 16);
286
287 /* Construct the indirection. */
288 arg_type = lookup_pointer_type (arg_type);
289 arg = value_from_pointer (arg_type, sp);
290 }
291 break;
d2427a71
RH
292 default:
293 break;
c906108c 294 }
d2427a71
RH
295 m_arg->len = TYPE_LENGTH (arg_type);
296 m_arg->offset = accumulate_size;
297 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
298 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
299 }
300
d2427a71
RH
301 /* Determine required argument register loads, loading an argument register
302 is expensive as it uses three ptrace calls. */
303 required_arg_regs = accumulate_size / 8;
304 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
305 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 306
d2427a71 307 /* Make room for the arguments on the stack. */
c88e30c0
RH
308 if (accumulate_size < sizeof(arg_reg_buffer))
309 accumulate_size = 0;
310 else
311 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 312 sp -= accumulate_size;
c906108c 313
c88e30c0 314 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 315 sp &= ~15;
c906108c 316
d2427a71
RH
317 /* `Push' arguments on the stack. */
318 for (i = nargs; m_arg--, --i >= 0;)
c906108c 319 {
c88e30c0
RH
320 char *contents = m_arg->contents;
321 int offset = m_arg->offset;
322 int len = m_arg->len;
323
324 /* Copy the bytes destined for registers into arg_reg_buffer. */
325 if (offset < sizeof(arg_reg_buffer))
326 {
327 if (offset + len <= sizeof(arg_reg_buffer))
328 {
329 memcpy (arg_reg_buffer + offset, contents, len);
330 continue;
331 }
332 else
333 {
334 int tlen = sizeof(arg_reg_buffer) - offset;
335 memcpy (arg_reg_buffer + offset, contents, tlen);
336 offset += tlen;
337 contents += tlen;
338 len -= tlen;
339 }
340 }
341
342 /* Everything else goes to the stack. */
343 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 344 }
c88e30c0
RH
345 if (struct_return)
346 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 347
d2427a71
RH
348 /* Load the argument registers. */
349 for (i = 0; i < required_arg_regs; i++)
350 {
09cc52fd
RH
351 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
352 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
353 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
354 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 355 }
c906108c 356
09cc52fd
RH
357 /* Finally, update the stack pointer. */
358 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
359
c88e30c0 360 return sp;
c906108c
SS
361}
362
d2427a71
RH
363/* Given a return value in `regbuf' with a type `valtype',
364 extract and copy its value into `valbuf'. */
365
dc129d82 366static void
d2427a71
RH
367alpha_extract_return_value (struct type *valtype,
368 char regbuf[ALPHA_REGISTER_BYTES], char *valbuf)
140f9984 369{
d2427a71
RH
370 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
371 alpha_register_convert_to_virtual (FP0_REGNUM, valtype,
372 regbuf + REGISTER_BYTE (FP0_REGNUM),
373 valbuf);
374 else
375 memcpy (valbuf, regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
376 TYPE_LENGTH (valtype));
140f9984
JT
377}
378
d2427a71
RH
379/* Given a return value in `regbuf' with a type `valtype',
380 write its value into the appropriate register. */
0d056799 381
d2427a71
RH
382static void
383alpha_store_return_value (struct type *valtype, char *valbuf)
c906108c 384{
5ab84872 385 char raw_buffer[ALPHA_REGISTER_SIZE];
d2427a71
RH
386 int regnum = ALPHA_V0_REGNUM;
387 int length = TYPE_LENGTH (valtype);
388
389 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
c906108c 390 {
d2427a71 391 regnum = FP0_REGNUM;
5ab84872 392 length = ALPHA_REGISTER_SIZE;
d2427a71 393 alpha_register_convert_to_raw (valtype, regnum, valbuf, raw_buffer);
c906108c 394 }
d2427a71
RH
395 else
396 memcpy (raw_buffer, valbuf, length);
397
398 deprecated_write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, length);
c906108c
SS
399}
400
d2427a71
RH
401static int
402alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 403{
d2427a71
RH
404 /* Structures are returned by ref in extra arg0. */
405 return 1;
406}
c906108c 407
d2427a71
RH
408static void
409alpha_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
410{
411 /* Store the address of the place in which to copy the structure the
412 subroutine will return. Handled by alpha_push_arguments. */
c906108c
SS
413}
414
dc129d82 415static CORE_ADDR
d2427a71 416alpha_extract_struct_value_address (char *regbuf)
c906108c 417{
7c0b4a20
AC
418 return (extract_unsigned_integer (regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
419 REGISTER_RAW_SIZE (ALPHA_V0_REGNUM)));
c906108c
SS
420}
421
d2427a71
RH
422\f
423static const unsigned char *
424alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 425{
d2427a71
RH
426 static const unsigned char alpha_breakpoint[] =
427 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 428
d2427a71
RH
429 *lenptr = sizeof(alpha_breakpoint);
430 return (alpha_breakpoint);
431}
c906108c 432
d2427a71
RH
433\f
434/* This returns the PC of the first insn after the prologue.
435 If we can't find the prologue, then return 0. */
c906108c 436
d2427a71
RH
437CORE_ADDR
438alpha_after_prologue (CORE_ADDR pc)
c906108c 439{
d2427a71
RH
440 struct symtab_and_line sal;
441 CORE_ADDR func_addr, func_end;
c906108c 442
d2427a71 443 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 444 return 0;
c906108c 445
d2427a71
RH
446 sal = find_pc_line (func_addr, 0);
447 if (sal.end < func_end)
448 return sal.end;
c5aa993b 449
d2427a71
RH
450 /* The line after the prologue is after the end of the function. In this
451 case, tell the caller to find the prologue the hard way. */
452 return 0;
c906108c
SS
453}
454
d2427a71
RH
455/* Read an instruction from memory at PC, looking through breakpoints. */
456
457unsigned int
458alpha_read_insn (CORE_ADDR pc)
c906108c 459{
d2427a71
RH
460 char buf[4];
461 int status;
c5aa993b 462
d2427a71
RH
463 status = read_memory_nobpt (pc, buf, 4);
464 if (status)
465 memory_error (status, pc);
466 return extract_unsigned_integer (buf, 4);
467}
c5aa993b 468
d2427a71
RH
469/* To skip prologues, I use this predicate. Returns either PC itself
470 if the code at PC does not look like a function prologue; otherwise
471 returns an address that (if we're lucky) follows the prologue. If
472 LENIENT, then we must skip everything which is involved in setting
473 up the frame (it's OK to skip more, just so long as we don't skip
474 anything which might clobber the registers which are being saved. */
c906108c 475
d2427a71
RH
476static CORE_ADDR
477alpha_skip_prologue (CORE_ADDR pc)
478{
479 unsigned long inst;
480 int offset;
481 CORE_ADDR post_prologue_pc;
482 char buf[4];
c906108c 483
d2427a71
RH
484 /* Silently return the unaltered pc upon memory errors.
485 This could happen on OSF/1 if decode_line_1 tries to skip the
486 prologue for quickstarted shared library functions when the
487 shared library is not yet mapped in.
488 Reading target memory is slow over serial lines, so we perform
489 this check only if the target has shared libraries (which all
490 Alpha targets do). */
491 if (target_read_memory (pc, buf, 4))
492 return pc;
c906108c 493
d2427a71
RH
494 /* See if we can determine the end of the prologue via the symbol table.
495 If so, then return either PC, or the PC after the prologue, whichever
496 is greater. */
c906108c 497
d2427a71
RH
498 post_prologue_pc = alpha_after_prologue (pc);
499 if (post_prologue_pc != 0)
500 return max (pc, post_prologue_pc);
c906108c 501
d2427a71
RH
502 /* Can't determine prologue from the symbol table, need to examine
503 instructions. */
dc1b0db2 504
d2427a71
RH
505 /* Skip the typical prologue instructions. These are the stack adjustment
506 instruction and the instructions that save registers on the stack
507 or in the gcc frame. */
508 for (offset = 0; offset < 100; offset += 4)
509 {
510 inst = alpha_read_insn (pc + offset);
c906108c 511
d2427a71
RH
512 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
513 continue;
514 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
515 continue;
516 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
517 continue;
518 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
519 continue;
c906108c 520
d2427a71
RH
521 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
522 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
523 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
524 continue;
c906108c 525
d2427a71
RH
526 if (inst == 0x47de040f) /* bis sp,sp,fp */
527 continue;
528 if (inst == 0x47fe040f) /* bis zero,sp,fp */
529 continue;
c906108c 530
d2427a71 531 break;
c906108c 532 }
d2427a71
RH
533 return pc + offset;
534}
c906108c 535
d2427a71
RH
536\f
537/* Figure out where the longjmp will land.
538 We expect the first arg to be a pointer to the jmp_buf structure from
539 which we extract the PC (JB_PC) that we will land at. The PC is copied
540 into the "pc". This routine returns true on success. */
c906108c
SS
541
542static int
d2427a71 543alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 544{
d2427a71
RH
545 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
546 CORE_ADDR jb_addr;
5ab84872 547 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 548
d2427a71 549 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 550
d2427a71
RH
551 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
552 raw_buffer, tdep->jb_elt_size))
c906108c 553 return 0;
d2427a71 554
7c0b4a20 555 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 556 return 1;
c906108c
SS
557}
558
d2427a71
RH
559\f
560/* Frame unwinder for signal trampolines. We use alpha tdep bits that
561 describe the location and shape of the sigcontext structure. After
562 that, all registers are in memory, so it's easy. */
563/* ??? Shouldn't we be able to do this generically, rather than with
564 OSABI data specific to Alpha? */
565
566struct alpha_sigtramp_unwind_cache
c906108c 567{
d2427a71
RH
568 CORE_ADDR sigcontext_addr;
569};
c906108c 570
d2427a71
RH
571static struct alpha_sigtramp_unwind_cache *
572alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
573 void **this_prologue_cache)
574{
575 struct alpha_sigtramp_unwind_cache *info;
576 struct gdbarch_tdep *tdep;
c906108c 577
d2427a71
RH
578 if (*this_prologue_cache)
579 return *this_prologue_cache;
c906108c 580
d2427a71
RH
581 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
582 *this_prologue_cache = info;
c906108c 583
d2427a71
RH
584 tdep = gdbarch_tdep (current_gdbarch);
585 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 586
d2427a71 587 return info;
c906108c
SS
588}
589
d2427a71
RH
590/* Return the address of REGNO in a sigtramp frame. Since this is all
591 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 592
d2427a71
RH
593#ifndef SIGFRAME_PC_OFF
594#define SIGFRAME_PC_OFF (2 * 8)
595#define SIGFRAME_REGSAVE_OFF (4 * 8)
596#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
597#endif
c5aa993b 598
d2427a71
RH
599static CORE_ADDR
600alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
601{
602 if (regno < 32)
603 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
604 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
605 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
606 if (regno == PC_REGNUM)
607 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 608
d2427a71 609 return 0;
c906108c
SS
610}
611
d2427a71
RH
612/* Given a GDB frame, determine the address of the calling function's
613 frame. This will be used to create a new GDB frame struct. */
140f9984 614
dc129d82 615static void
d2427a71
RH
616alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
617 void **this_prologue_cache,
618 struct frame_id *this_id)
c906108c 619{
d2427a71
RH
620 struct alpha_sigtramp_unwind_cache *info
621 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
622 struct gdbarch_tdep *tdep;
623 CORE_ADDR stack_addr, code_addr;
624
625 /* If the OSABI couldn't locate the sigcontext, give up. */
626 if (info->sigcontext_addr == 0)
627 return;
628
629 /* If we have dynamic signal trampolines, find their start.
630 If we do not, then we must assume there is a symbol record
631 that can provide the start address. */
632 tdep = gdbarch_tdep (current_gdbarch);
633 if (tdep->dynamic_sigtramp_offset)
c906108c 634 {
d2427a71
RH
635 int offset;
636 code_addr = frame_pc_unwind (next_frame);
637 offset = tdep->dynamic_sigtramp_offset (code_addr);
638 if (offset >= 0)
639 code_addr -= offset;
c906108c 640 else
d2427a71 641 code_addr = 0;
c906108c 642 }
d2427a71
RH
643 else
644 code_addr = frame_func_unwind (next_frame);
c906108c 645
d2427a71
RH
646 /* The stack address is trivially read from the sigcontext. */
647 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
648 ALPHA_SP_REGNUM);
649 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 650
d2427a71 651 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
652}
653
d2427a71 654/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 655
d2427a71
RH
656static void
657alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
658 void **this_prologue_cache,
659 int regnum, int *optimizedp,
660 enum lval_type *lvalp, CORE_ADDR *addrp,
661 int *realnump, void *bufferp)
c906108c 662{
d2427a71
RH
663 struct alpha_sigtramp_unwind_cache *info
664 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
665 CORE_ADDR addr;
c906108c 666
d2427a71 667 if (info->sigcontext_addr != 0)
c906108c 668 {
d2427a71
RH
669 /* All integer and fp registers are stored in memory. */
670 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
671 if (addr != 0)
c906108c 672 {
d2427a71
RH
673 *optimizedp = 0;
674 *lvalp = lval_memory;
675 *addrp = addr;
676 *realnump = -1;
677 if (bufferp != NULL)
678 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
679 return;
c906108c 680 }
c906108c
SS
681 }
682
d2427a71
RH
683 /* This extra register may actually be in the sigcontext, but our
684 current description of it in alpha_sigtramp_frame_unwind_cache
685 doesn't include it. Too bad. Fall back on whatever's in the
686 outer frame. */
687 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
688 realnump, bufferp);
689}
c906108c 690
d2427a71
RH
691static const struct frame_unwind alpha_sigtramp_frame_unwind = {
692 SIGTRAMP_FRAME,
693 alpha_sigtramp_frame_this_id,
694 alpha_sigtramp_frame_prev_register
695};
c906108c 696
d2427a71
RH
697static const struct frame_unwind *
698alpha_sigtramp_frame_p (CORE_ADDR pc)
699{
700 char *name;
c906108c 701
d2427a71
RH
702 /* We shouldn't even bother to try if the OSABI didn't register
703 a sigcontext_addr handler. */
704 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
705 return NULL;
c906108c 706
d2427a71
RH
707 /* Otherwise we should be in a signal frame. */
708 find_pc_partial_function (pc, &name, NULL, NULL);
709 if (PC_IN_SIGTRAMP (pc, name))
710 return &alpha_sigtramp_frame_unwind;
c906108c 711
d2427a71 712 return NULL;
c906108c 713}
d2427a71
RH
714\f
715/* Fallback alpha frame unwinder. Uses instruction scanning and knows
716 something about the traditional layout of alpha stack frames. */
c906108c 717
d2427a71 718struct alpha_heuristic_unwind_cache
c906108c 719{
d2427a71
RH
720 CORE_ADDR *saved_regs;
721 CORE_ADDR vfp;
722 CORE_ADDR start_pc;
723 int return_reg;
724};
c906108c 725
d2427a71
RH
726/* Heuristic_proc_start may hunt through the text section for a long
727 time across a 2400 baud serial line. Allows the user to limit this
728 search. */
729static unsigned int heuristic_fence_post = 0;
c906108c 730
d2427a71
RH
731/* Attempt to locate the start of the function containing PC. We assume that
732 the previous function ends with an about_to_return insn. Not foolproof by
733 any means, since gcc is happy to put the epilogue in the middle of a
734 function. But we're guessing anyway... */
c906108c 735
d2427a71
RH
736static CORE_ADDR
737alpha_heuristic_proc_start (CORE_ADDR pc)
738{
739 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
740 CORE_ADDR last_non_nop = pc;
741 CORE_ADDR fence = pc - heuristic_fence_post;
742 CORE_ADDR orig_pc = pc;
fbe586ae 743 CORE_ADDR func;
9e0b60a8 744
d2427a71
RH
745 if (pc == 0)
746 return 0;
9e0b60a8 747
fbe586ae
RH
748 /* First see if we can find the start of the function from minimal
749 symbol information. This can succeed with a binary that doesn't
750 have debug info, but hasn't been stripped. */
751 func = get_pc_function_start (pc);
752 if (func)
753 return func;
754
d2427a71
RH
755 if (heuristic_fence_post == UINT_MAX
756 || fence < tdep->vm_min_address)
757 fence = tdep->vm_min_address;
c906108c 758
d2427a71
RH
759 /* Search back for previous return; also stop at a 0, which might be
760 seen for instance before the start of a code section. Don't include
761 nops, since this usually indicates padding between functions. */
762 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 763 {
d2427a71
RH
764 unsigned int insn = alpha_read_insn (pc);
765 switch (insn)
c906108c 766 {
d2427a71
RH
767 case 0: /* invalid insn */
768 case 0x6bfa8001: /* ret $31,($26),1 */
769 return last_non_nop;
770
771 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
772 case 0x47ff041f: /* nop: bis $31,$31,$31 */
773 break;
774
775 default:
776 last_non_nop = pc;
777 break;
c906108c 778 }
d2427a71 779 }
c906108c 780
d2427a71
RH
781 /* It's not clear to me why we reach this point when stopping quietly,
782 but with this test, at least we don't print out warnings for every
783 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
784 if (stop_soon == NO_STOP_QUIETLY)
785 {
786 static int blurb_printed = 0;
c906108c 787
d2427a71
RH
788 if (fence == tdep->vm_min_address)
789 warning ("Hit beginning of text section without finding");
c906108c 790 else
d2427a71
RH
791 warning ("Hit heuristic-fence-post without finding");
792 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 793
d2427a71
RH
794 if (!blurb_printed)
795 {
796 printf_filtered ("\
797This warning occurs if you are debugging a function without any symbols\n\
798(for example, in a stripped executable). In that case, you may wish to\n\
799increase the size of the search with the `set heuristic-fence-post' command.\n\
800\n\
801Otherwise, you told GDB there was a function where there isn't one, or\n\
802(more likely) you have encountered a bug in GDB.\n");
803 blurb_printed = 1;
804 }
805 }
c906108c 806
d2427a71
RH
807 return 0;
808}
c906108c 809
fbe586ae 810static struct alpha_heuristic_unwind_cache *
d2427a71
RH
811alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
812 void **this_prologue_cache,
813 CORE_ADDR start_pc)
814{
815 struct alpha_heuristic_unwind_cache *info;
816 ULONGEST val;
817 CORE_ADDR limit_pc, cur_pc;
818 int frame_reg, frame_size, return_reg, reg;
c906108c 819
d2427a71
RH
820 if (*this_prologue_cache)
821 return *this_prologue_cache;
c906108c 822
d2427a71
RH
823 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
824 *this_prologue_cache = info;
825 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 826
d2427a71
RH
827 limit_pc = frame_pc_unwind (next_frame);
828 if (start_pc == 0)
829 start_pc = alpha_heuristic_proc_start (limit_pc);
830 info->start_pc = start_pc;
c906108c 831
d2427a71
RH
832 frame_reg = ALPHA_SP_REGNUM;
833 frame_size = 0;
834 return_reg = -1;
c906108c 835
d2427a71
RH
836 /* If we've identified a likely place to start, do code scanning. */
837 if (start_pc != 0)
c5aa993b 838 {
d2427a71
RH
839 /* Limit the forward search to 50 instructions. */
840 if (start_pc + 200 < limit_pc)
841 limit_pc = start_pc + 200;
c5aa993b 842
d2427a71
RH
843 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
844 {
845 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 846
d2427a71
RH
847 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
848 {
849 if (word & 0x8000)
850 {
851 /* Consider only the first stack allocation instruction
852 to contain the static size of the frame. */
853 if (frame_size == 0)
854 frame_size = (-word) & 0xffff;
855 }
856 else
857 {
858 /* Exit loop if a positive stack adjustment is found, which
859 usually means that the stack cleanup code in the function
860 epilogue is reached. */
861 break;
862 }
863 }
864 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
865 {
866 reg = (word & 0x03e00000) >> 21;
867
868 if (reg == 31)
869 continue;
870
871 /* Do not compute the address where the register was saved yet,
872 because we don't know yet if the offset will need to be
873 relative to $sp or $fp (we can not compute the address
874 relative to $sp if $sp is updated during the execution of
875 the current subroutine, for instance when doing some alloca).
876 So just store the offset for the moment, and compute the
877 address later when we know whether this frame has a frame
878 pointer or not. */
879 /* Hack: temporarily add one, so that the offset is non-zero
880 and we can tell which registers have save offsets below. */
881 info->saved_regs[reg] = (word & 0xffff) + 1;
882
883 /* Starting with OSF/1-3.2C, the system libraries are shipped
884 without local symbols, but they still contain procedure
885 descriptors without a symbol reference. GDB is currently
886 unable to find these procedure descriptors and uses
887 heuristic_proc_desc instead.
888 As some low level compiler support routines (__div*, __add*)
889 use a non-standard return address register, we have to
890 add some heuristics to determine the return address register,
891 or stepping over these routines will fail.
892 Usually the return address register is the first register
893 saved on the stack, but assembler optimization might
894 rearrange the register saves.
895 So we recognize only a few registers (t7, t9, ra) within
896 the procedure prologue as valid return address registers.
897 If we encounter a return instruction, we extract the
898 the return address register from it.
899
900 FIXME: Rewriting GDB to access the procedure descriptors,
901 e.g. via the minimal symbol table, might obviate this hack. */
902 if (return_reg == -1
903 && cur_pc < (start_pc + 80)
904 && (reg == ALPHA_T7_REGNUM
905 || reg == ALPHA_T9_REGNUM
906 || reg == ALPHA_RA_REGNUM))
907 return_reg = reg;
908 }
909 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
910 return_reg = (word >> 16) & 0x1f;
911 else if (word == 0x47de040f) /* bis sp,sp,fp */
912 frame_reg = ALPHA_GCC_FP_REGNUM;
913 else if (word == 0x47fe040f) /* bis zero,sp,fp */
914 frame_reg = ALPHA_GCC_FP_REGNUM;
915 }
c5aa993b 916
d2427a71
RH
917 /* If we haven't found a valid return address register yet, keep
918 searching in the procedure prologue. */
919 if (return_reg == -1)
920 {
921 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
922 {
923 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 924
d2427a71
RH
925 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
926 {
927 reg = (word & 0x03e00000) >> 21;
928 if (reg == ALPHA_T7_REGNUM
929 || reg == ALPHA_T9_REGNUM
930 || reg == ALPHA_RA_REGNUM)
931 {
932 return_reg = reg;
933 break;
934 }
935 }
936 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
937 {
938 return_reg = (word >> 16) & 0x1f;
939 break;
940 }
85b32d22
RH
941
942 cur_pc += 4;
d2427a71
RH
943 }
944 }
c906108c 945 }
c906108c 946
d2427a71
RH
947 /* Failing that, do default to the customary RA. */
948 if (return_reg == -1)
949 return_reg = ALPHA_RA_REGNUM;
950 info->return_reg = return_reg;
f8453e34 951
d2427a71
RH
952 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
953 info->vfp = val + frame_size;
c906108c 954
d2427a71
RH
955 /* Convert offsets to absolute addresses. See above about adding
956 one to the offsets to make all detected offsets non-zero. */
957 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
958 if (info->saved_regs[reg])
959 info->saved_regs[reg] += val - 1;
960
961 return info;
c906108c 962}
c906108c 963
d2427a71
RH
964/* Given a GDB frame, determine the address of the calling function's
965 frame. This will be used to create a new GDB frame struct. */
966
fbe586ae 967static void
d2427a71
RH
968alpha_heuristic_frame_this_id (struct frame_info *next_frame,
969 void **this_prologue_cache,
970 struct frame_id *this_id)
c906108c 971{
d2427a71
RH
972 struct alpha_heuristic_unwind_cache *info
973 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 974
fbe586ae
RH
975 /* This is meant to halt the backtrace at "_start". Make sure we
976 don't halt it at a generic dummy frame. */
977 if (inside_entry_file (info->start_pc))
978 return;
979
d2427a71 980 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
981}
982
d2427a71
RH
983/* Retrieve the value of REGNUM in FRAME. Don't give up! */
984
fbe586ae 985static void
d2427a71
RH
986alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
987 void **this_prologue_cache,
988 int regnum, int *optimizedp,
989 enum lval_type *lvalp, CORE_ADDR *addrp,
990 int *realnump, void *bufferp)
c906108c 991{
d2427a71
RH
992 struct alpha_heuristic_unwind_cache *info
993 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
994
995 /* The PC of the previous frame is stored in the link register of
996 the current frame. Frob regnum so that we pull the value from
997 the correct place. */
998 if (regnum == ALPHA_PC_REGNUM)
999 regnum = info->return_reg;
1000
1001 /* For all registers known to be saved in the current frame,
1002 do the obvious and pull the value out. */
1003 if (info->saved_regs[regnum])
c906108c 1004 {
d2427a71
RH
1005 *optimizedp = 0;
1006 *lvalp = lval_memory;
1007 *addrp = info->saved_regs[regnum];
1008 *realnump = -1;
1009 if (bufferp != NULL)
1010 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1011 return;
1012 }
1013
d2427a71
RH
1014 /* The stack pointer of the previous frame is computed by popping
1015 the current stack frame. */
1016 if (regnum == ALPHA_SP_REGNUM)
c906108c 1017 {
d2427a71
RH
1018 *optimizedp = 0;
1019 *lvalp = not_lval;
1020 *addrp = 0;
1021 *realnump = -1;
1022 if (bufferp != NULL)
1023 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1024 return;
c906108c 1025 }
95b80706 1026
d2427a71
RH
1027 /* Otherwise assume the next frame has the same register value. */
1028 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1029 realnump, bufferp);
95b80706
JT
1030}
1031
d2427a71
RH
1032static const struct frame_unwind alpha_heuristic_frame_unwind = {
1033 NORMAL_FRAME,
1034 alpha_heuristic_frame_this_id,
1035 alpha_heuristic_frame_prev_register
1036};
c906108c 1037
d2427a71
RH
1038static const struct frame_unwind *
1039alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 1040{
d2427a71 1041 return &alpha_heuristic_frame_unwind;
c906108c
SS
1042}
1043
fbe586ae 1044static CORE_ADDR
d2427a71
RH
1045alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1046 void **this_prologue_cache)
c906108c 1047{
d2427a71
RH
1048 struct alpha_heuristic_unwind_cache *info
1049 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1050
d2427a71 1051 return info->vfp;
c906108c
SS
1052}
1053
d2427a71
RH
1054static const struct frame_base alpha_heuristic_frame_base = {
1055 &alpha_heuristic_frame_unwind,
1056 alpha_heuristic_frame_base_address,
1057 alpha_heuristic_frame_base_address,
1058 alpha_heuristic_frame_base_address
1059};
1060
c906108c 1061/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1062 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1063
1064static void
fba45db2 1065reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1066{
1067 reinit_frame_cache ();
1068}
1069
d2427a71
RH
1070\f
1071/* ALPHA stack frames are almost impenetrable. When execution stops,
1072 we basically have to look at symbol information for the function
1073 that we stopped in, which tells us *which* register (if any) is
1074 the base of the frame pointer, and what offset from that register
1075 the frame itself is at.
c906108c 1076
d2427a71
RH
1077 This presents a problem when trying to examine a stack in memory
1078 (that isn't executing at the moment), using the "frame" command. We
1079 don't have a PC, nor do we have any registers except SP.
c906108c 1080
d2427a71
RH
1081 This routine takes two arguments, SP and PC, and tries to make the
1082 cached frames look as if these two arguments defined a frame on the
1083 cache. This allows the rest of info frame to extract the important
1084 arguments without difficulty. */
ec32e4be 1085
d2427a71
RH
1086struct frame_info *
1087alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1088{
d2427a71
RH
1089 if (argc != 2)
1090 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1091
d2427a71 1092 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1093}
1094
d2427a71
RH
1095/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1096 dummy frame. The frame ID's base needs to match the TOS value
1097 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1098 breakpoint. */
d734c450 1099
d2427a71
RH
1100static struct frame_id
1101alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1102{
d2427a71
RH
1103 ULONGEST base;
1104 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1105 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1106}
1107
dc129d82 1108static CORE_ADDR
d2427a71 1109alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1110{
d2427a71
RH
1111 ULONGEST pc;
1112 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1113 return pc;
accc6d1f
JT
1114}
1115
d2427a71 1116\f
ec32e4be
JT
1117/* alpha_software_single_step() is called just before we want to resume
1118 the inferior, if we want to single-step it but there is no hardware
1119 or kernel single-step support (NetBSD on Alpha, for example). We find
1120 the target of the coming instruction and breakpoint it.
1121
1122 single_step is also called just after the inferior stops. If we had
1123 set up a simulated single-step, we undo our damage. */
1124
1125static CORE_ADDR
1126alpha_next_pc (CORE_ADDR pc)
1127{
1128 unsigned int insn;
1129 unsigned int op;
1130 int offset;
1131 LONGEST rav;
1132
1133 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1134
1135 /* Opcode is top 6 bits. */
1136 op = (insn >> 26) & 0x3f;
1137
1138 if (op == 0x1a)
1139 {
1140 /* Jump format: target PC is:
1141 RB & ~3 */
1142 return (read_register ((insn >> 16) & 0x1f) & ~3);
1143 }
1144
1145 if ((op & 0x30) == 0x30)
1146 {
1147 /* Branch format: target PC is:
1148 (new PC) + (4 * sext(displacement)) */
1149 if (op == 0x30 || /* BR */
1150 op == 0x34) /* BSR */
1151 {
1152 branch_taken:
1153 offset = (insn & 0x001fffff);
1154 if (offset & 0x00100000)
1155 offset |= 0xffe00000;
1156 offset *= 4;
1157 return (pc + 4 + offset);
1158 }
1159
1160 /* Need to determine if branch is taken; read RA. */
1161 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1162 switch (op)
1163 {
1164 case 0x38: /* BLBC */
1165 if ((rav & 1) == 0)
1166 goto branch_taken;
1167 break;
1168 case 0x3c: /* BLBS */
1169 if (rav & 1)
1170 goto branch_taken;
1171 break;
1172 case 0x39: /* BEQ */
1173 if (rav == 0)
1174 goto branch_taken;
1175 break;
1176 case 0x3d: /* BNE */
1177 if (rav != 0)
1178 goto branch_taken;
1179 break;
1180 case 0x3a: /* BLT */
1181 if (rav < 0)
1182 goto branch_taken;
1183 break;
1184 case 0x3b: /* BLE */
1185 if (rav <= 0)
1186 goto branch_taken;
1187 break;
1188 case 0x3f: /* BGT */
1189 if (rav > 0)
1190 goto branch_taken;
1191 break;
1192 case 0x3e: /* BGE */
1193 if (rav >= 0)
1194 goto branch_taken;
1195 break;
d2427a71
RH
1196
1197 /* ??? Missing floating-point branches. */
ec32e4be
JT
1198 }
1199 }
1200
1201 /* Not a branch or branch not taken; target PC is:
1202 pc + 4 */
1203 return (pc + 4);
1204}
1205
1206void
1207alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1208{
1209 static CORE_ADDR next_pc;
1210 typedef char binsn_quantum[BREAKPOINT_MAX];
1211 static binsn_quantum break_mem;
1212 CORE_ADDR pc;
1213
1214 if (insert_breakpoints_p)
1215 {
1216 pc = read_pc ();
1217 next_pc = alpha_next_pc (pc);
1218
1219 target_insert_breakpoint (next_pc, break_mem);
1220 }
1221 else
1222 {
1223 target_remove_breakpoint (next_pc, break_mem);
1224 write_pc (next_pc);
1225 }
c906108c
SS
1226}
1227
dc129d82 1228\f
dc129d82
JT
1229/* Initialize the current architecture based on INFO. If possible, re-use an
1230 architecture from ARCHES, which is a list of architectures already created
1231 during this debugging session.
1232
1233 Called e.g. at program startup, when reading a core file, and when reading
1234 a binary file. */
1235
1236static struct gdbarch *
1237alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1238{
1239 struct gdbarch_tdep *tdep;
1240 struct gdbarch *gdbarch;
dc129d82
JT
1241
1242 /* Try to determine the ABI of the object we are loading. */
4be87837 1243 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1244 {
4be87837
DJ
1245 /* If it's an ECOFF file, assume it's OSF/1. */
1246 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1247 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1248 }
1249
1250 /* Find a candidate among extant architectures. */
4be87837
DJ
1251 arches = gdbarch_list_lookup_by_info (arches, &info);
1252 if (arches != NULL)
1253 return arches->gdbarch;
dc129d82
JT
1254
1255 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1256 gdbarch = gdbarch_alloc (&info, tdep);
1257
d2427a71
RH
1258 /* Lowest text address. This is used by heuristic_proc_start()
1259 to decide when to stop looking. */
d9b023cc
JT
1260 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1261
36a6271d 1262 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1263 tdep->sigcontext_addr = NULL;
36a6271d 1264
accc6d1f
JT
1265 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1266
dc129d82
JT
1267 /* Type sizes */
1268 set_gdbarch_short_bit (gdbarch, 16);
1269 set_gdbarch_int_bit (gdbarch, 32);
1270 set_gdbarch_long_bit (gdbarch, 64);
1271 set_gdbarch_long_long_bit (gdbarch, 64);
1272 set_gdbarch_float_bit (gdbarch, 32);
1273 set_gdbarch_double_bit (gdbarch, 64);
1274 set_gdbarch_long_double_bit (gdbarch, 64);
1275 set_gdbarch_ptr_bit (gdbarch, 64);
1276
1277 /* Register info */
1278 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1279 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1280 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1281 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1282
1283 set_gdbarch_register_name (gdbarch, alpha_register_name);
dc129d82
JT
1284 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1285 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
dc129d82 1286 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
dc129d82
JT
1287 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1288
1289 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1290 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1291
1292 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1293 set_gdbarch_register_convert_to_virtual (gdbarch,
1294 alpha_register_convert_to_virtual);
1295 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1296
615967cb
RH
1297 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1298
d2427a71 1299 /* Prologue heuristics. */
dc129d82
JT
1300 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1301
5ef165c2
RH
1302 /* Disassembler. */
1303 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1304
d2427a71 1305 /* Call info. */
dc129d82
JT
1306 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1307 set_gdbarch_frameless_function_invocation (gdbarch,
1308 generic_frameless_function_invocation_not);
1309
dc129d82 1310 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
26e9b323 1311 set_gdbarch_deprecated_extract_return_value (gdbarch, alpha_extract_return_value);
4183d812 1312 set_gdbarch_deprecated_store_struct_return (gdbarch, alpha_store_struct_return);
ebba8386 1313 set_gdbarch_deprecated_store_return_value (gdbarch, alpha_store_return_value);
26e9b323 1314 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
dc129d82
JT
1315 alpha_extract_struct_value_address);
1316
1317 /* Settings for calling functions in the inferior. */
c88e30c0 1318 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1319
1320 /* Methods for saving / extracting a dummy frame's ID. */
1321 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1322 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1323
1324 /* Return the unwound PC value. */
1325 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1326
1327 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1328 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1329
95b80706 1330 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1331 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1332
1333 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1334 set_gdbarch_frame_args_skip (gdbarch, 0);
1335
44dffaac 1336 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1337 gdbarch_init_osabi (info, gdbarch);
44dffaac 1338
accc6d1f
JT
1339 /* Now that we have tuned the configuration, set a few final things
1340 based on what the OS ABI has told us. */
1341
1342 if (tdep->jb_pc >= 0)
1343 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1344
d2427a71
RH
1345 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1346 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1347
d2427a71 1348 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1349
d2427a71 1350 return gdbarch;
dc129d82
JT
1351}
1352
c906108c 1353void
fba45db2 1354_initialize_alpha_tdep (void)
c906108c
SS
1355{
1356 struct cmd_list_element *c;
1357
d2427a71 1358 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1359
1360 /* Let the user set the fence post for heuristic_proc_start. */
1361
1362 /* We really would like to have both "0" and "unlimited" work, but
1363 command.c doesn't deal with that. So make it a var_zinteger
1364 because the user can always use "999999" or some such for unlimited. */
1365 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1366 (char *) &heuristic_fence_post,
1367 "\
1368Set the distance searched for the start of a function.\n\
1369If you are debugging a stripped executable, GDB needs to search through the\n\
1370program for the start of a function. This command sets the distance of the\n\
1371search. The only need to set it is when debugging a stripped executable.",
1372 &setlist);
1373 /* We need to throw away the frame cache when we set this, since it
1374 might change our ability to get backtraces. */
9f60d481 1375 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1376 add_show_from_set (c, &showlist);
1377}
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