* README: Mention gdbserver/README.
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
0fd88904 2
6aba47ca 3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
9b254dd1 4 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
c5aa993b 11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b 18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
20
21#include "defs.h"
615967cb 22#include "doublest.h"
c906108c 23#include "frame.h"
d2427a71
RH
24#include "frame-unwind.h"
25#include "frame-base.h"
baa490c4 26#include "dwarf2-frame.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
7d9b040b 42#include "infcall.h"
dc129d82
JT
43
44#include "elf-bfd.h"
45
46#include "alpha-tdep.h"
47
c906108c 48\f
515921d7
JB
49/* Return the name of the REGNO register.
50
51 An empty name corresponds to a register number that used to
52 be used for a virtual register. That virtual register has
53 been removed, but the index is still reserved to maintain
54 compatibility with existing remote alpha targets. */
55
fa88f677 56static const char *
d93859e2 57alpha_register_name (struct gdbarch *gdbarch, int regno)
636a6dfc 58{
5ab84872 59 static const char * const register_names[] =
636a6dfc
JT
60 {
61 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
62 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
63 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
64 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
65 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
66 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
67 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
68 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 69 "pc", "", "unique"
636a6dfc
JT
70 };
71
72 if (regno < 0)
5ab84872 73 return NULL;
e8d2d628 74 if (regno >= ARRAY_SIZE(register_names))
5ab84872
RH
75 return NULL;
76 return register_names[regno];
636a6dfc 77}
d734c450 78
dc129d82 79static int
64a3914f 80alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
d734c450 81{
515921d7 82 return (regno == ALPHA_ZERO_REGNUM
64a3914f 83 || strlen (alpha_register_name (gdbarch, regno)) == 0);
d734c450
JT
84}
85
dc129d82 86static int
64a3914f 87alpha_cannot_store_register (struct gdbarch *gdbarch, int regno)
d734c450 88{
515921d7 89 return (regno == ALPHA_ZERO_REGNUM
64a3914f 90 || strlen (alpha_register_name (gdbarch, regno)) == 0);
d734c450
JT
91}
92
dc129d82 93static struct type *
c483c494 94alpha_register_type (struct gdbarch *gdbarch, int regno)
0d056799 95{
72667056
RH
96 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
97 return builtin_type_void_data_ptr;
98 if (regno == ALPHA_PC_REGNUM)
99 return builtin_type_void_func_ptr;
100
101 /* Don't need to worry about little vs big endian until
102 some jerk tries to port to alpha-unicosmk. */
b38b6be2 103 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
8da61cc4 104 return builtin_type_ieee_double;
72667056
RH
105
106 return builtin_type_int64;
0d056799 107}
f8453e34 108
615967cb
RH
109/* Is REGNUM a member of REGGROUP? */
110
111static int
112alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
113 struct reggroup *group)
114{
115 /* Filter out any registers eliminated, but whose regnum is
116 reserved for backward compatibility, e.g. the vfp. */
ec7cc0e8
UW
117 if (gdbarch_register_name (gdbarch, regnum) == NULL
118 || *gdbarch_register_name (gdbarch, regnum) == '\0')
615967cb
RH
119 return 0;
120
df4a182b
RH
121 if (group == all_reggroup)
122 return 1;
123
124 /* Zero should not be saved or restored. Technically it is a general
125 register (just as $f31 would be a float if we represented it), but
126 there's no point displaying it during "info regs", so leave it out
127 of all groups except for "all". */
128 if (regnum == ALPHA_ZERO_REGNUM)
129 return 0;
130
131 /* All other registers are saved and restored. */
132 if (group == save_reggroup || group == restore_reggroup)
615967cb
RH
133 return 1;
134
135 /* All other groups are non-overlapping. */
136
137 /* Since this is really a PALcode memory slot... */
138 if (regnum == ALPHA_UNIQUE_REGNUM)
139 return group == system_reggroup;
140
141 /* Force the FPCR to be considered part of the floating point state. */
142 if (regnum == ALPHA_FPCR_REGNUM)
143 return group == float_reggroup;
144
145 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
146 return group == float_reggroup;
147 else
148 return group == general_reggroup;
149}
150
c483c494
RH
151/* The following represents exactly the conversion performed by
152 the LDS instruction. This applies to both single-precision
153 floating point and 32-bit integers. */
154
155static void
156alpha_lds (void *out, const void *in)
157{
158 ULONGEST mem = extract_unsigned_integer (in, 4);
159 ULONGEST frac = (mem >> 0) & 0x7fffff;
160 ULONGEST sign = (mem >> 31) & 1;
161 ULONGEST exp_msb = (mem >> 30) & 1;
162 ULONGEST exp_low = (mem >> 23) & 0x7f;
163 ULONGEST exp, reg;
164
165 exp = (exp_msb << 10) | exp_low;
166 if (exp_msb)
167 {
168 if (exp_low == 0x7f)
169 exp = 0x7ff;
170 }
171 else
172 {
173 if (exp_low != 0x00)
174 exp |= 0x380;
175 }
176
177 reg = (sign << 63) | (exp << 52) | (frac << 29);
178 store_unsigned_integer (out, 8, reg);
179}
180
181/* Similarly, this represents exactly the conversion performed by
182 the STS instruction. */
183
39efb398 184static void
c483c494
RH
185alpha_sts (void *out, const void *in)
186{
187 ULONGEST reg, mem;
188
189 reg = extract_unsigned_integer (in, 8);
190 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
191 store_unsigned_integer (out, 4, mem);
192}
193
d2427a71
RH
194/* The alpha needs a conversion between register and memory format if the
195 register is a floating point register and memory format is float, as the
196 register format must be double or memory format is an integer with 4
197 bytes or less, as the representation of integers in floating point
198 registers is different. */
199
c483c494 200static int
0abe36f5 201alpha_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
14696584 202{
83acabca
DJ
203 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
204 && TYPE_LENGTH (type) != 8);
14696584
RH
205}
206
d2427a71 207static void
ff2e87ac 208alpha_register_to_value (struct frame_info *frame, int regnum,
5b819568 209 struct type *valtype, gdb_byte *out)
5868c862 210{
2a1ce6ec
MK
211 gdb_byte in[MAX_REGISTER_SIZE];
212
ff2e87ac 213 frame_register_read (frame, regnum, in);
c483c494 214 switch (TYPE_LENGTH (valtype))
d2427a71 215 {
c483c494
RH
216 case 4:
217 alpha_sts (out, in);
218 break;
c483c494 219 default:
323e0a4a 220 error (_("Cannot retrieve value from floating point register"));
d2427a71 221 }
d2427a71 222}
5868c862 223
d2427a71 224static void
ff2e87ac 225alpha_value_to_register (struct frame_info *frame, int regnum,
5b819568 226 struct type *valtype, const gdb_byte *in)
d2427a71 227{
2a1ce6ec
MK
228 gdb_byte out[MAX_REGISTER_SIZE];
229
c483c494 230 switch (TYPE_LENGTH (valtype))
d2427a71 231 {
c483c494
RH
232 case 4:
233 alpha_lds (out, in);
234 break;
c483c494 235 default:
323e0a4a 236 error (_("Cannot store value in floating point register"));
d2427a71 237 }
ff2e87ac 238 put_frame_register (frame, regnum, out);
5868c862
JT
239}
240
d2427a71
RH
241\f
242/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
243 the stack. The register arguments are stored in ARG_REG_BUFFER, and
244 then moved into the register file; this simplifies the passing of a
245 large struct which extends from the registers to the stack, plus avoids
246 three ptrace invocations per word.
247
248 We don't bother tracking which register values should go in integer
249 regs or fp regs; we load the same values into both.
250
d2427a71
RH
251 If the called function is returning a structure, the address of the
252 structure to be returned is passed as a hidden first argument. */
c906108c 253
d2427a71 254static CORE_ADDR
7d9b040b 255alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
c88e30c0
RH
256 struct regcache *regcache, CORE_ADDR bp_addr,
257 int nargs, struct value **args, CORE_ADDR sp,
258 int struct_return, CORE_ADDR struct_addr)
c906108c 259{
d2427a71
RH
260 int i;
261 int accumulate_size = struct_return ? 8 : 0;
d2427a71 262 struct alpha_arg
c906108c 263 {
2a1ce6ec 264 gdb_byte *contents;
d2427a71
RH
265 int len;
266 int offset;
267 };
c88e30c0
RH
268 struct alpha_arg *alpha_args
269 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
52f0bd74 270 struct alpha_arg *m_arg;
2a1ce6ec 271 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 272 int required_arg_regs;
7d9b040b 273 CORE_ADDR func_addr = find_function_addr (function, NULL);
c906108c 274
c88e30c0
RH
275 /* The ABI places the address of the called function in T12. */
276 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
277
278 /* Set the return address register to point to the entry point
279 of the program, where a breakpoint lies in wait. */
280 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
281
282 /* Lay out the arguments in memory. */
d2427a71
RH
283 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
284 {
285 struct value *arg = args[i];
4991999e 286 struct type *arg_type = check_typedef (value_type (arg));
c88e30c0 287
d2427a71
RH
288 /* Cast argument to long if necessary as the compiler does it too. */
289 switch (TYPE_CODE (arg_type))
c906108c 290 {
d2427a71
RH
291 case TYPE_CODE_INT:
292 case TYPE_CODE_BOOL:
293 case TYPE_CODE_CHAR:
294 case TYPE_CODE_RANGE:
295 case TYPE_CODE_ENUM:
0ede8eca 296 if (TYPE_LENGTH (arg_type) == 4)
d2427a71 297 {
0ede8eca
RH
298 /* 32-bit values must be sign-extended to 64 bits
299 even if the base data type is unsigned. */
300 arg_type = builtin_type_int32;
301 arg = value_cast (arg_type, arg);
302 }
303 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
304 {
305 arg_type = builtin_type_int64;
d2427a71
RH
306 arg = value_cast (arg_type, arg);
307 }
308 break;
7b5e1cb3 309
c88e30c0
RH
310 case TYPE_CODE_FLT:
311 /* "float" arguments loaded in registers must be passed in
312 register format, aka "double". */
313 if (accumulate_size < sizeof (arg_reg_buffer)
314 && TYPE_LENGTH (arg_type) == 4)
315 {
8da61cc4 316 arg_type = builtin_type_ieee_double;
c88e30c0
RH
317 arg = value_cast (arg_type, arg);
318 }
319 /* Tru64 5.1 has a 128-bit long double, and passes this by
320 invisible reference. No one else uses this data type. */
321 else if (TYPE_LENGTH (arg_type) == 16)
322 {
323 /* Allocate aligned storage. */
324 sp = (sp & -16) - 16;
325
326 /* Write the real data into the stack. */
0fd88904 327 write_memory (sp, value_contents (arg), 16);
c88e30c0
RH
328
329 /* Construct the indirection. */
330 arg_type = lookup_pointer_type (arg_type);
331 arg = value_from_pointer (arg_type, sp);
332 }
333 break;
7b5e1cb3
RH
334
335 case TYPE_CODE_COMPLEX:
336 /* ??? The ABI says that complex values are passed as two
337 separate scalar values. This distinction only matters
338 for complex float. However, GCC does not implement this. */
339
340 /* Tru64 5.1 has a 128-bit long double, and passes this by
341 invisible reference. */
342 if (TYPE_LENGTH (arg_type) == 32)
343 {
344 /* Allocate aligned storage. */
345 sp = (sp & -16) - 16;
346
347 /* Write the real data into the stack. */
0fd88904 348 write_memory (sp, value_contents (arg), 32);
7b5e1cb3
RH
349
350 /* Construct the indirection. */
351 arg_type = lookup_pointer_type (arg_type);
352 arg = value_from_pointer (arg_type, sp);
353 }
354 break;
355
d2427a71
RH
356 default:
357 break;
c906108c 358 }
d2427a71
RH
359 m_arg->len = TYPE_LENGTH (arg_type);
360 m_arg->offset = accumulate_size;
361 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
0fd88904 362 m_arg->contents = value_contents_writeable (arg);
c906108c
SS
363 }
364
d2427a71
RH
365 /* Determine required argument register loads, loading an argument register
366 is expensive as it uses three ptrace calls. */
367 required_arg_regs = accumulate_size / 8;
368 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
369 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 370
d2427a71 371 /* Make room for the arguments on the stack. */
c88e30c0
RH
372 if (accumulate_size < sizeof(arg_reg_buffer))
373 accumulate_size = 0;
374 else
375 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 376 sp -= accumulate_size;
c906108c 377
c88e30c0 378 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 379 sp &= ~15;
c906108c 380
d2427a71
RH
381 /* `Push' arguments on the stack. */
382 for (i = nargs; m_arg--, --i >= 0;)
c906108c 383 {
2a1ce6ec 384 gdb_byte *contents = m_arg->contents;
c88e30c0
RH
385 int offset = m_arg->offset;
386 int len = m_arg->len;
387
388 /* Copy the bytes destined for registers into arg_reg_buffer. */
389 if (offset < sizeof(arg_reg_buffer))
390 {
391 if (offset + len <= sizeof(arg_reg_buffer))
392 {
393 memcpy (arg_reg_buffer + offset, contents, len);
394 continue;
395 }
396 else
397 {
398 int tlen = sizeof(arg_reg_buffer) - offset;
399 memcpy (arg_reg_buffer + offset, contents, tlen);
400 offset += tlen;
401 contents += tlen;
402 len -= tlen;
403 }
404 }
405
406 /* Everything else goes to the stack. */
407 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 408 }
c88e30c0
RH
409 if (struct_return)
410 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 411
d2427a71
RH
412 /* Load the argument registers. */
413 for (i = 0; i < required_arg_regs; i++)
414 {
09cc52fd
RH
415 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
416 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
417 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
418 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 419 }
c906108c 420
09cc52fd
RH
421 /* Finally, update the stack pointer. */
422 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
423
c88e30c0 424 return sp;
c906108c
SS
425}
426
5ec2bb99
RH
427/* Extract from REGCACHE the value about to be returned from a function
428 and copy it into VALBUF. */
d2427a71 429
dc129d82 430static void
5ec2bb99 431alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
5b819568 432 gdb_byte *valbuf)
140f9984 433{
7b5e1cb3 434 int length = TYPE_LENGTH (valtype);
2a1ce6ec 435 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
5ec2bb99
RH
436 ULONGEST l;
437
438 switch (TYPE_CODE (valtype))
439 {
440 case TYPE_CODE_FLT:
7b5e1cb3 441 switch (length)
5ec2bb99
RH
442 {
443 case 4:
444 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
c483c494 445 alpha_sts (valbuf, raw_buffer);
5ec2bb99
RH
446 break;
447
448 case 8:
449 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
450 break;
451
24064b5c
RH
452 case 16:
453 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
454 read_memory (l, valbuf, 16);
455 break;
456
5ec2bb99 457 default:
323e0a4a 458 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
5ec2bb99
RH
459 }
460 break;
461
7b5e1cb3
RH
462 case TYPE_CODE_COMPLEX:
463 switch (length)
464 {
465 case 8:
466 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
467 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
468 break;
469
470 case 16:
471 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
2a1ce6ec 472 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
7b5e1cb3
RH
473 break;
474
475 case 32:
476 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
477 read_memory (l, valbuf, 32);
478 break;
479
480 default:
323e0a4a 481 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
7b5e1cb3
RH
482 }
483 break;
484
5ec2bb99
RH
485 default:
486 /* Assume everything else degenerates to an integer. */
487 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
7b5e1cb3 488 store_unsigned_integer (valbuf, length, l);
5ec2bb99
RH
489 break;
490 }
140f9984
JT
491}
492
5ec2bb99
RH
493/* Insert the given value into REGCACHE as if it was being
494 returned by a function. */
0d056799 495
d2427a71 496static void
5ec2bb99 497alpha_store_return_value (struct type *valtype, struct regcache *regcache,
5b819568 498 const gdb_byte *valbuf)
c906108c 499{
d2427a71 500 int length = TYPE_LENGTH (valtype);
2a1ce6ec 501 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
5ec2bb99 502 ULONGEST l;
d2427a71 503
5ec2bb99 504 switch (TYPE_CODE (valtype))
c906108c 505 {
5ec2bb99
RH
506 case TYPE_CODE_FLT:
507 switch (length)
508 {
509 case 4:
c483c494 510 alpha_lds (raw_buffer, valbuf);
f75d70cc
RH
511 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
512 break;
5ec2bb99
RH
513
514 case 8:
515 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
516 break;
517
24064b5c
RH
518 case 16:
519 /* FIXME: 128-bit long doubles are returned like structures:
520 by writing into indirect storage provided by the caller
521 as the first argument. */
323e0a4a 522 error (_("Cannot set a 128-bit long double return value."));
24064b5c 523
5ec2bb99 524 default:
323e0a4a 525 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
5ec2bb99
RH
526 }
527 break;
d2427a71 528
7b5e1cb3
RH
529 case TYPE_CODE_COMPLEX:
530 switch (length)
531 {
532 case 8:
533 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
534 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
535 break;
536
537 case 16:
538 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
2a1ce6ec 539 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
7b5e1cb3
RH
540 break;
541
542 case 32:
543 /* FIXME: 128-bit long doubles are returned like structures:
544 by writing into indirect storage provided by the caller
545 as the first argument. */
323e0a4a 546 error (_("Cannot set a 128-bit long double return value."));
7b5e1cb3
RH
547
548 default:
323e0a4a 549 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
7b5e1cb3
RH
550 }
551 break;
552
5ec2bb99
RH
553 default:
554 /* Assume everything else degenerates to an integer. */
0ede8eca
RH
555 /* 32-bit values must be sign-extended to 64 bits
556 even if the base data type is unsigned. */
557 if (length == 4)
558 valtype = builtin_type_int32;
5ec2bb99
RH
559 l = unpack_long (valtype, valbuf);
560 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
561 break;
562 }
c906108c
SS
563}
564
9823e921
RH
565static enum return_value_convention
566alpha_return_value (struct gdbarch *gdbarch, struct type *type,
567 struct regcache *regcache, gdb_byte *readbuf,
568 const gdb_byte *writebuf)
569{
570 enum type_code code = TYPE_CODE (type);
571
572 if ((code == TYPE_CODE_STRUCT
573 || code == TYPE_CODE_UNION
574 || code == TYPE_CODE_ARRAY)
575 && gdbarch_tdep (gdbarch)->return_in_memory (type))
576 {
577 if (readbuf)
578 {
579 ULONGEST addr;
580 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
581 read_memory (addr, readbuf, TYPE_LENGTH (type));
582 }
583
584 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
585 }
586
587 if (readbuf)
588 alpha_extract_return_value (type, regcache, readbuf);
589 if (writebuf)
590 alpha_store_return_value (type, regcache, writebuf);
591
592 return RETURN_VALUE_REGISTER_CONVENTION;
593}
594
595static int
596alpha_return_in_memory_always (struct type *type)
597{
598 return 1;
599}
d2427a71 600\f
2a1ce6ec 601static const gdb_byte *
67d57894 602alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
c906108c 603{
2a1ce6ec 604 static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 605
2a1ce6ec
MK
606 *len = sizeof(break_insn);
607 return break_insn;
d2427a71 608}
c906108c 609
d2427a71
RH
610\f
611/* This returns the PC of the first insn after the prologue.
612 If we can't find the prologue, then return 0. */
c906108c 613
d2427a71
RH
614CORE_ADDR
615alpha_after_prologue (CORE_ADDR pc)
c906108c 616{
d2427a71
RH
617 struct symtab_and_line sal;
618 CORE_ADDR func_addr, func_end;
c906108c 619
d2427a71 620 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 621 return 0;
c906108c 622
d2427a71
RH
623 sal = find_pc_line (func_addr, 0);
624 if (sal.end < func_end)
625 return sal.end;
c5aa993b 626
d2427a71
RH
627 /* The line after the prologue is after the end of the function. In this
628 case, tell the caller to find the prologue the hard way. */
629 return 0;
c906108c
SS
630}
631
d2427a71
RH
632/* Read an instruction from memory at PC, looking through breakpoints. */
633
634unsigned int
635alpha_read_insn (CORE_ADDR pc)
c906108c 636{
e8d2d628 637 gdb_byte buf[ALPHA_INSN_SIZE];
d2427a71 638 int status;
c5aa993b 639
e8d2d628 640 status = read_memory_nobpt (pc, buf, sizeof (buf));
d2427a71
RH
641 if (status)
642 memory_error (status, pc);
e8d2d628 643 return extract_unsigned_integer (buf, sizeof (buf));
d2427a71 644}
c5aa993b 645
d2427a71
RH
646/* To skip prologues, I use this predicate. Returns either PC itself
647 if the code at PC does not look like a function prologue; otherwise
648 returns an address that (if we're lucky) follows the prologue. If
649 LENIENT, then we must skip everything which is involved in setting
650 up the frame (it's OK to skip more, just so long as we don't skip
651 anything which might clobber the registers which are being saved. */
c906108c 652
d2427a71 653static CORE_ADDR
6093d2eb 654alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
d2427a71
RH
655{
656 unsigned long inst;
657 int offset;
658 CORE_ADDR post_prologue_pc;
e8d2d628 659 gdb_byte buf[ALPHA_INSN_SIZE];
c906108c 660
d2427a71
RH
661 /* Silently return the unaltered pc upon memory errors.
662 This could happen on OSF/1 if decode_line_1 tries to skip the
663 prologue for quickstarted shared library functions when the
664 shared library is not yet mapped in.
665 Reading target memory is slow over serial lines, so we perform
666 this check only if the target has shared libraries (which all
667 Alpha targets do). */
e8d2d628 668 if (target_read_memory (pc, buf, sizeof (buf)))
d2427a71 669 return pc;
c906108c 670
d2427a71
RH
671 /* See if we can determine the end of the prologue via the symbol table.
672 If so, then return either PC, or the PC after the prologue, whichever
673 is greater. */
c906108c 674
d2427a71
RH
675 post_prologue_pc = alpha_after_prologue (pc);
676 if (post_prologue_pc != 0)
677 return max (pc, post_prologue_pc);
c906108c 678
d2427a71
RH
679 /* Can't determine prologue from the symbol table, need to examine
680 instructions. */
dc1b0db2 681
d2427a71
RH
682 /* Skip the typical prologue instructions. These are the stack adjustment
683 instruction and the instructions that save registers on the stack
684 or in the gcc frame. */
e8d2d628 685 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
d2427a71
RH
686 {
687 inst = alpha_read_insn (pc + offset);
c906108c 688
d2427a71
RH
689 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
690 continue;
691 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
692 continue;
693 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
694 continue;
695 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
696 continue;
c906108c 697
d2427a71
RH
698 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
699 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
700 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
701 continue;
c906108c 702
d2427a71
RH
703 if (inst == 0x47de040f) /* bis sp,sp,fp */
704 continue;
705 if (inst == 0x47fe040f) /* bis zero,sp,fp */
706 continue;
c906108c 707
d2427a71 708 break;
c906108c 709 }
d2427a71
RH
710 return pc + offset;
711}
c906108c 712
d2427a71
RH
713\f
714/* Figure out where the longjmp will land.
715 We expect the first arg to be a pointer to the jmp_buf structure from
716 which we extract the PC (JB_PC) that we will land at. The PC is copied
717 into the "pc". This routine returns true on success. */
c906108c
SS
718
719static int
60ade65d 720alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
c906108c 721{
60ade65d 722 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
d2427a71 723 CORE_ADDR jb_addr;
2a1ce6ec 724 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 725
60ade65d 726 jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM);
c906108c 727
d2427a71
RH
728 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
729 raw_buffer, tdep->jb_elt_size))
c906108c 730 return 0;
d2427a71 731
7c0b4a20 732 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 733 return 1;
c906108c
SS
734}
735
d2427a71
RH
736\f
737/* Frame unwinder for signal trampolines. We use alpha tdep bits that
738 describe the location and shape of the sigcontext structure. After
739 that, all registers are in memory, so it's easy. */
740/* ??? Shouldn't we be able to do this generically, rather than with
741 OSABI data specific to Alpha? */
742
743struct alpha_sigtramp_unwind_cache
c906108c 744{
d2427a71
RH
745 CORE_ADDR sigcontext_addr;
746};
c906108c 747
d2427a71
RH
748static struct alpha_sigtramp_unwind_cache *
749alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
750 void **this_prologue_cache)
751{
752 struct alpha_sigtramp_unwind_cache *info;
753 struct gdbarch_tdep *tdep;
c906108c 754
d2427a71
RH
755 if (*this_prologue_cache)
756 return *this_prologue_cache;
c906108c 757
d2427a71
RH
758 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
759 *this_prologue_cache = info;
c906108c 760
ec7cc0e8 761 tdep = gdbarch_tdep (get_frame_arch (next_frame));
d2427a71 762 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 763
d2427a71 764 return info;
c906108c
SS
765}
766
138e7be5
MK
767/* Return the address of REGNUM in a sigtramp frame. Since this is
768 all arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 769
d2427a71 770static CORE_ADDR
be8626e0
MD
771alpha_sigtramp_register_address (struct gdbarch *gdbarch,
772 CORE_ADDR sigcontext_addr, int regnum)
d2427a71 773{
be8626e0 774 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
138e7be5
MK
775
776 if (regnum >= 0 && regnum < 32)
777 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
778 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
779 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
780 else if (regnum == ALPHA_PC_REGNUM)
781 return sigcontext_addr + tdep->sc_pc_offset;
c5aa993b 782
d2427a71 783 return 0;
c906108c
SS
784}
785
d2427a71
RH
786/* Given a GDB frame, determine the address of the calling function's
787 frame. This will be used to create a new GDB frame struct. */
140f9984 788
dc129d82 789static void
d2427a71
RH
790alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
791 void **this_prologue_cache,
792 struct frame_id *this_id)
c906108c 793{
be8626e0
MD
794 struct gdbarch *gdbarch = get_frame_arch (next_frame);
795 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d2427a71
RH
796 struct alpha_sigtramp_unwind_cache *info
797 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
d2427a71
RH
798 CORE_ADDR stack_addr, code_addr;
799
800 /* If the OSABI couldn't locate the sigcontext, give up. */
801 if (info->sigcontext_addr == 0)
802 return;
803
804 /* If we have dynamic signal trampolines, find their start.
805 If we do not, then we must assume there is a symbol record
806 that can provide the start address. */
d2427a71 807 if (tdep->dynamic_sigtramp_offset)
c906108c 808 {
d2427a71
RH
809 int offset;
810 code_addr = frame_pc_unwind (next_frame);
811 offset = tdep->dynamic_sigtramp_offset (code_addr);
812 if (offset >= 0)
813 code_addr -= offset;
c906108c 814 else
d2427a71 815 code_addr = 0;
c906108c 816 }
d2427a71 817 else
93d42b30 818 code_addr = frame_func_unwind (next_frame, SIGTRAMP_FRAME);
c906108c 819
d2427a71 820 /* The stack address is trivially read from the sigcontext. */
be8626e0 821 stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
d2427a71 822 ALPHA_SP_REGNUM);
b21fd293
RH
823 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
824 ALPHA_REGISTER_SIZE);
c906108c 825
d2427a71 826 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
827}
828
d2427a71 829/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 830
d2427a71
RH
831static void
832alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
833 void **this_prologue_cache,
834 int regnum, int *optimizedp,
835 enum lval_type *lvalp, CORE_ADDR *addrp,
5b819568 836 int *realnump, gdb_byte *bufferp)
c906108c 837{
d2427a71
RH
838 struct alpha_sigtramp_unwind_cache *info
839 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
840 CORE_ADDR addr;
c906108c 841
d2427a71 842 if (info->sigcontext_addr != 0)
c906108c 843 {
d2427a71 844 /* All integer and fp registers are stored in memory. */
be8626e0
MD
845 addr = alpha_sigtramp_register_address (get_frame_arch (next_frame),
846 info->sigcontext_addr, regnum);
d2427a71 847 if (addr != 0)
c906108c 848 {
d2427a71
RH
849 *optimizedp = 0;
850 *lvalp = lval_memory;
851 *addrp = addr;
852 *realnump = -1;
853 if (bufferp != NULL)
b21fd293 854 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
d2427a71 855 return;
c906108c 856 }
c906108c
SS
857 }
858
d2427a71
RH
859 /* This extra register may actually be in the sigcontext, but our
860 current description of it in alpha_sigtramp_frame_unwind_cache
861 doesn't include it. Too bad. Fall back on whatever's in the
862 outer frame. */
5efde112
DJ
863 *optimizedp = 0;
864 *lvalp = lval_register;
865 *addrp = 0;
866 *realnump = regnum;
867 if (bufferp)
868 frame_unwind_register (next_frame, *realnump, bufferp);
d2427a71 869}
c906108c 870
d2427a71
RH
871static const struct frame_unwind alpha_sigtramp_frame_unwind = {
872 SIGTRAMP_FRAME,
873 alpha_sigtramp_frame_this_id,
874 alpha_sigtramp_frame_prev_register
875};
c906108c 876
d2427a71 877static const struct frame_unwind *
336d1bba 878alpha_sigtramp_frame_sniffer (struct frame_info *next_frame)
d2427a71 879{
ec7cc0e8 880 struct gdbarch *gdbarch = get_frame_arch (next_frame);
336d1bba 881 CORE_ADDR pc = frame_pc_unwind (next_frame);
d2427a71 882 char *name;
c906108c 883
f2524b93
AC
884 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
885 look at tramp-frame.h and other simplier per-architecture
886 sigtramp unwinders. */
887
888 /* We shouldn't even bother to try if the OSABI didn't register a
889 sigcontext_addr handler or pc_in_sigtramp hander. */
ec7cc0e8 890 if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
f2524b93 891 return NULL;
ec7cc0e8 892 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
d2427a71 893 return NULL;
c906108c 894
d2427a71
RH
895 /* Otherwise we should be in a signal frame. */
896 find_pc_partial_function (pc, &name, NULL, NULL);
ec7cc0e8 897 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (pc, name))
d2427a71 898 return &alpha_sigtramp_frame_unwind;
c906108c 899
d2427a71 900 return NULL;
c906108c 901}
d2427a71
RH
902\f
903/* Fallback alpha frame unwinder. Uses instruction scanning and knows
904 something about the traditional layout of alpha stack frames. */
c906108c 905
d2427a71 906struct alpha_heuristic_unwind_cache
c906108c 907{
d2427a71
RH
908 CORE_ADDR *saved_regs;
909 CORE_ADDR vfp;
910 CORE_ADDR start_pc;
911 int return_reg;
912};
c906108c 913
d2427a71
RH
914/* Heuristic_proc_start may hunt through the text section for a long
915 time across a 2400 baud serial line. Allows the user to limit this
916 search. */
917static unsigned int heuristic_fence_post = 0;
c906108c 918
d2427a71
RH
919/* Attempt to locate the start of the function containing PC. We assume that
920 the previous function ends with an about_to_return insn. Not foolproof by
921 any means, since gcc is happy to put the epilogue in the middle of a
922 function. But we're guessing anyway... */
c906108c 923
d2427a71 924static CORE_ADDR
be8626e0 925alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc)
d2427a71 926{
be8626e0 927 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d2427a71
RH
928 CORE_ADDR last_non_nop = pc;
929 CORE_ADDR fence = pc - heuristic_fence_post;
930 CORE_ADDR orig_pc = pc;
fbe586ae 931 CORE_ADDR func;
9e0b60a8 932
d2427a71
RH
933 if (pc == 0)
934 return 0;
9e0b60a8 935
fbe586ae
RH
936 /* First see if we can find the start of the function from minimal
937 symbol information. This can succeed with a binary that doesn't
938 have debug info, but hasn't been stripped. */
939 func = get_pc_function_start (pc);
940 if (func)
941 return func;
942
d2427a71
RH
943 if (heuristic_fence_post == UINT_MAX
944 || fence < tdep->vm_min_address)
945 fence = tdep->vm_min_address;
c906108c 946
d2427a71
RH
947 /* Search back for previous return; also stop at a 0, which might be
948 seen for instance before the start of a code section. Don't include
949 nops, since this usually indicates padding between functions. */
e8d2d628 950 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
c906108c 951 {
d2427a71
RH
952 unsigned int insn = alpha_read_insn (pc);
953 switch (insn)
c906108c 954 {
d2427a71
RH
955 case 0: /* invalid insn */
956 case 0x6bfa8001: /* ret $31,($26),1 */
957 return last_non_nop;
958
959 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
960 case 0x47ff041f: /* nop: bis $31,$31,$31 */
961 break;
962
963 default:
964 last_non_nop = pc;
965 break;
c906108c 966 }
d2427a71 967 }
c906108c 968
d2427a71
RH
969 /* It's not clear to me why we reach this point when stopping quietly,
970 but with this test, at least we don't print out warnings for every
971 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
972 if (stop_soon == NO_STOP_QUIETLY)
973 {
974 static int blurb_printed = 0;
c906108c 975
d2427a71 976 if (fence == tdep->vm_min_address)
323e0a4a
AC
977 warning (_("Hit beginning of text section without finding \
978enclosing function for address 0x%s"), paddr_nz (orig_pc));
c906108c 979 else
323e0a4a
AC
980 warning (_("Hit heuristic-fence-post without finding \
981enclosing function for address 0x%s"), paddr_nz (orig_pc));
c906108c 982
d2427a71
RH
983 if (!blurb_printed)
984 {
323e0a4a 985 printf_filtered (_("\
d2427a71
RH
986This warning occurs if you are debugging a function without any symbols\n\
987(for example, in a stripped executable). In that case, you may wish to\n\
988increase the size of the search with the `set heuristic-fence-post' command.\n\
989\n\
990Otherwise, you told GDB there was a function where there isn't one, or\n\
323e0a4a 991(more likely) you have encountered a bug in GDB.\n"));
d2427a71
RH
992 blurb_printed = 1;
993 }
994 }
c906108c 995
d2427a71
RH
996 return 0;
997}
c906108c 998
fbe586ae 999static struct alpha_heuristic_unwind_cache *
d2427a71
RH
1000alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
1001 void **this_prologue_cache,
1002 CORE_ADDR start_pc)
1003{
be8626e0 1004 struct gdbarch *gdbarch = get_frame_arch (next_frame);
d2427a71
RH
1005 struct alpha_heuristic_unwind_cache *info;
1006 ULONGEST val;
1007 CORE_ADDR limit_pc, cur_pc;
1008 int frame_reg, frame_size, return_reg, reg;
c906108c 1009
d2427a71
RH
1010 if (*this_prologue_cache)
1011 return *this_prologue_cache;
c906108c 1012
d2427a71
RH
1013 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
1014 *this_prologue_cache = info;
1015 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 1016
d2427a71
RH
1017 limit_pc = frame_pc_unwind (next_frame);
1018 if (start_pc == 0)
be8626e0 1019 start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc);
d2427a71 1020 info->start_pc = start_pc;
c906108c 1021
d2427a71
RH
1022 frame_reg = ALPHA_SP_REGNUM;
1023 frame_size = 0;
1024 return_reg = -1;
c906108c 1025
d2427a71
RH
1026 /* If we've identified a likely place to start, do code scanning. */
1027 if (start_pc != 0)
c5aa993b 1028 {
d2427a71
RH
1029 /* Limit the forward search to 50 instructions. */
1030 if (start_pc + 200 < limit_pc)
1031 limit_pc = start_pc + 200;
c5aa993b 1032
e8d2d628 1033 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
d2427a71
RH
1034 {
1035 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1036
d2427a71
RH
1037 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1038 {
1039 if (word & 0x8000)
1040 {
1041 /* Consider only the first stack allocation instruction
1042 to contain the static size of the frame. */
1043 if (frame_size == 0)
1044 frame_size = (-word) & 0xffff;
1045 }
1046 else
1047 {
1048 /* Exit loop if a positive stack adjustment is found, which
1049 usually means that the stack cleanup code in the function
1050 epilogue is reached. */
1051 break;
1052 }
1053 }
1054 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1055 {
1056 reg = (word & 0x03e00000) >> 21;
1057
d15bfd3a
AC
1058 /* Ignore this instruction if we have already encountered
1059 an instruction saving the same register earlier in the
1060 function code. The current instruction does not tell
1061 us where the original value upon function entry is saved.
1062 All it says is that the function we are scanning reused
1063 that register for some computation of its own, and is now
1064 saving its result. */
1065 if (info->saved_regs[reg])
1066 continue;
1067
d2427a71
RH
1068 if (reg == 31)
1069 continue;
1070
1071 /* Do not compute the address where the register was saved yet,
1072 because we don't know yet if the offset will need to be
1073 relative to $sp or $fp (we can not compute the address
1074 relative to $sp if $sp is updated during the execution of
1075 the current subroutine, for instance when doing some alloca).
1076 So just store the offset for the moment, and compute the
1077 address later when we know whether this frame has a frame
1078 pointer or not. */
1079 /* Hack: temporarily add one, so that the offset is non-zero
1080 and we can tell which registers have save offsets below. */
1081 info->saved_regs[reg] = (word & 0xffff) + 1;
1082
1083 /* Starting with OSF/1-3.2C, the system libraries are shipped
1084 without local symbols, but they still contain procedure
1085 descriptors without a symbol reference. GDB is currently
1086 unable to find these procedure descriptors and uses
1087 heuristic_proc_desc instead.
1088 As some low level compiler support routines (__div*, __add*)
1089 use a non-standard return address register, we have to
1090 add some heuristics to determine the return address register,
1091 or stepping over these routines will fail.
1092 Usually the return address register is the first register
1093 saved on the stack, but assembler optimization might
1094 rearrange the register saves.
1095 So we recognize only a few registers (t7, t9, ra) within
1096 the procedure prologue as valid return address registers.
1097 If we encounter a return instruction, we extract the
1098 the return address register from it.
1099
1100 FIXME: Rewriting GDB to access the procedure descriptors,
1101 e.g. via the minimal symbol table, might obviate this hack. */
1102 if (return_reg == -1
1103 && cur_pc < (start_pc + 80)
1104 && (reg == ALPHA_T7_REGNUM
1105 || reg == ALPHA_T9_REGNUM
1106 || reg == ALPHA_RA_REGNUM))
1107 return_reg = reg;
1108 }
1109 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1110 return_reg = (word >> 16) & 0x1f;
1111 else if (word == 0x47de040f) /* bis sp,sp,fp */
1112 frame_reg = ALPHA_GCC_FP_REGNUM;
1113 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1114 frame_reg = ALPHA_GCC_FP_REGNUM;
1115 }
c5aa993b 1116
d2427a71
RH
1117 /* If we haven't found a valid return address register yet, keep
1118 searching in the procedure prologue. */
1119 if (return_reg == -1)
1120 {
1121 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1122 {
1123 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1124
d2427a71
RH
1125 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1126 {
1127 reg = (word & 0x03e00000) >> 21;
1128 if (reg == ALPHA_T7_REGNUM
1129 || reg == ALPHA_T9_REGNUM
1130 || reg == ALPHA_RA_REGNUM)
1131 {
1132 return_reg = reg;
1133 break;
1134 }
1135 }
1136 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1137 {
1138 return_reg = (word >> 16) & 0x1f;
1139 break;
1140 }
85b32d22 1141
e8d2d628 1142 cur_pc += ALPHA_INSN_SIZE;
d2427a71
RH
1143 }
1144 }
c906108c 1145 }
c906108c 1146
d2427a71
RH
1147 /* Failing that, do default to the customary RA. */
1148 if (return_reg == -1)
1149 return_reg = ALPHA_RA_REGNUM;
1150 info->return_reg = return_reg;
f8453e34 1151
11411de3 1152 val = frame_unwind_register_unsigned (next_frame, frame_reg);
d2427a71 1153 info->vfp = val + frame_size;
c906108c 1154
d2427a71
RH
1155 /* Convert offsets to absolute addresses. See above about adding
1156 one to the offsets to make all detected offsets non-zero. */
1157 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1158 if (info->saved_regs[reg])
1159 info->saved_regs[reg] += val - 1;
1160
1161 return info;
c906108c 1162}
c906108c 1163
d2427a71
RH
1164/* Given a GDB frame, determine the address of the calling function's
1165 frame. This will be used to create a new GDB frame struct. */
1166
fbe586ae 1167static void
d2427a71
RH
1168alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1169 void **this_prologue_cache,
1170 struct frame_id *this_id)
c906108c 1171{
d2427a71
RH
1172 struct alpha_heuristic_unwind_cache *info
1173 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1174
d2427a71 1175 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1176}
1177
d2427a71
RH
1178/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1179
fbe586ae 1180static void
d2427a71
RH
1181alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1182 void **this_prologue_cache,
1183 int regnum, int *optimizedp,
1184 enum lval_type *lvalp, CORE_ADDR *addrp,
5b819568 1185 int *realnump, gdb_byte *bufferp)
c906108c 1186{
d2427a71
RH
1187 struct alpha_heuristic_unwind_cache *info
1188 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1189
1190 /* The PC of the previous frame is stored in the link register of
1191 the current frame. Frob regnum so that we pull the value from
1192 the correct place. */
1193 if (regnum == ALPHA_PC_REGNUM)
1194 regnum = info->return_reg;
1195
1196 /* For all registers known to be saved in the current frame,
1197 do the obvious and pull the value out. */
1198 if (info->saved_regs[regnum])
c906108c 1199 {
d2427a71
RH
1200 *optimizedp = 0;
1201 *lvalp = lval_memory;
1202 *addrp = info->saved_regs[regnum];
1203 *realnump = -1;
1204 if (bufferp != NULL)
b21fd293 1205 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1206 return;
1207 }
1208
d2427a71
RH
1209 /* The stack pointer of the previous frame is computed by popping
1210 the current stack frame. */
1211 if (regnum == ALPHA_SP_REGNUM)
c906108c 1212 {
d2427a71
RH
1213 *optimizedp = 0;
1214 *lvalp = not_lval;
1215 *addrp = 0;
1216 *realnump = -1;
1217 if (bufferp != NULL)
1218 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1219 return;
c906108c 1220 }
95b80706 1221
d2427a71 1222 /* Otherwise assume the next frame has the same register value. */
5efde112
DJ
1223 *optimizedp = 0;
1224 *lvalp = lval_register;
1225 *addrp = 0;
1226 *realnump = regnum;
1227 if (bufferp)
1228 frame_unwind_register (next_frame, *realnump, bufferp);
95b80706
JT
1229}
1230
d2427a71
RH
1231static const struct frame_unwind alpha_heuristic_frame_unwind = {
1232 NORMAL_FRAME,
1233 alpha_heuristic_frame_this_id,
1234 alpha_heuristic_frame_prev_register
1235};
c906108c 1236
d2427a71 1237static const struct frame_unwind *
336d1bba 1238alpha_heuristic_frame_sniffer (struct frame_info *next_frame)
c906108c 1239{
d2427a71 1240 return &alpha_heuristic_frame_unwind;
c906108c
SS
1241}
1242
fbe586ae 1243static CORE_ADDR
d2427a71
RH
1244alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1245 void **this_prologue_cache)
c906108c 1246{
d2427a71
RH
1247 struct alpha_heuristic_unwind_cache *info
1248 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1249
d2427a71 1250 return info->vfp;
c906108c
SS
1251}
1252
d2427a71
RH
1253static const struct frame_base alpha_heuristic_frame_base = {
1254 &alpha_heuristic_frame_unwind,
1255 alpha_heuristic_frame_base_address,
1256 alpha_heuristic_frame_base_address,
1257 alpha_heuristic_frame_base_address
1258};
1259
c906108c 1260/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1261 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1262
1263static void
fba45db2 1264reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1265{
1266 reinit_frame_cache ();
1267}
1268
d2427a71 1269\f
d2427a71
RH
1270/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1271 dummy frame. The frame ID's base needs to match the TOS value
1272 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1273 breakpoint. */
d734c450 1274
d2427a71
RH
1275static struct frame_id
1276alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1277{
d2427a71 1278 ULONGEST base;
11411de3 1279 base = frame_unwind_register_unsigned (next_frame, ALPHA_SP_REGNUM);
d2427a71 1280 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1281}
1282
dc129d82 1283static CORE_ADDR
d2427a71 1284alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1285{
d2427a71 1286 ULONGEST pc;
11411de3 1287 pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM);
d2427a71 1288 return pc;
accc6d1f
JT
1289}
1290
98a8e1e5
RH
1291\f
1292/* Helper routines for alpha*-nat.c files to move register sets to and
1293 from core files. The UNIQUE pointer is allowed to be NULL, as most
1294 targets don't supply this value in their core files. */
1295
1296void
390c1522
UW
1297alpha_supply_int_regs (struct regcache *regcache, int regno,
1298 const void *r0_r30, const void *pc, const void *unique)
98a8e1e5 1299{
2a1ce6ec 1300 const gdb_byte *regs = r0_r30;
98a8e1e5
RH
1301 int i;
1302
1303 for (i = 0; i < 31; ++i)
1304 if (regno == i || regno == -1)
390c1522 1305 regcache_raw_supply (regcache, i, regs + i * 8);
98a8e1e5
RH
1306
1307 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
390c1522 1308 regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, NULL);
98a8e1e5
RH
1309
1310 if (regno == ALPHA_PC_REGNUM || regno == -1)
390c1522 1311 regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1312
1313 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
390c1522 1314 regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1315}
1316
1317void
390c1522
UW
1318alpha_fill_int_regs (const struct regcache *regcache,
1319 int regno, void *r0_r30, void *pc, void *unique)
98a8e1e5 1320{
2a1ce6ec 1321 gdb_byte *regs = r0_r30;
98a8e1e5
RH
1322 int i;
1323
1324 for (i = 0; i < 31; ++i)
1325 if (regno == i || regno == -1)
390c1522 1326 regcache_raw_collect (regcache, i, regs + i * 8);
98a8e1e5
RH
1327
1328 if (regno == ALPHA_PC_REGNUM || regno == -1)
390c1522 1329 regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1330
1331 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
390c1522 1332 regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1333}
1334
1335void
390c1522
UW
1336alpha_supply_fp_regs (struct regcache *regcache, int regno,
1337 const void *f0_f30, const void *fpcr)
98a8e1e5 1338{
2a1ce6ec 1339 const gdb_byte *regs = f0_f30;
98a8e1e5
RH
1340 int i;
1341
1342 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1343 if (regno == i || regno == -1)
390c1522 1344 regcache_raw_supply (regcache, i,
2a1ce6ec 1345 regs + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1346
1347 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
390c1522 1348 regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1349}
1350
1351void
390c1522
UW
1352alpha_fill_fp_regs (const struct regcache *regcache,
1353 int regno, void *f0_f30, void *fpcr)
98a8e1e5 1354{
2a1ce6ec 1355 gdb_byte *regs = f0_f30;
98a8e1e5
RH
1356 int i;
1357
1358 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1359 if (regno == i || regno == -1)
390c1522 1360 regcache_raw_collect (regcache, i,
2a1ce6ec 1361 regs + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1362
1363 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
390c1522 1364 regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1365}
1366
d2427a71 1367\f
0de94d4b
JB
1368
1369/* Return nonzero if the G_floating register value in REG is equal to
1370 zero for FP control instructions. */
1371
1372static int
1373fp_register_zero_p (LONGEST reg)
1374{
1375 /* Check that all bits except the sign bit are zero. */
1376 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1377
1378 return ((reg & zero_mask) == 0);
1379}
1380
1381/* Return the value of the sign bit for the G_floating register
1382 value held in REG. */
1383
1384static int
1385fp_register_sign_bit (LONGEST reg)
1386{
1387 const LONGEST sign_mask = (LONGEST) 1 << 63;
1388
1389 return ((reg & sign_mask) != 0);
1390}
1391
ec32e4be
JT
1392/* alpha_software_single_step() is called just before we want to resume
1393 the inferior, if we want to single-step it but there is no hardware
1394 or kernel single-step support (NetBSD on Alpha, for example). We find
e0cd558a 1395 the target of the coming instruction and breakpoint it. */
ec32e4be
JT
1396
1397static CORE_ADDR
0b1b3e42 1398alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
ec32e4be
JT
1399{
1400 unsigned int insn;
1401 unsigned int op;
551e4f2e 1402 int regno;
ec32e4be
JT
1403 int offset;
1404 LONGEST rav;
1405
b21fd293 1406 insn = alpha_read_insn (pc);
ec32e4be
JT
1407
1408 /* Opcode is top 6 bits. */
1409 op = (insn >> 26) & 0x3f;
1410
1411 if (op == 0x1a)
1412 {
1413 /* Jump format: target PC is:
1414 RB & ~3 */
0b1b3e42 1415 return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
ec32e4be
JT
1416 }
1417
1418 if ((op & 0x30) == 0x30)
1419 {
1420 /* Branch format: target PC is:
1421 (new PC) + (4 * sext(displacement)) */
1422 if (op == 0x30 || /* BR */
1423 op == 0x34) /* BSR */
1424 {
1425 branch_taken:
1426 offset = (insn & 0x001fffff);
1427 if (offset & 0x00100000)
1428 offset |= 0xffe00000;
e8d2d628
MK
1429 offset *= ALPHA_INSN_SIZE;
1430 return (pc + ALPHA_INSN_SIZE + offset);
ec32e4be
JT
1431 }
1432
1433 /* Need to determine if branch is taken; read RA. */
551e4f2e
JB
1434 regno = (insn >> 21) & 0x1f;
1435 switch (op)
1436 {
1437 case 0x31: /* FBEQ */
1438 case 0x36: /* FBGE */
1439 case 0x37: /* FBGT */
1440 case 0x33: /* FBLE */
1441 case 0x32: /* FBLT */
1442 case 0x35: /* FBNE */
ec7cc0e8 1443 regno += gdbarch_fp0_regnum (get_frame_arch (frame));
551e4f2e
JB
1444 }
1445
0b1b3e42 1446 rav = get_frame_register_signed (frame, regno);
0de94d4b 1447
ec32e4be
JT
1448 switch (op)
1449 {
1450 case 0x38: /* BLBC */
1451 if ((rav & 1) == 0)
1452 goto branch_taken;
1453 break;
1454 case 0x3c: /* BLBS */
1455 if (rav & 1)
1456 goto branch_taken;
1457 break;
1458 case 0x39: /* BEQ */
1459 if (rav == 0)
1460 goto branch_taken;
1461 break;
1462 case 0x3d: /* BNE */
1463 if (rav != 0)
1464 goto branch_taken;
1465 break;
1466 case 0x3a: /* BLT */
1467 if (rav < 0)
1468 goto branch_taken;
1469 break;
1470 case 0x3b: /* BLE */
1471 if (rav <= 0)
1472 goto branch_taken;
1473 break;
1474 case 0x3f: /* BGT */
1475 if (rav > 0)
1476 goto branch_taken;
1477 break;
1478 case 0x3e: /* BGE */
1479 if (rav >= 0)
1480 goto branch_taken;
1481 break;
d2427a71 1482
0de94d4b
JB
1483 /* Floating point branches. */
1484
1485 case 0x31: /* FBEQ */
1486 if (fp_register_zero_p (rav))
1487 goto branch_taken;
1488 break;
1489 case 0x36: /* FBGE */
1490 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1491 goto branch_taken;
1492 break;
1493 case 0x37: /* FBGT */
1494 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1495 goto branch_taken;
1496 break;
1497 case 0x33: /* FBLE */
1498 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1499 goto branch_taken;
1500 break;
1501 case 0x32: /* FBLT */
1502 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1503 goto branch_taken;
1504 break;
1505 case 0x35: /* FBNE */
1506 if (! fp_register_zero_p (rav))
1507 goto branch_taken;
1508 break;
ec32e4be
JT
1509 }
1510 }
1511
1512 /* Not a branch or branch not taken; target PC is:
1513 pc + 4 */
e8d2d628 1514 return (pc + ALPHA_INSN_SIZE);
ec32e4be
JT
1515}
1516
e6590a1b 1517int
0b1b3e42 1518alpha_software_single_step (struct frame_info *frame)
ec32e4be 1519{
e0cd558a 1520 CORE_ADDR pc, next_pc;
ec32e4be 1521
0b1b3e42
UW
1522 pc = get_frame_pc (frame);
1523 next_pc = alpha_next_pc (frame, pc);
ec32e4be 1524
e0cd558a 1525 insert_single_step_breakpoint (next_pc);
e6590a1b 1526 return 1;
c906108c
SS
1527}
1528
dc129d82 1529\f
dc129d82
JT
1530/* Initialize the current architecture based on INFO. If possible, re-use an
1531 architecture from ARCHES, which is a list of architectures already created
1532 during this debugging session.
1533
1534 Called e.g. at program startup, when reading a core file, and when reading
1535 a binary file. */
1536
1537static struct gdbarch *
1538alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1539{
1540 struct gdbarch_tdep *tdep;
1541 struct gdbarch *gdbarch;
dc129d82
JT
1542
1543 /* Try to determine the ABI of the object we are loading. */
4be87837 1544 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1545 {
4be87837
DJ
1546 /* If it's an ECOFF file, assume it's OSF/1. */
1547 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1548 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1549 }
1550
1551 /* Find a candidate among extant architectures. */
4be87837
DJ
1552 arches = gdbarch_list_lookup_by_info (arches, &info);
1553 if (arches != NULL)
1554 return arches->gdbarch;
dc129d82
JT
1555
1556 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1557 gdbarch = gdbarch_alloc (&info, tdep);
1558
d2427a71
RH
1559 /* Lowest text address. This is used by heuristic_proc_start()
1560 to decide when to stop looking. */
594706e6 1561 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
d9b023cc 1562
36a6271d 1563 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1564 tdep->sigcontext_addr = NULL;
138e7be5
MK
1565 tdep->sc_pc_offset = 2 * 8;
1566 tdep->sc_regs_offset = 4 * 8;
1567 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
36a6271d 1568
accc6d1f
JT
1569 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1570
9823e921
RH
1571 tdep->return_in_memory = alpha_return_in_memory_always;
1572
dc129d82
JT
1573 /* Type sizes */
1574 set_gdbarch_short_bit (gdbarch, 16);
1575 set_gdbarch_int_bit (gdbarch, 32);
1576 set_gdbarch_long_bit (gdbarch, 64);
1577 set_gdbarch_long_long_bit (gdbarch, 64);
1578 set_gdbarch_float_bit (gdbarch, 32);
1579 set_gdbarch_double_bit (gdbarch, 64);
1580 set_gdbarch_long_double_bit (gdbarch, 64);
1581 set_gdbarch_ptr_bit (gdbarch, 64);
1582
1583 /* Register info */
1584 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1585 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1586 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1587 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1588
1589 set_gdbarch_register_name (gdbarch, alpha_register_name);
c483c494 1590 set_gdbarch_register_type (gdbarch, alpha_register_type);
dc129d82
JT
1591
1592 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1593 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1594
c483c494
RH
1595 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1596 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1597 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
dc129d82 1598
615967cb
RH
1599 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1600
d2427a71 1601 /* Prologue heuristics. */
dc129d82
JT
1602 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1603
5ef165c2
RH
1604 /* Disassembler. */
1605 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1606
d2427a71 1607 /* Call info. */
dc129d82 1608
9823e921 1609 set_gdbarch_return_value (gdbarch, alpha_return_value);
dc129d82
JT
1610
1611 /* Settings for calling functions in the inferior. */
c88e30c0 1612 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1613
1614 /* Methods for saving / extracting a dummy frame's ID. */
1615 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
d2427a71
RH
1616
1617 /* Return the unwound PC value. */
1618 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1619
1620 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1621 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1622
95b80706 1623 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
e8d2d628 1624 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
9d519230 1625 set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
95b80706 1626
44dffaac 1627 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1628 gdbarch_init_osabi (info, gdbarch);
44dffaac 1629
accc6d1f
JT
1630 /* Now that we have tuned the configuration, set a few final things
1631 based on what the OS ABI has told us. */
1632
1633 if (tdep->jb_pc >= 0)
1634 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1635
336d1bba
AC
1636 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer);
1637 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer);
dc129d82 1638
d2427a71 1639 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1640
d2427a71 1641 return gdbarch;
dc129d82
JT
1642}
1643
baa490c4
RH
1644void
1645alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1646{
336d1bba
AC
1647 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1648 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
baa490c4
RH
1649}
1650
a78f21af
AC
1651extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1652
c906108c 1653void
fba45db2 1654_initialize_alpha_tdep (void)
c906108c
SS
1655{
1656 struct cmd_list_element *c;
1657
d2427a71 1658 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1659
1660 /* Let the user set the fence post for heuristic_proc_start. */
1661
1662 /* We really would like to have both "0" and "unlimited" work, but
1663 command.c doesn't deal with that. So make it a var_zinteger
1664 because the user can always use "999999" or some such for unlimited. */
edefbb7c
AC
1665 /* We need to throw away the frame cache when we set this, since it
1666 might change our ability to get backtraces. */
1667 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
7915a72c
AC
1668 &heuristic_fence_post, _("\
1669Set the distance searched for the start of a function."), _("\
1670Show the distance searched for the start of a function."), _("\
c906108c
SS
1671If you are debugging a stripped executable, GDB needs to search through the\n\
1672program for the start of a function. This command sets the distance of the\n\
323e0a4a 1673search. The only need to set it is when debugging a stripped executable."),
2c5b56ce 1674 reinit_frame_cache_sfunc,
7915a72c 1675 NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */
edefbb7c 1676 &setlist, &showlist);
c906108c 1677}
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