* gdb.asm/asm-source.exp: Make sure the final link succeeds on
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "frame.h"
d2427a71
RH
24#include "frame-unwind.h"
25#include "frame-base.h"
c906108c
SS
26#include "inferior.h"
27#include "symtab.h"
28#include "value.h"
29#include "gdbcmd.h"
30#include "gdbcore.h"
31#include "dis-asm.h"
32#include "symfile.h"
33#include "objfiles.h"
34#include "gdb_string.h"
c5f0f3d0 35#include "linespec.h"
4e052eda 36#include "regcache.h"
d16aafd8 37#include "doublest.h"
dc129d82 38#include "arch-utils.h"
4be87837 39#include "osabi.h"
fe898f56 40#include "block.h"
dc129d82
JT
41
42#include "elf-bfd.h"
43
44#include "alpha-tdep.h"
45
c906108c 46\f
fa88f677 47static const char *
636a6dfc
JT
48alpha_register_name (int regno)
49{
50 static char *register_names[] =
51 {
52 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
53 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
54 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
55 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
56 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
57 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
58 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
59 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
87d1b352 60 "pc", "vfp", "unique",
636a6dfc
JT
61 };
62
63 if (regno < 0)
64 return (NULL);
65 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
66 return (NULL);
67 return (register_names[regno]);
68}
d734c450 69
dc129d82 70static int
d734c450
JT
71alpha_cannot_fetch_register (int regno)
72{
d2427a71 73 return (regno == ALPHA_FP_REGNUM || regno == ALPHA_ZERO_REGNUM);
d734c450
JT
74}
75
dc129d82 76static int
d734c450
JT
77alpha_cannot_store_register (int regno)
78{
d2427a71 79 return (regno == ALPHA_FP_REGNUM || regno == ALPHA_ZERO_REGNUM);
d734c450
JT
80}
81
dc129d82 82static int
d734c450
JT
83alpha_register_convertible (int regno)
84{
85 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
86}
0d056799 87
dc129d82 88static struct type *
0d056799
JT
89alpha_register_virtual_type (int regno)
90{
91 return ((regno >= FP0_REGNUM && regno < (FP0_REGNUM+31))
92 ? builtin_type_double : builtin_type_long);
93}
f8453e34 94
dc129d82 95static int
f8453e34
JT
96alpha_register_byte (int regno)
97{
98 return (regno * 8);
99}
100
dc129d82 101static int
f8453e34
JT
102alpha_register_raw_size (int regno)
103{
104 return 8;
105}
106
dc129d82 107static int
f8453e34
JT
108alpha_register_virtual_size (int regno)
109{
110 return 8;
111}
636a6dfc 112
d2427a71
RH
113/* The alpha needs a conversion between register and memory format if the
114 register is a floating point register and memory format is float, as the
115 register format must be double or memory format is an integer with 4
116 bytes or less, as the representation of integers in floating point
117 registers is different. */
118
119static void
120alpha_register_convert_to_virtual (int regnum, struct type *valtype,
121 char *raw_buffer, char *virtual_buffer)
5868c862 122{
d2427a71
RH
123 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
124 {
125 memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (regnum));
126 return;
127 }
128
129 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
130 {
131 double d = deprecated_extract_floating (raw_buffer, REGISTER_RAW_SIZE (regnum));
132 deprecated_store_floating (virtual_buffer, TYPE_LENGTH (valtype), d);
133 }
134 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
135 {
136 ULONGEST l;
137 l = extract_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum));
138 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
139 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
140 }
141 else
142 error ("Cannot retrieve value from floating point register");
143}
5868c862 144
d2427a71
RH
145static void
146alpha_register_convert_to_raw (struct type *valtype, int regnum,
147 char *virtual_buffer, char *raw_buffer)
148{
149 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
150 {
151 memcpy (raw_buffer, virtual_buffer, REGISTER_RAW_SIZE (regnum));
152 return;
153 }
5868c862 154
d2427a71
RH
155 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
156 {
157 double d = deprecated_extract_floating (virtual_buffer, TYPE_LENGTH (valtype));
158 deprecated_store_floating (raw_buffer, REGISTER_RAW_SIZE (regnum), d);
159 }
160 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
161 {
162 ULONGEST l;
163 if (TYPE_UNSIGNED (valtype))
164 l = extract_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype));
165 else
166 l = extract_signed_integer (virtual_buffer, TYPE_LENGTH (valtype));
167 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
168 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), l);
169 }
170 else
171 error ("Cannot store value in floating point register");
5868c862
JT
172}
173
d2427a71
RH
174\f
175/* The alpha passes the first six arguments in the registers, the rest on
176 the stack. The register arguments are eventually transferred to the
177 argument transfer area immediately below the stack by the called function
178 anyway. So we `push' at least six arguments on the stack, `reload' the
179 argument registers and then adjust the stack pointer to point past the
180 sixth argument. This algorithm simplifies the passing of a large struct
181 which extends from the registers to the stack.
182 If the called function is returning a structure, the address of the
183 structure to be returned is passed as a hidden first argument. */
c906108c 184
d2427a71
RH
185static CORE_ADDR
186alpha_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
187 int struct_return, CORE_ADDR struct_addr)
c906108c 188{
d2427a71
RH
189 int i;
190 int accumulate_size = struct_return ? 8 : 0;
191 int arg_regs_size = ALPHA_NUM_ARG_REGS * 8;
192 struct alpha_arg
c906108c 193 {
d2427a71
RH
194 char *contents;
195 int len;
196 int offset;
197 };
198 struct alpha_arg *alpha_args =
199 (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
200 register struct alpha_arg *m_arg;
201 char raw_buffer[ALPHA_REGISTER_BYTES];
202 int required_arg_regs;
c906108c 203
d2427a71
RH
204 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
205 {
206 struct value *arg = args[i];
207 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
208 /* Cast argument to long if necessary as the compiler does it too. */
209 switch (TYPE_CODE (arg_type))
c906108c 210 {
d2427a71
RH
211 case TYPE_CODE_INT:
212 case TYPE_CODE_BOOL:
213 case TYPE_CODE_CHAR:
214 case TYPE_CODE_RANGE:
215 case TYPE_CODE_ENUM:
216 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
217 {
218 arg_type = builtin_type_long;
219 arg = value_cast (arg_type, arg);
220 }
221 break;
222 default:
223 break;
c906108c 224 }
d2427a71
RH
225 m_arg->len = TYPE_LENGTH (arg_type);
226 m_arg->offset = accumulate_size;
227 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
228 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
229 }
230
d2427a71
RH
231 /* Determine required argument register loads, loading an argument register
232 is expensive as it uses three ptrace calls. */
233 required_arg_regs = accumulate_size / 8;
234 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
235 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 236
d2427a71
RH
237 /* Make room for the arguments on the stack. */
238 if (accumulate_size < arg_regs_size)
239 accumulate_size = arg_regs_size;
240 sp -= accumulate_size;
c906108c 241
d2427a71
RH
242 /* Keep sp aligned to a multiple of 16 as the compiler does it too. */
243 sp &= ~15;
c906108c 244
d2427a71
RH
245 /* `Push' arguments on the stack. */
246 for (i = nargs; m_arg--, --i >= 0;)
247 write_memory (sp + m_arg->offset, m_arg->contents, m_arg->len);
248 if (struct_return)
c906108c 249 {
d2427a71
RH
250 store_unsigned_integer (raw_buffer, ALPHA_REGISTER_BYTES, struct_addr);
251 write_memory (sp, raw_buffer, ALPHA_REGISTER_BYTES);
c906108c
SS
252 }
253
d2427a71
RH
254 /* Load the argument registers. */
255 for (i = 0; i < required_arg_regs; i++)
256 {
257 LONGEST val;
c906108c 258
d2427a71
RH
259 val = read_memory_integer (sp + i * 8, ALPHA_REGISTER_BYTES);
260 write_register (ALPHA_A0_REGNUM + i, val);
261 write_register (ALPHA_FPA0_REGNUM + i, val);
262 }
c906108c 263
d2427a71 264 return sp + arg_regs_size;
c906108c
SS
265}
266
d2427a71
RH
267/* Given a return value in `regbuf' with a type `valtype',
268 extract and copy its value into `valbuf'. */
269
dc129d82 270static void
d2427a71
RH
271alpha_extract_return_value (struct type *valtype,
272 char regbuf[ALPHA_REGISTER_BYTES], char *valbuf)
140f9984 273{
d2427a71
RH
274 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
275 alpha_register_convert_to_virtual (FP0_REGNUM, valtype,
276 regbuf + REGISTER_BYTE (FP0_REGNUM),
277 valbuf);
278 else
279 memcpy (valbuf, regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
280 TYPE_LENGTH (valtype));
140f9984
JT
281}
282
d2427a71
RH
283/* Given a return value in `regbuf' with a type `valtype',
284 write its value into the appropriate register. */
0d056799 285
d2427a71
RH
286static void
287alpha_store_return_value (struct type *valtype, char *valbuf)
c906108c 288{
d2427a71
RH
289 char raw_buffer[ALPHA_MAX_REGISTER_RAW_SIZE];
290 int regnum = ALPHA_V0_REGNUM;
291 int length = TYPE_LENGTH (valtype);
292
293 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
c906108c 294 {
d2427a71
RH
295 regnum = FP0_REGNUM;
296 length = REGISTER_RAW_SIZE (regnum);
297 alpha_register_convert_to_raw (valtype, regnum, valbuf, raw_buffer);
c906108c 298 }
d2427a71
RH
299 else
300 memcpy (raw_buffer, valbuf, length);
301
302 deprecated_write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, length);
c906108c
SS
303}
304
d2427a71
RH
305static int
306alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 307{
d2427a71
RH
308 /* Structures are returned by ref in extra arg0. */
309 return 1;
310}
c906108c 311
d2427a71
RH
312static void
313alpha_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
314{
315 /* Store the address of the place in which to copy the structure the
316 subroutine will return. Handled by alpha_push_arguments. */
c906108c
SS
317}
318
dc129d82 319static CORE_ADDR
d2427a71 320alpha_extract_struct_value_address (char *regbuf)
c906108c 321{
d2427a71
RH
322 return (extract_address (regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
323 REGISTER_RAW_SIZE (ALPHA_V0_REGNUM)));
c906108c
SS
324}
325
d2427a71
RH
326\f
327static const unsigned char *
328alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 329{
d2427a71
RH
330 static const unsigned char alpha_breakpoint[] =
331 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 332
d2427a71
RH
333 *lenptr = sizeof(alpha_breakpoint);
334 return (alpha_breakpoint);
335}
c906108c 336
d2427a71
RH
337\f
338/* This returns the PC of the first insn after the prologue.
339 If we can't find the prologue, then return 0. */
c906108c 340
d2427a71
RH
341CORE_ADDR
342alpha_after_prologue (CORE_ADDR pc)
c906108c 343{
d2427a71
RH
344 struct symtab_and_line sal;
345 CORE_ADDR func_addr, func_end;
c906108c 346
d2427a71 347 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 348 return 0;
c906108c 349
d2427a71
RH
350 sal = find_pc_line (func_addr, 0);
351 if (sal.end < func_end)
352 return sal.end;
c5aa993b 353
d2427a71
RH
354 /* The line after the prologue is after the end of the function. In this
355 case, tell the caller to find the prologue the hard way. */
356 return 0;
c906108c
SS
357}
358
d2427a71
RH
359/* Read an instruction from memory at PC, looking through breakpoints. */
360
361unsigned int
362alpha_read_insn (CORE_ADDR pc)
c906108c 363{
d2427a71
RH
364 char buf[4];
365 int status;
c5aa993b 366
d2427a71
RH
367 status = read_memory_nobpt (pc, buf, 4);
368 if (status)
369 memory_error (status, pc);
370 return extract_unsigned_integer (buf, 4);
371}
c5aa993b 372
d2427a71
RH
373/* To skip prologues, I use this predicate. Returns either PC itself
374 if the code at PC does not look like a function prologue; otherwise
375 returns an address that (if we're lucky) follows the prologue. If
376 LENIENT, then we must skip everything which is involved in setting
377 up the frame (it's OK to skip more, just so long as we don't skip
378 anything which might clobber the registers which are being saved. */
c906108c 379
d2427a71
RH
380static CORE_ADDR
381alpha_skip_prologue (CORE_ADDR pc)
382{
383 unsigned long inst;
384 int offset;
385 CORE_ADDR post_prologue_pc;
386 char buf[4];
c906108c 387
d2427a71
RH
388 /* Silently return the unaltered pc upon memory errors.
389 This could happen on OSF/1 if decode_line_1 tries to skip the
390 prologue for quickstarted shared library functions when the
391 shared library is not yet mapped in.
392 Reading target memory is slow over serial lines, so we perform
393 this check only if the target has shared libraries (which all
394 Alpha targets do). */
395 if (target_read_memory (pc, buf, 4))
396 return pc;
c906108c 397
d2427a71
RH
398 /* See if we can determine the end of the prologue via the symbol table.
399 If so, then return either PC, or the PC after the prologue, whichever
400 is greater. */
c906108c 401
d2427a71
RH
402 post_prologue_pc = alpha_after_prologue (pc);
403 if (post_prologue_pc != 0)
404 return max (pc, post_prologue_pc);
c906108c 405
d2427a71
RH
406 /* Can't determine prologue from the symbol table, need to examine
407 instructions. */
dc1b0db2 408
d2427a71
RH
409 /* Skip the typical prologue instructions. These are the stack adjustment
410 instruction and the instructions that save registers on the stack
411 or in the gcc frame. */
412 for (offset = 0; offset < 100; offset += 4)
413 {
414 inst = alpha_read_insn (pc + offset);
c906108c 415
d2427a71
RH
416 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
417 continue;
418 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
419 continue;
420 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
421 continue;
422 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
423 continue;
c906108c 424
d2427a71
RH
425 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
426 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
427 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
428 continue;
c906108c 429
d2427a71
RH
430 if (inst == 0x47de040f) /* bis sp,sp,fp */
431 continue;
432 if (inst == 0x47fe040f) /* bis zero,sp,fp */
433 continue;
c906108c 434
d2427a71 435 break;
c906108c 436 }
d2427a71
RH
437 return pc + offset;
438}
c906108c 439
d2427a71
RH
440\f
441/* Construct an inferior call to FUN. For Alpha this is as simple as
442 initializing the RA and T12 registers; everything else is set up by
443 generic code. */
c906108c 444
d2427a71
RH
445static void
446alpha_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
447 struct value **args, struct type *type, int gcc_p)
448{
449 CORE_ADDR bp_address = CALL_DUMMY_ADDRESS ();
c906108c 450
d2427a71
RH
451 if (bp_address == 0)
452 error ("no place to put call");
453 write_register (ALPHA_RA_REGNUM, bp_address);
454 write_register (ALPHA_T12_REGNUM, fun);
c906108c
SS
455}
456
d2427a71
RH
457/* On the Alpha, the call dummy code is never copied to user space
458 (see alpha_fix_call_dummy() above). The contents of this do not
459 matter. */
460LONGEST alpha_call_dummy_words[] = { 0 };
461
462\f
463/* Figure out where the longjmp will land.
464 We expect the first arg to be a pointer to the jmp_buf structure from
465 which we extract the PC (JB_PC) that we will land at. The PC is copied
466 into the "pc". This routine returns true on success. */
c906108c
SS
467
468static int
d2427a71 469alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 470{
d2427a71
RH
471 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
472 CORE_ADDR jb_addr;
473 char raw_buffer[ALPHA_MAX_REGISTER_RAW_SIZE];
c906108c 474
d2427a71 475 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 476
d2427a71
RH
477 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
478 raw_buffer, tdep->jb_elt_size))
c906108c 479 return 0;
d2427a71
RH
480
481 *pc = extract_address (raw_buffer, tdep->jb_elt_size);
482 return 1;
c906108c
SS
483}
484
d2427a71
RH
485\f
486/* Frame unwinder for signal trampolines. We use alpha tdep bits that
487 describe the location and shape of the sigcontext structure. After
488 that, all registers are in memory, so it's easy. */
489/* ??? Shouldn't we be able to do this generically, rather than with
490 OSABI data specific to Alpha? */
491
492struct alpha_sigtramp_unwind_cache
c906108c 493{
d2427a71
RH
494 CORE_ADDR sigcontext_addr;
495};
c906108c 496
d2427a71
RH
497static struct alpha_sigtramp_unwind_cache *
498alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
499 void **this_prologue_cache)
500{
501 struct alpha_sigtramp_unwind_cache *info;
502 struct gdbarch_tdep *tdep;
c906108c 503
d2427a71
RH
504 if (*this_prologue_cache)
505 return *this_prologue_cache;
c906108c 506
d2427a71
RH
507 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
508 *this_prologue_cache = info;
c906108c 509
d2427a71
RH
510 tdep = gdbarch_tdep (current_gdbarch);
511 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 512
d2427a71 513 return info;
c906108c
SS
514}
515
d2427a71
RH
516/* Return the address of REGNO in a sigtramp frame. Since this is all
517 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 518
d2427a71
RH
519#ifndef SIGFRAME_PC_OFF
520#define SIGFRAME_PC_OFF (2 * 8)
521#define SIGFRAME_REGSAVE_OFF (4 * 8)
522#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
523#endif
c5aa993b 524
d2427a71
RH
525static CORE_ADDR
526alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
527{
528 if (regno < 32)
529 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
530 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
531 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
532 if (regno == PC_REGNUM)
533 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 534
d2427a71 535 return 0;
c906108c
SS
536}
537
d2427a71
RH
538/* Given a GDB frame, determine the address of the calling function's
539 frame. This will be used to create a new GDB frame struct. */
140f9984 540
dc129d82 541static void
d2427a71
RH
542alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
543 void **this_prologue_cache,
544 struct frame_id *this_id)
c906108c 545{
d2427a71
RH
546 struct alpha_sigtramp_unwind_cache *info
547 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
548 struct gdbarch_tdep *tdep;
549 CORE_ADDR stack_addr, code_addr;
550
551 /* If the OSABI couldn't locate the sigcontext, give up. */
552 if (info->sigcontext_addr == 0)
553 return;
554
555 /* If we have dynamic signal trampolines, find their start.
556 If we do not, then we must assume there is a symbol record
557 that can provide the start address. */
558 tdep = gdbarch_tdep (current_gdbarch);
559 if (tdep->dynamic_sigtramp_offset)
c906108c 560 {
d2427a71
RH
561 int offset;
562 code_addr = frame_pc_unwind (next_frame);
563 offset = tdep->dynamic_sigtramp_offset (code_addr);
564 if (offset >= 0)
565 code_addr -= offset;
c906108c 566 else
d2427a71 567 code_addr = 0;
c906108c 568 }
d2427a71
RH
569 else
570 code_addr = frame_func_unwind (next_frame);
c906108c 571
d2427a71
RH
572 /* The stack address is trivially read from the sigcontext. */
573 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
574 ALPHA_SP_REGNUM);
575 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 576
d2427a71 577 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
578}
579
d2427a71 580/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 581
d2427a71
RH
582static void
583alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
584 void **this_prologue_cache,
585 int regnum, int *optimizedp,
586 enum lval_type *lvalp, CORE_ADDR *addrp,
587 int *realnump, void *bufferp)
c906108c 588{
d2427a71
RH
589 struct alpha_sigtramp_unwind_cache *info
590 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
591 CORE_ADDR addr;
c906108c 592
d2427a71 593 if (info->sigcontext_addr != 0)
c906108c 594 {
d2427a71
RH
595 /* All integer and fp registers are stored in memory. */
596 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
597 if (addr != 0)
c906108c 598 {
d2427a71
RH
599 *optimizedp = 0;
600 *lvalp = lval_memory;
601 *addrp = addr;
602 *realnump = -1;
603 if (bufferp != NULL)
604 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
605 return;
c906108c 606 }
c906108c
SS
607 }
608
d2427a71
RH
609 /* This extra register may actually be in the sigcontext, but our
610 current description of it in alpha_sigtramp_frame_unwind_cache
611 doesn't include it. Too bad. Fall back on whatever's in the
612 outer frame. */
613 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
614 realnump, bufferp);
615}
c906108c 616
d2427a71
RH
617static const struct frame_unwind alpha_sigtramp_frame_unwind = {
618 SIGTRAMP_FRAME,
619 alpha_sigtramp_frame_this_id,
620 alpha_sigtramp_frame_prev_register
621};
c906108c 622
d2427a71
RH
623static const struct frame_unwind *
624alpha_sigtramp_frame_p (CORE_ADDR pc)
625{
626 char *name;
c906108c 627
d2427a71
RH
628 /* We shouldn't even bother to try if the OSABI didn't register
629 a sigcontext_addr handler. */
630 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
631 return NULL;
c906108c 632
d2427a71
RH
633 /* Otherwise we should be in a signal frame. */
634 find_pc_partial_function (pc, &name, NULL, NULL);
635 if (PC_IN_SIGTRAMP (pc, name))
636 return &alpha_sigtramp_frame_unwind;
c906108c 637
d2427a71 638 return NULL;
c906108c 639}
d2427a71
RH
640\f
641/* Fallback alpha frame unwinder. Uses instruction scanning and knows
642 something about the traditional layout of alpha stack frames. */
c906108c 643
d2427a71 644struct alpha_heuristic_unwind_cache
c906108c 645{
d2427a71
RH
646 CORE_ADDR *saved_regs;
647 CORE_ADDR vfp;
648 CORE_ADDR start_pc;
649 int return_reg;
650};
c906108c 651
d2427a71
RH
652/* Heuristic_proc_start may hunt through the text section for a long
653 time across a 2400 baud serial line. Allows the user to limit this
654 search. */
655static unsigned int heuristic_fence_post = 0;
c906108c 656
d2427a71
RH
657/* Attempt to locate the start of the function containing PC. We assume that
658 the previous function ends with an about_to_return insn. Not foolproof by
659 any means, since gcc is happy to put the epilogue in the middle of a
660 function. But we're guessing anyway... */
c906108c 661
d2427a71
RH
662static CORE_ADDR
663alpha_heuristic_proc_start (CORE_ADDR pc)
664{
665 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
666 CORE_ADDR last_non_nop = pc;
667 CORE_ADDR fence = pc - heuristic_fence_post;
668 CORE_ADDR orig_pc = pc;
9e0b60a8 669
d2427a71
RH
670 if (pc == 0)
671 return 0;
9e0b60a8 672
d2427a71
RH
673 if (heuristic_fence_post == UINT_MAX
674 || fence < tdep->vm_min_address)
675 fence = tdep->vm_min_address;
c906108c 676
d2427a71
RH
677 /* Search back for previous return; also stop at a 0, which might be
678 seen for instance before the start of a code section. Don't include
679 nops, since this usually indicates padding between functions. */
680 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 681 {
d2427a71
RH
682 unsigned int insn = alpha_read_insn (pc);
683 switch (insn)
c906108c 684 {
d2427a71
RH
685 case 0: /* invalid insn */
686 case 0x6bfa8001: /* ret $31,($26),1 */
687 return last_non_nop;
688
689 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
690 case 0x47ff041f: /* nop: bis $31,$31,$31 */
691 break;
692
693 default:
694 last_non_nop = pc;
695 break;
c906108c 696 }
d2427a71 697 }
c906108c 698
d2427a71
RH
699 /* It's not clear to me why we reach this point when stopping quietly,
700 but with this test, at least we don't print out warnings for every
701 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
702 if (stop_soon == NO_STOP_QUIETLY)
703 {
704 static int blurb_printed = 0;
c906108c 705
d2427a71
RH
706 if (fence == tdep->vm_min_address)
707 warning ("Hit beginning of text section without finding");
c906108c 708 else
d2427a71
RH
709 warning ("Hit heuristic-fence-post without finding");
710 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 711
d2427a71
RH
712 if (!blurb_printed)
713 {
714 printf_filtered ("\
715This warning occurs if you are debugging a function without any symbols\n\
716(for example, in a stripped executable). In that case, you may wish to\n\
717increase the size of the search with the `set heuristic-fence-post' command.\n\
718\n\
719Otherwise, you told GDB there was a function where there isn't one, or\n\
720(more likely) you have encountered a bug in GDB.\n");
721 blurb_printed = 1;
722 }
723 }
c906108c 724
d2427a71
RH
725 return 0;
726}
c906108c 727
d2427a71
RH
728struct alpha_heuristic_unwind_cache *
729alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
730 void **this_prologue_cache,
731 CORE_ADDR start_pc)
732{
733 struct alpha_heuristic_unwind_cache *info;
734 ULONGEST val;
735 CORE_ADDR limit_pc, cur_pc;
736 int frame_reg, frame_size, return_reg, reg;
c906108c 737
d2427a71
RH
738 if (*this_prologue_cache)
739 return *this_prologue_cache;
c906108c 740
d2427a71
RH
741 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
742 *this_prologue_cache = info;
743 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 744
d2427a71
RH
745 limit_pc = frame_pc_unwind (next_frame);
746 if (start_pc == 0)
747 start_pc = alpha_heuristic_proc_start (limit_pc);
748 info->start_pc = start_pc;
c906108c 749
d2427a71
RH
750 frame_reg = ALPHA_SP_REGNUM;
751 frame_size = 0;
752 return_reg = -1;
c906108c 753
d2427a71
RH
754 /* If we've identified a likely place to start, do code scanning. */
755 if (start_pc != 0)
c5aa993b 756 {
d2427a71
RH
757 /* Limit the forward search to 50 instructions. */
758 if (start_pc + 200 < limit_pc)
759 limit_pc = start_pc + 200;
c5aa993b 760
d2427a71
RH
761 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
762 {
763 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 764
d2427a71
RH
765 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
766 {
767 if (word & 0x8000)
768 {
769 /* Consider only the first stack allocation instruction
770 to contain the static size of the frame. */
771 if (frame_size == 0)
772 frame_size = (-word) & 0xffff;
773 }
774 else
775 {
776 /* Exit loop if a positive stack adjustment is found, which
777 usually means that the stack cleanup code in the function
778 epilogue is reached. */
779 break;
780 }
781 }
782 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
783 {
784 reg = (word & 0x03e00000) >> 21;
785
786 if (reg == 31)
787 continue;
788
789 /* Do not compute the address where the register was saved yet,
790 because we don't know yet if the offset will need to be
791 relative to $sp or $fp (we can not compute the address
792 relative to $sp if $sp is updated during the execution of
793 the current subroutine, for instance when doing some alloca).
794 So just store the offset for the moment, and compute the
795 address later when we know whether this frame has a frame
796 pointer or not. */
797 /* Hack: temporarily add one, so that the offset is non-zero
798 and we can tell which registers have save offsets below. */
799 info->saved_regs[reg] = (word & 0xffff) + 1;
800
801 /* Starting with OSF/1-3.2C, the system libraries are shipped
802 without local symbols, but they still contain procedure
803 descriptors without a symbol reference. GDB is currently
804 unable to find these procedure descriptors and uses
805 heuristic_proc_desc instead.
806 As some low level compiler support routines (__div*, __add*)
807 use a non-standard return address register, we have to
808 add some heuristics to determine the return address register,
809 or stepping over these routines will fail.
810 Usually the return address register is the first register
811 saved on the stack, but assembler optimization might
812 rearrange the register saves.
813 So we recognize only a few registers (t7, t9, ra) within
814 the procedure prologue as valid return address registers.
815 If we encounter a return instruction, we extract the
816 the return address register from it.
817
818 FIXME: Rewriting GDB to access the procedure descriptors,
819 e.g. via the minimal symbol table, might obviate this hack. */
820 if (return_reg == -1
821 && cur_pc < (start_pc + 80)
822 && (reg == ALPHA_T7_REGNUM
823 || reg == ALPHA_T9_REGNUM
824 || reg == ALPHA_RA_REGNUM))
825 return_reg = reg;
826 }
827 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
828 return_reg = (word >> 16) & 0x1f;
829 else if (word == 0x47de040f) /* bis sp,sp,fp */
830 frame_reg = ALPHA_GCC_FP_REGNUM;
831 else if (word == 0x47fe040f) /* bis zero,sp,fp */
832 frame_reg = ALPHA_GCC_FP_REGNUM;
833 }
c5aa993b 834
d2427a71
RH
835 /* If we haven't found a valid return address register yet, keep
836 searching in the procedure prologue. */
837 if (return_reg == -1)
838 {
839 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
840 {
841 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 842
d2427a71
RH
843 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
844 {
845 reg = (word & 0x03e00000) >> 21;
846 if (reg == ALPHA_T7_REGNUM
847 || reg == ALPHA_T9_REGNUM
848 || reg == ALPHA_RA_REGNUM)
849 {
850 return_reg = reg;
851 break;
852 }
853 }
854 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
855 {
856 return_reg = (word >> 16) & 0x1f;
857 break;
858 }
859 }
860 }
c906108c 861 }
c906108c 862
d2427a71
RH
863 /* Failing that, do default to the customary RA. */
864 if (return_reg == -1)
865 return_reg = ALPHA_RA_REGNUM;
866 info->return_reg = return_reg;
f8453e34 867
d2427a71
RH
868 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
869 info->vfp = val + frame_size;
c906108c 870
d2427a71
RH
871 /* Convert offsets to absolute addresses. See above about adding
872 one to the offsets to make all detected offsets non-zero. */
873 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
874 if (info->saved_regs[reg])
875 info->saved_regs[reg] += val - 1;
876
877 return info;
c906108c 878}
c906108c 879
d2427a71
RH
880/* Given a GDB frame, determine the address of the calling function's
881 frame. This will be used to create a new GDB frame struct. */
882
883void
884alpha_heuristic_frame_this_id (struct frame_info *next_frame,
885 void **this_prologue_cache,
886 struct frame_id *this_id)
c906108c 887{
d2427a71
RH
888 struct alpha_heuristic_unwind_cache *info
889 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 890
d2427a71 891 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
892}
893
d2427a71
RH
894/* Retrieve the value of REGNUM in FRAME. Don't give up! */
895
896void
897alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
898 void **this_prologue_cache,
899 int regnum, int *optimizedp,
900 enum lval_type *lvalp, CORE_ADDR *addrp,
901 int *realnump, void *bufferp)
c906108c 902{
d2427a71
RH
903 struct alpha_heuristic_unwind_cache *info
904 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
905
906 /* The PC of the previous frame is stored in the link register of
907 the current frame. Frob regnum so that we pull the value from
908 the correct place. */
909 if (regnum == ALPHA_PC_REGNUM)
910 regnum = info->return_reg;
911
912 /* For all registers known to be saved in the current frame,
913 do the obvious and pull the value out. */
914 if (info->saved_regs[regnum])
c906108c 915 {
d2427a71
RH
916 *optimizedp = 0;
917 *lvalp = lval_memory;
918 *addrp = info->saved_regs[regnum];
919 *realnump = -1;
920 if (bufferp != NULL)
921 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
922 return;
923 }
924
d2427a71
RH
925 /* The stack pointer of the previous frame is computed by popping
926 the current stack frame. */
927 if (regnum == ALPHA_SP_REGNUM)
c906108c 928 {
d2427a71
RH
929 *optimizedp = 0;
930 *lvalp = not_lval;
931 *addrp = 0;
932 *realnump = -1;
933 if (bufferp != NULL)
934 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
935 return;
c906108c 936 }
95b80706 937
d2427a71
RH
938 /* Otherwise assume the next frame has the same register value. */
939 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
940 realnump, bufferp);
95b80706
JT
941}
942
d2427a71
RH
943static const struct frame_unwind alpha_heuristic_frame_unwind = {
944 NORMAL_FRAME,
945 alpha_heuristic_frame_this_id,
946 alpha_heuristic_frame_prev_register
947};
c906108c 948
d2427a71
RH
949static const struct frame_unwind *
950alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 951{
d2427a71 952 return &alpha_heuristic_frame_unwind;
c906108c
SS
953}
954
d2427a71
RH
955CORE_ADDR
956alpha_heuristic_frame_base_address (struct frame_info *next_frame,
957 void **this_prologue_cache)
c906108c 958{
d2427a71
RH
959 struct alpha_heuristic_unwind_cache *info
960 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 961
d2427a71 962 return info->vfp;
c906108c
SS
963}
964
d2427a71
RH
965static const struct frame_base alpha_heuristic_frame_base = {
966 &alpha_heuristic_frame_unwind,
967 alpha_heuristic_frame_base_address,
968 alpha_heuristic_frame_base_address,
969 alpha_heuristic_frame_base_address
970};
971
c906108c 972/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 973 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
974
975static void
fba45db2 976reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
977{
978 reinit_frame_cache ();
979}
980
d2427a71
RH
981\f
982/* ALPHA stack frames are almost impenetrable. When execution stops,
983 we basically have to look at symbol information for the function
984 that we stopped in, which tells us *which* register (if any) is
985 the base of the frame pointer, and what offset from that register
986 the frame itself is at.
c906108c 987
d2427a71
RH
988 This presents a problem when trying to examine a stack in memory
989 (that isn't executing at the moment), using the "frame" command. We
990 don't have a PC, nor do we have any registers except SP.
c906108c 991
d2427a71
RH
992 This routine takes two arguments, SP and PC, and tries to make the
993 cached frames look as if these two arguments defined a frame on the
994 cache. This allows the rest of info frame to extract the important
995 arguments without difficulty. */
ec32e4be 996
d2427a71
RH
997struct frame_info *
998alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 999{
d2427a71
RH
1000 if (argc != 2)
1001 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1002
d2427a71 1003 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1004}
1005
d2427a71
RH
1006/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1007 dummy frame. The frame ID's base needs to match the TOS value
1008 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1009 breakpoint. */
d734c450 1010
d2427a71
RH
1011static struct frame_id
1012alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1013{
d2427a71
RH
1014 ULONGEST base;
1015 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1016 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1017}
1018
dc129d82 1019static CORE_ADDR
d2427a71 1020alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1021{
d2427a71
RH
1022 ULONGEST pc;
1023 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1024 return pc;
accc6d1f
JT
1025}
1026
d2427a71 1027\f
ec32e4be
JT
1028/* alpha_software_single_step() is called just before we want to resume
1029 the inferior, if we want to single-step it but there is no hardware
1030 or kernel single-step support (NetBSD on Alpha, for example). We find
1031 the target of the coming instruction and breakpoint it.
1032
1033 single_step is also called just after the inferior stops. If we had
1034 set up a simulated single-step, we undo our damage. */
1035
1036static CORE_ADDR
1037alpha_next_pc (CORE_ADDR pc)
1038{
1039 unsigned int insn;
1040 unsigned int op;
1041 int offset;
1042 LONGEST rav;
1043
1044 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1045
1046 /* Opcode is top 6 bits. */
1047 op = (insn >> 26) & 0x3f;
1048
1049 if (op == 0x1a)
1050 {
1051 /* Jump format: target PC is:
1052 RB & ~3 */
1053 return (read_register ((insn >> 16) & 0x1f) & ~3);
1054 }
1055
1056 if ((op & 0x30) == 0x30)
1057 {
1058 /* Branch format: target PC is:
1059 (new PC) + (4 * sext(displacement)) */
1060 if (op == 0x30 || /* BR */
1061 op == 0x34) /* BSR */
1062 {
1063 branch_taken:
1064 offset = (insn & 0x001fffff);
1065 if (offset & 0x00100000)
1066 offset |= 0xffe00000;
1067 offset *= 4;
1068 return (pc + 4 + offset);
1069 }
1070
1071 /* Need to determine if branch is taken; read RA. */
1072 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1073 switch (op)
1074 {
1075 case 0x38: /* BLBC */
1076 if ((rav & 1) == 0)
1077 goto branch_taken;
1078 break;
1079 case 0x3c: /* BLBS */
1080 if (rav & 1)
1081 goto branch_taken;
1082 break;
1083 case 0x39: /* BEQ */
1084 if (rav == 0)
1085 goto branch_taken;
1086 break;
1087 case 0x3d: /* BNE */
1088 if (rav != 0)
1089 goto branch_taken;
1090 break;
1091 case 0x3a: /* BLT */
1092 if (rav < 0)
1093 goto branch_taken;
1094 break;
1095 case 0x3b: /* BLE */
1096 if (rav <= 0)
1097 goto branch_taken;
1098 break;
1099 case 0x3f: /* BGT */
1100 if (rav > 0)
1101 goto branch_taken;
1102 break;
1103 case 0x3e: /* BGE */
1104 if (rav >= 0)
1105 goto branch_taken;
1106 break;
d2427a71
RH
1107
1108 /* ??? Missing floating-point branches. */
ec32e4be
JT
1109 }
1110 }
1111
1112 /* Not a branch or branch not taken; target PC is:
1113 pc + 4 */
1114 return (pc + 4);
1115}
1116
1117void
1118alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1119{
1120 static CORE_ADDR next_pc;
1121 typedef char binsn_quantum[BREAKPOINT_MAX];
1122 static binsn_quantum break_mem;
1123 CORE_ADDR pc;
1124
1125 if (insert_breakpoints_p)
1126 {
1127 pc = read_pc ();
1128 next_pc = alpha_next_pc (pc);
1129
1130 target_insert_breakpoint (next_pc, break_mem);
1131 }
1132 else
1133 {
1134 target_remove_breakpoint (next_pc, break_mem);
1135 write_pc (next_pc);
1136 }
c906108c
SS
1137}
1138
dc129d82 1139\f
dc129d82
JT
1140/* Initialize the current architecture based on INFO. If possible, re-use an
1141 architecture from ARCHES, which is a list of architectures already created
1142 during this debugging session.
1143
1144 Called e.g. at program startup, when reading a core file, and when reading
1145 a binary file. */
1146
1147static struct gdbarch *
1148alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1149{
1150 struct gdbarch_tdep *tdep;
1151 struct gdbarch *gdbarch;
dc129d82
JT
1152
1153 /* Try to determine the ABI of the object we are loading. */
4be87837 1154 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1155 {
4be87837
DJ
1156 /* If it's an ECOFF file, assume it's OSF/1. */
1157 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1158 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1159 }
1160
1161 /* Find a candidate among extant architectures. */
4be87837
DJ
1162 arches = gdbarch_list_lookup_by_info (arches, &info);
1163 if (arches != NULL)
1164 return arches->gdbarch;
dc129d82
JT
1165
1166 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1167 gdbarch = gdbarch_alloc (&info, tdep);
1168
d2427a71
RH
1169 /* Lowest text address. This is used by heuristic_proc_start()
1170 to decide when to stop looking. */
d9b023cc
JT
1171 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1172
36a6271d 1173 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1174 tdep->sigcontext_addr = NULL;
36a6271d 1175
accc6d1f
JT
1176 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1177
dc129d82
JT
1178 /* Type sizes */
1179 set_gdbarch_short_bit (gdbarch, 16);
1180 set_gdbarch_int_bit (gdbarch, 32);
1181 set_gdbarch_long_bit (gdbarch, 64);
1182 set_gdbarch_long_long_bit (gdbarch, 64);
1183 set_gdbarch_float_bit (gdbarch, 32);
1184 set_gdbarch_double_bit (gdbarch, 64);
1185 set_gdbarch_long_double_bit (gdbarch, 64);
1186 set_gdbarch_ptr_bit (gdbarch, 64);
1187
1188 /* Register info */
1189 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1190 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
0ba6dca9 1191 set_gdbarch_deprecated_fp_regnum (gdbarch, ALPHA_FP_REGNUM);
dc129d82
JT
1192 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1193 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1194
1195 set_gdbarch_register_name (gdbarch, alpha_register_name);
b1e29e33 1196 set_gdbarch_deprecated_register_size (gdbarch, ALPHA_REGISTER_SIZE);
b8b527c5 1197 set_gdbarch_deprecated_register_bytes (gdbarch, ALPHA_REGISTER_BYTES);
dc129d82
JT
1198 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1199 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
a0ed5532 1200 set_gdbarch_deprecated_max_register_raw_size (gdbarch, ALPHA_MAX_REGISTER_RAW_SIZE);
dc129d82 1201 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
a0ed5532 1202 set_gdbarch_deprecated_max_register_virtual_size (gdbarch,
dc129d82
JT
1203 ALPHA_MAX_REGISTER_VIRTUAL_SIZE);
1204 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1205
1206 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1207 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1208
1209 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1210 set_gdbarch_register_convert_to_virtual (gdbarch,
1211 alpha_register_convert_to_virtual);
1212 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1213
d2427a71 1214 /* Prologue heuristics. */
dc129d82
JT
1215 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1216
d2427a71 1217 /* Call info. */
dc129d82
JT
1218 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1219 set_gdbarch_frameless_function_invocation (gdbarch,
1220 generic_frameless_function_invocation_not);
1221
dc129d82 1222 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
26e9b323 1223 set_gdbarch_deprecated_extract_return_value (gdbarch, alpha_extract_return_value);
4183d812 1224 set_gdbarch_deprecated_store_struct_return (gdbarch, alpha_store_struct_return);
ebba8386 1225 set_gdbarch_deprecated_store_return_value (gdbarch, alpha_store_return_value);
26e9b323 1226 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
dc129d82
JT
1227 alpha_extract_struct_value_address);
1228
1229 /* Settings for calling functions in the inferior. */
b81774d8 1230 set_gdbarch_deprecated_push_arguments (gdbarch, alpha_push_arguments);
b1e29e33
AC
1231 set_gdbarch_deprecated_call_dummy_words (gdbarch, alpha_call_dummy_words);
1232 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0);
ae45cd16 1233 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
b1e29e33 1234 set_gdbarch_deprecated_fix_call_dummy (gdbarch, alpha_fix_call_dummy);
d2427a71
RH
1235
1236 /* Methods for saving / extracting a dummy frame's ID. */
1237 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1238 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1239
1240 /* Return the unwound PC value. */
1241 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1242
1243 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1244 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1245
95b80706 1246 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1247 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1248
1249 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1250 set_gdbarch_frame_args_skip (gdbarch, 0);
1251
44dffaac 1252 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1253 gdbarch_init_osabi (info, gdbarch);
44dffaac 1254
accc6d1f
JT
1255 /* Now that we have tuned the configuration, set a few final things
1256 based on what the OS ABI has told us. */
1257
1258 if (tdep->jb_pc >= 0)
1259 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1260
d2427a71
RH
1261 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1262 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1263
d2427a71 1264 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1265
d2427a71 1266 return gdbarch;
dc129d82
JT
1267}
1268
c906108c 1269void
fba45db2 1270_initialize_alpha_tdep (void)
c906108c
SS
1271{
1272 struct cmd_list_element *c;
1273
d2427a71 1274 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
d7a27068 1275 deprecated_tm_print_insn = print_insn_alpha;
c906108c
SS
1276
1277 /* Let the user set the fence post for heuristic_proc_start. */
1278
1279 /* We really would like to have both "0" and "unlimited" work, but
1280 command.c doesn't deal with that. So make it a var_zinteger
1281 because the user can always use "999999" or some such for unlimited. */
1282 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1283 (char *) &heuristic_fence_post,
1284 "\
1285Set the distance searched for the start of a function.\n\
1286If you are debugging a stripped executable, GDB needs to search through the\n\
1287program for the start of a function. This command sets the distance of the\n\
1288search. The only need to set it is when debugging a stripped executable.",
1289 &setlist);
1290 /* We need to throw away the frame cache when we set this, since it
1291 might change our ability to get backtraces. */
9f60d481 1292 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1293 add_show_from_set (c, &showlist);
1294}
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