* alpha-tdep.c (alpha_extract_return_value): Handle IEEE Quad floats.
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
dc129d82
JT
42
43#include "elf-bfd.h"
44
45#include "alpha-tdep.h"
46
c906108c 47\f
fa88f677 48static const char *
636a6dfc
JT
49alpha_register_name (int regno)
50{
5ab84872 51 static const char * const register_names[] =
636a6dfc
JT
52 {
53 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
54 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
55 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
56 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
57 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
58 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
59 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
60 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 61 "pc", "", "unique"
636a6dfc
JT
62 };
63
64 if (regno < 0)
5ab84872 65 return NULL;
636a6dfc 66 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
67 return NULL;
68 return register_names[regno];
636a6dfc 69}
d734c450 70
dc129d82 71static int
d734c450
JT
72alpha_cannot_fetch_register (int regno)
73{
44d88583 74 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
75}
76
dc129d82 77static int
d734c450
JT
78alpha_cannot_store_register (int regno)
79{
44d88583 80 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
81}
82
dc129d82 83static int
d734c450
JT
84alpha_register_convertible (int regno)
85{
86 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
87}
0d056799 88
dc129d82 89static struct type *
0d056799
JT
90alpha_register_virtual_type (int regno)
91{
72667056
RH
92 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
93 return builtin_type_void_data_ptr;
94 if (regno == ALPHA_PC_REGNUM)
95 return builtin_type_void_func_ptr;
96
97 /* Don't need to worry about little vs big endian until
98 some jerk tries to port to alpha-unicosmk. */
99 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 31)
100 return builtin_type_ieee_double_little;
101
102 return builtin_type_int64;
0d056799 103}
f8453e34 104
615967cb
RH
105/* Is REGNUM a member of REGGROUP? */
106
107static int
108alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
109 struct reggroup *group)
110{
111 /* Filter out any registers eliminated, but whose regnum is
112 reserved for backward compatibility, e.g. the vfp. */
113 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
114 return 0;
115
116 /* Since we implement no pseudo registers, save/restore is equal to all. */
117 if (group == all_reggroup
118 || group == save_reggroup
119 || group == restore_reggroup)
120 return 1;
121
122 /* All other groups are non-overlapping. */
123
124 /* Since this is really a PALcode memory slot... */
125 if (regnum == ALPHA_UNIQUE_REGNUM)
126 return group == system_reggroup;
127
128 /* Force the FPCR to be considered part of the floating point state. */
129 if (regnum == ALPHA_FPCR_REGNUM)
130 return group == float_reggroup;
131
132 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
133 return group == float_reggroup;
134 else
135 return group == general_reggroup;
136}
137
dc129d82 138static int
f8453e34
JT
139alpha_register_byte (int regno)
140{
141 return (regno * 8);
142}
143
dc129d82 144static int
f8453e34
JT
145alpha_register_raw_size (int regno)
146{
147 return 8;
148}
149
dc129d82 150static int
f8453e34
JT
151alpha_register_virtual_size (int regno)
152{
153 return 8;
154}
636a6dfc 155
d2427a71
RH
156/* The alpha needs a conversion between register and memory format if the
157 register is a floating point register and memory format is float, as the
158 register format must be double or memory format is an integer with 4
159 bytes or less, as the representation of integers in floating point
160 registers is different. */
161
14696584
RH
162static void
163alpha_convert_flt_dbl (void *out, const void *in)
164{
165 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_single_little);
166 store_typed_floating (out, builtin_type_ieee_double_little, d);
167}
168
169static void
170alpha_convert_dbl_flt (void *out, const void *in)
171{
172 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_double_little);
173 store_typed_floating (out, builtin_type_ieee_single_little, d);
174}
175
d2427a71
RH
176static void
177alpha_register_convert_to_virtual (int regnum, struct type *valtype,
178 char *raw_buffer, char *virtual_buffer)
5868c862 179{
14696584 180 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 181 {
14696584 182 memcpy (virtual_buffer, raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
183 return;
184 }
185
14696584
RH
186 /* Note that everything below is less than 8 bytes long. */
187
d2427a71 188 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
189 alpha_convert_dbl_flt (virtual_buffer, raw_buffer);
190 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71
RH
191 {
192 ULONGEST l;
14696584 193 l = extract_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
194 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
195 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
196 }
197 else
198 error ("Cannot retrieve value from floating point register");
199}
5868c862 200
d2427a71
RH
201static void
202alpha_register_convert_to_raw (struct type *valtype, int regnum,
203 char *virtual_buffer, char *raw_buffer)
204{
14696584 205 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 206 {
14696584 207 memcpy (raw_buffer, virtual_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
208 return;
209 }
5868c862 210
14696584
RH
211 /* Note that everything below is less than 8 bytes long. */
212
d2427a71 213 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
214 alpha_convert_flt_dbl (raw_buffer, virtual_buffer);
215 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71 216 {
14696584 217 ULONGEST l = unpack_long (valtype, virtual_buffer);
d2427a71 218 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
14696584 219 store_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE, l);
d2427a71
RH
220 }
221 else
222 error ("Cannot store value in floating point register");
5868c862
JT
223}
224
d2427a71
RH
225\f
226/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
227 the stack. The register arguments are stored in ARG_REG_BUFFER, and
228 then moved into the register file; this simplifies the passing of a
229 large struct which extends from the registers to the stack, plus avoids
230 three ptrace invocations per word.
231
232 We don't bother tracking which register values should go in integer
233 regs or fp regs; we load the same values into both.
234
d2427a71
RH
235 If the called function is returning a structure, the address of the
236 structure to be returned is passed as a hidden first argument. */
c906108c 237
d2427a71 238static CORE_ADDR
c88e30c0
RH
239alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
240 struct regcache *regcache, CORE_ADDR bp_addr,
241 int nargs, struct value **args, CORE_ADDR sp,
242 int struct_return, CORE_ADDR struct_addr)
c906108c 243{
d2427a71
RH
244 int i;
245 int accumulate_size = struct_return ? 8 : 0;
d2427a71 246 struct alpha_arg
c906108c 247 {
d2427a71
RH
248 char *contents;
249 int len;
250 int offset;
251 };
c88e30c0
RH
252 struct alpha_arg *alpha_args
253 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
d2427a71 254 register struct alpha_arg *m_arg;
c88e30c0 255 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 256 int required_arg_regs;
c906108c 257
c88e30c0
RH
258 /* The ABI places the address of the called function in T12. */
259 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
260
261 /* Set the return address register to point to the entry point
262 of the program, where a breakpoint lies in wait. */
263 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
264
265 /* Lay out the arguments in memory. */
d2427a71
RH
266 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
267 {
268 struct value *arg = args[i];
269 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 270
d2427a71
RH
271 /* Cast argument to long if necessary as the compiler does it too. */
272 switch (TYPE_CODE (arg_type))
c906108c 273 {
d2427a71
RH
274 case TYPE_CODE_INT:
275 case TYPE_CODE_BOOL:
276 case TYPE_CODE_CHAR:
277 case TYPE_CODE_RANGE:
278 case TYPE_CODE_ENUM:
279 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
280 {
281 arg_type = builtin_type_long;
282 arg = value_cast (arg_type, arg);
283 }
284 break;
c88e30c0
RH
285 case TYPE_CODE_FLT:
286 /* "float" arguments loaded in registers must be passed in
287 register format, aka "double". */
288 if (accumulate_size < sizeof (arg_reg_buffer)
289 && TYPE_LENGTH (arg_type) == 4)
290 {
291 arg_type = builtin_type_double;
292 arg = value_cast (arg_type, arg);
293 }
294 /* Tru64 5.1 has a 128-bit long double, and passes this by
295 invisible reference. No one else uses this data type. */
296 else if (TYPE_LENGTH (arg_type) == 16)
297 {
298 /* Allocate aligned storage. */
299 sp = (sp & -16) - 16;
300
301 /* Write the real data into the stack. */
302 write_memory (sp, VALUE_CONTENTS (arg), 16);
303
304 /* Construct the indirection. */
305 arg_type = lookup_pointer_type (arg_type);
306 arg = value_from_pointer (arg_type, sp);
307 }
308 break;
d2427a71
RH
309 default:
310 break;
c906108c 311 }
d2427a71
RH
312 m_arg->len = TYPE_LENGTH (arg_type);
313 m_arg->offset = accumulate_size;
314 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
315 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
316 }
317
d2427a71
RH
318 /* Determine required argument register loads, loading an argument register
319 is expensive as it uses three ptrace calls. */
320 required_arg_regs = accumulate_size / 8;
321 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
322 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 323
d2427a71 324 /* Make room for the arguments on the stack. */
c88e30c0
RH
325 if (accumulate_size < sizeof(arg_reg_buffer))
326 accumulate_size = 0;
327 else
328 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 329 sp -= accumulate_size;
c906108c 330
c88e30c0 331 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 332 sp &= ~15;
c906108c 333
d2427a71
RH
334 /* `Push' arguments on the stack. */
335 for (i = nargs; m_arg--, --i >= 0;)
c906108c 336 {
c88e30c0
RH
337 char *contents = m_arg->contents;
338 int offset = m_arg->offset;
339 int len = m_arg->len;
340
341 /* Copy the bytes destined for registers into arg_reg_buffer. */
342 if (offset < sizeof(arg_reg_buffer))
343 {
344 if (offset + len <= sizeof(arg_reg_buffer))
345 {
346 memcpy (arg_reg_buffer + offset, contents, len);
347 continue;
348 }
349 else
350 {
351 int tlen = sizeof(arg_reg_buffer) - offset;
352 memcpy (arg_reg_buffer + offset, contents, tlen);
353 offset += tlen;
354 contents += tlen;
355 len -= tlen;
356 }
357 }
358
359 /* Everything else goes to the stack. */
360 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 361 }
c88e30c0
RH
362 if (struct_return)
363 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 364
d2427a71
RH
365 /* Load the argument registers. */
366 for (i = 0; i < required_arg_regs; i++)
367 {
09cc52fd
RH
368 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
369 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
370 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
371 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 372 }
c906108c 373
09cc52fd
RH
374 /* Finally, update the stack pointer. */
375 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
376
c88e30c0 377 return sp;
c906108c
SS
378}
379
5ec2bb99
RH
380/* Extract from REGCACHE the value about to be returned from a function
381 and copy it into VALBUF. */
d2427a71 382
dc129d82 383static void
5ec2bb99
RH
384alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
385 void *valbuf)
140f9984 386{
5ec2bb99
RH
387 char raw_buffer[ALPHA_REGISTER_SIZE];
388 ULONGEST l;
389
390 switch (TYPE_CODE (valtype))
391 {
392 case TYPE_CODE_FLT:
393 switch (TYPE_LENGTH (valtype))
394 {
395 case 4:
396 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
397 alpha_convert_dbl_flt (valbuf, raw_buffer);
398 break;
399
400 case 8:
401 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
402 break;
403
24064b5c
RH
404 case 16:
405 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
406 read_memory (l, valbuf, 16);
407 break;
408
5ec2bb99
RH
409 default:
410 abort ();
411 }
412 break;
413
414 default:
415 /* Assume everything else degenerates to an integer. */
416 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
417 store_unsigned_integer (valbuf, TYPE_LENGTH (valtype), l);
418 break;
419 }
140f9984
JT
420}
421
5ec2bb99
RH
422/* Extract from REGCACHE the address of a structure about to be returned
423 from a function. */
424
425static CORE_ADDR
426alpha_extract_struct_value_address (struct regcache *regcache)
427{
428 ULONGEST addr;
429 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
430 return addr;
431}
432
433/* Insert the given value into REGCACHE as if it was being
434 returned by a function. */
0d056799 435
d2427a71 436static void
5ec2bb99
RH
437alpha_store_return_value (struct type *valtype, struct regcache *regcache,
438 const void *valbuf)
c906108c 439{
d2427a71 440 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
441 char raw_buffer[ALPHA_REGISTER_SIZE];
442 ULONGEST l;
d2427a71 443
5ec2bb99 444 switch (TYPE_CODE (valtype))
c906108c 445 {
5ec2bb99
RH
446 case TYPE_CODE_FLT:
447 switch (length)
448 {
449 case 4:
450 alpha_convert_flt_dbl (raw_buffer, valbuf);
451 valbuf = raw_buffer;
452 /* FALLTHRU */
453
454 case 8:
455 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
456 break;
457
24064b5c
RH
458 case 16:
459 /* FIXME: 128-bit long doubles are returned like structures:
460 by writing into indirect storage provided by the caller
461 as the first argument. */
462 error ("Cannot set a 128-bit long double return value.");
463
5ec2bb99
RH
464 default:
465 abort ();
466 }
467 break;
d2427a71 468
5ec2bb99
RH
469 default:
470 /* Assume everything else degenerates to an integer. */
471 l = unpack_long (valtype, valbuf);
472 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
473 break;
474 }
c906108c
SS
475}
476
d2427a71
RH
477static int
478alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 479{
d2427a71
RH
480 /* Structures are returned by ref in extra arg0. */
481 return 1;
482}
c906108c 483
d2427a71
RH
484\f
485static const unsigned char *
486alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 487{
d2427a71
RH
488 static const unsigned char alpha_breakpoint[] =
489 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 490
d2427a71
RH
491 *lenptr = sizeof(alpha_breakpoint);
492 return (alpha_breakpoint);
493}
c906108c 494
d2427a71
RH
495\f
496/* This returns the PC of the first insn after the prologue.
497 If we can't find the prologue, then return 0. */
c906108c 498
d2427a71
RH
499CORE_ADDR
500alpha_after_prologue (CORE_ADDR pc)
c906108c 501{
d2427a71
RH
502 struct symtab_and_line sal;
503 CORE_ADDR func_addr, func_end;
c906108c 504
d2427a71 505 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 506 return 0;
c906108c 507
d2427a71
RH
508 sal = find_pc_line (func_addr, 0);
509 if (sal.end < func_end)
510 return sal.end;
c5aa993b 511
d2427a71
RH
512 /* The line after the prologue is after the end of the function. In this
513 case, tell the caller to find the prologue the hard way. */
514 return 0;
c906108c
SS
515}
516
d2427a71
RH
517/* Read an instruction from memory at PC, looking through breakpoints. */
518
519unsigned int
520alpha_read_insn (CORE_ADDR pc)
c906108c 521{
d2427a71
RH
522 char buf[4];
523 int status;
c5aa993b 524
d2427a71
RH
525 status = read_memory_nobpt (pc, buf, 4);
526 if (status)
527 memory_error (status, pc);
528 return extract_unsigned_integer (buf, 4);
529}
c5aa993b 530
d2427a71
RH
531/* To skip prologues, I use this predicate. Returns either PC itself
532 if the code at PC does not look like a function prologue; otherwise
533 returns an address that (if we're lucky) follows the prologue. If
534 LENIENT, then we must skip everything which is involved in setting
535 up the frame (it's OK to skip more, just so long as we don't skip
536 anything which might clobber the registers which are being saved. */
c906108c 537
d2427a71
RH
538static CORE_ADDR
539alpha_skip_prologue (CORE_ADDR pc)
540{
541 unsigned long inst;
542 int offset;
543 CORE_ADDR post_prologue_pc;
544 char buf[4];
c906108c 545
d2427a71
RH
546 /* Silently return the unaltered pc upon memory errors.
547 This could happen on OSF/1 if decode_line_1 tries to skip the
548 prologue for quickstarted shared library functions when the
549 shared library is not yet mapped in.
550 Reading target memory is slow over serial lines, so we perform
551 this check only if the target has shared libraries (which all
552 Alpha targets do). */
553 if (target_read_memory (pc, buf, 4))
554 return pc;
c906108c 555
d2427a71
RH
556 /* See if we can determine the end of the prologue via the symbol table.
557 If so, then return either PC, or the PC after the prologue, whichever
558 is greater. */
c906108c 559
d2427a71
RH
560 post_prologue_pc = alpha_after_prologue (pc);
561 if (post_prologue_pc != 0)
562 return max (pc, post_prologue_pc);
c906108c 563
d2427a71
RH
564 /* Can't determine prologue from the symbol table, need to examine
565 instructions. */
dc1b0db2 566
d2427a71
RH
567 /* Skip the typical prologue instructions. These are the stack adjustment
568 instruction and the instructions that save registers on the stack
569 or in the gcc frame. */
570 for (offset = 0; offset < 100; offset += 4)
571 {
572 inst = alpha_read_insn (pc + offset);
c906108c 573
d2427a71
RH
574 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
575 continue;
576 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
577 continue;
578 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
579 continue;
580 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
581 continue;
c906108c 582
d2427a71
RH
583 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
584 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
585 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
586 continue;
c906108c 587
d2427a71
RH
588 if (inst == 0x47de040f) /* bis sp,sp,fp */
589 continue;
590 if (inst == 0x47fe040f) /* bis zero,sp,fp */
591 continue;
c906108c 592
d2427a71 593 break;
c906108c 594 }
d2427a71
RH
595 return pc + offset;
596}
c906108c 597
d2427a71
RH
598\f
599/* Figure out where the longjmp will land.
600 We expect the first arg to be a pointer to the jmp_buf structure from
601 which we extract the PC (JB_PC) that we will land at. The PC is copied
602 into the "pc". This routine returns true on success. */
c906108c
SS
603
604static int
d2427a71 605alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 606{
d2427a71
RH
607 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
608 CORE_ADDR jb_addr;
5ab84872 609 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 610
d2427a71 611 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 612
d2427a71
RH
613 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
614 raw_buffer, tdep->jb_elt_size))
c906108c 615 return 0;
d2427a71 616
7c0b4a20 617 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 618 return 1;
c906108c
SS
619}
620
d2427a71
RH
621\f
622/* Frame unwinder for signal trampolines. We use alpha tdep bits that
623 describe the location and shape of the sigcontext structure. After
624 that, all registers are in memory, so it's easy. */
625/* ??? Shouldn't we be able to do this generically, rather than with
626 OSABI data specific to Alpha? */
627
628struct alpha_sigtramp_unwind_cache
c906108c 629{
d2427a71
RH
630 CORE_ADDR sigcontext_addr;
631};
c906108c 632
d2427a71
RH
633static struct alpha_sigtramp_unwind_cache *
634alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
635 void **this_prologue_cache)
636{
637 struct alpha_sigtramp_unwind_cache *info;
638 struct gdbarch_tdep *tdep;
c906108c 639
d2427a71
RH
640 if (*this_prologue_cache)
641 return *this_prologue_cache;
c906108c 642
d2427a71
RH
643 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
644 *this_prologue_cache = info;
c906108c 645
d2427a71
RH
646 tdep = gdbarch_tdep (current_gdbarch);
647 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 648
d2427a71 649 return info;
c906108c
SS
650}
651
d2427a71
RH
652/* Return the address of REGNO in a sigtramp frame. Since this is all
653 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 654
d2427a71
RH
655#ifndef SIGFRAME_PC_OFF
656#define SIGFRAME_PC_OFF (2 * 8)
657#define SIGFRAME_REGSAVE_OFF (4 * 8)
658#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
659#endif
c5aa993b 660
d2427a71
RH
661static CORE_ADDR
662alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
663{
664 if (regno < 32)
665 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
666 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
667 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
668 if (regno == PC_REGNUM)
669 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 670
d2427a71 671 return 0;
c906108c
SS
672}
673
d2427a71
RH
674/* Given a GDB frame, determine the address of the calling function's
675 frame. This will be used to create a new GDB frame struct. */
140f9984 676
dc129d82 677static void
d2427a71
RH
678alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
679 void **this_prologue_cache,
680 struct frame_id *this_id)
c906108c 681{
d2427a71
RH
682 struct alpha_sigtramp_unwind_cache *info
683 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
684 struct gdbarch_tdep *tdep;
685 CORE_ADDR stack_addr, code_addr;
686
687 /* If the OSABI couldn't locate the sigcontext, give up. */
688 if (info->sigcontext_addr == 0)
689 return;
690
691 /* If we have dynamic signal trampolines, find their start.
692 If we do not, then we must assume there is a symbol record
693 that can provide the start address. */
694 tdep = gdbarch_tdep (current_gdbarch);
695 if (tdep->dynamic_sigtramp_offset)
c906108c 696 {
d2427a71
RH
697 int offset;
698 code_addr = frame_pc_unwind (next_frame);
699 offset = tdep->dynamic_sigtramp_offset (code_addr);
700 if (offset >= 0)
701 code_addr -= offset;
c906108c 702 else
d2427a71 703 code_addr = 0;
c906108c 704 }
d2427a71
RH
705 else
706 code_addr = frame_func_unwind (next_frame);
c906108c 707
d2427a71
RH
708 /* The stack address is trivially read from the sigcontext. */
709 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
710 ALPHA_SP_REGNUM);
711 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 712
d2427a71 713 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
714}
715
d2427a71 716/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 717
d2427a71
RH
718static void
719alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
720 void **this_prologue_cache,
721 int regnum, int *optimizedp,
722 enum lval_type *lvalp, CORE_ADDR *addrp,
723 int *realnump, void *bufferp)
c906108c 724{
d2427a71
RH
725 struct alpha_sigtramp_unwind_cache *info
726 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
727 CORE_ADDR addr;
c906108c 728
d2427a71 729 if (info->sigcontext_addr != 0)
c906108c 730 {
d2427a71
RH
731 /* All integer and fp registers are stored in memory. */
732 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
733 if (addr != 0)
c906108c 734 {
d2427a71
RH
735 *optimizedp = 0;
736 *lvalp = lval_memory;
737 *addrp = addr;
738 *realnump = -1;
739 if (bufferp != NULL)
740 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
741 return;
c906108c 742 }
c906108c
SS
743 }
744
d2427a71
RH
745 /* This extra register may actually be in the sigcontext, but our
746 current description of it in alpha_sigtramp_frame_unwind_cache
747 doesn't include it. Too bad. Fall back on whatever's in the
748 outer frame. */
749 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
750 realnump, bufferp);
751}
c906108c 752
d2427a71
RH
753static const struct frame_unwind alpha_sigtramp_frame_unwind = {
754 SIGTRAMP_FRAME,
755 alpha_sigtramp_frame_this_id,
756 alpha_sigtramp_frame_prev_register
757};
c906108c 758
d2427a71
RH
759static const struct frame_unwind *
760alpha_sigtramp_frame_p (CORE_ADDR pc)
761{
762 char *name;
c906108c 763
d2427a71
RH
764 /* We shouldn't even bother to try if the OSABI didn't register
765 a sigcontext_addr handler. */
766 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
767 return NULL;
c906108c 768
d2427a71
RH
769 /* Otherwise we should be in a signal frame. */
770 find_pc_partial_function (pc, &name, NULL, NULL);
771 if (PC_IN_SIGTRAMP (pc, name))
772 return &alpha_sigtramp_frame_unwind;
c906108c 773
d2427a71 774 return NULL;
c906108c 775}
d2427a71
RH
776\f
777/* Fallback alpha frame unwinder. Uses instruction scanning and knows
778 something about the traditional layout of alpha stack frames. */
c906108c 779
d2427a71 780struct alpha_heuristic_unwind_cache
c906108c 781{
d2427a71
RH
782 CORE_ADDR *saved_regs;
783 CORE_ADDR vfp;
784 CORE_ADDR start_pc;
785 int return_reg;
786};
c906108c 787
d2427a71
RH
788/* Heuristic_proc_start may hunt through the text section for a long
789 time across a 2400 baud serial line. Allows the user to limit this
790 search. */
791static unsigned int heuristic_fence_post = 0;
c906108c 792
d2427a71
RH
793/* Attempt to locate the start of the function containing PC. We assume that
794 the previous function ends with an about_to_return insn. Not foolproof by
795 any means, since gcc is happy to put the epilogue in the middle of a
796 function. But we're guessing anyway... */
c906108c 797
d2427a71
RH
798static CORE_ADDR
799alpha_heuristic_proc_start (CORE_ADDR pc)
800{
801 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
802 CORE_ADDR last_non_nop = pc;
803 CORE_ADDR fence = pc - heuristic_fence_post;
804 CORE_ADDR orig_pc = pc;
fbe586ae 805 CORE_ADDR func;
9e0b60a8 806
d2427a71
RH
807 if (pc == 0)
808 return 0;
9e0b60a8 809
fbe586ae
RH
810 /* First see if we can find the start of the function from minimal
811 symbol information. This can succeed with a binary that doesn't
812 have debug info, but hasn't been stripped. */
813 func = get_pc_function_start (pc);
814 if (func)
815 return func;
816
d2427a71
RH
817 if (heuristic_fence_post == UINT_MAX
818 || fence < tdep->vm_min_address)
819 fence = tdep->vm_min_address;
c906108c 820
d2427a71
RH
821 /* Search back for previous return; also stop at a 0, which might be
822 seen for instance before the start of a code section. Don't include
823 nops, since this usually indicates padding between functions. */
824 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 825 {
d2427a71
RH
826 unsigned int insn = alpha_read_insn (pc);
827 switch (insn)
c906108c 828 {
d2427a71
RH
829 case 0: /* invalid insn */
830 case 0x6bfa8001: /* ret $31,($26),1 */
831 return last_non_nop;
832
833 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
834 case 0x47ff041f: /* nop: bis $31,$31,$31 */
835 break;
836
837 default:
838 last_non_nop = pc;
839 break;
c906108c 840 }
d2427a71 841 }
c906108c 842
d2427a71
RH
843 /* It's not clear to me why we reach this point when stopping quietly,
844 but with this test, at least we don't print out warnings for every
845 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
846 if (stop_soon == NO_STOP_QUIETLY)
847 {
848 static int blurb_printed = 0;
c906108c 849
d2427a71
RH
850 if (fence == tdep->vm_min_address)
851 warning ("Hit beginning of text section without finding");
c906108c 852 else
d2427a71
RH
853 warning ("Hit heuristic-fence-post without finding");
854 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 855
d2427a71
RH
856 if (!blurb_printed)
857 {
858 printf_filtered ("\
859This warning occurs if you are debugging a function without any symbols\n\
860(for example, in a stripped executable). In that case, you may wish to\n\
861increase the size of the search with the `set heuristic-fence-post' command.\n\
862\n\
863Otherwise, you told GDB there was a function where there isn't one, or\n\
864(more likely) you have encountered a bug in GDB.\n");
865 blurb_printed = 1;
866 }
867 }
c906108c 868
d2427a71
RH
869 return 0;
870}
c906108c 871
fbe586ae 872static struct alpha_heuristic_unwind_cache *
d2427a71
RH
873alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
874 void **this_prologue_cache,
875 CORE_ADDR start_pc)
876{
877 struct alpha_heuristic_unwind_cache *info;
878 ULONGEST val;
879 CORE_ADDR limit_pc, cur_pc;
880 int frame_reg, frame_size, return_reg, reg;
c906108c 881
d2427a71
RH
882 if (*this_prologue_cache)
883 return *this_prologue_cache;
c906108c 884
d2427a71
RH
885 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
886 *this_prologue_cache = info;
887 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 888
d2427a71
RH
889 limit_pc = frame_pc_unwind (next_frame);
890 if (start_pc == 0)
891 start_pc = alpha_heuristic_proc_start (limit_pc);
892 info->start_pc = start_pc;
c906108c 893
d2427a71
RH
894 frame_reg = ALPHA_SP_REGNUM;
895 frame_size = 0;
896 return_reg = -1;
c906108c 897
d2427a71
RH
898 /* If we've identified a likely place to start, do code scanning. */
899 if (start_pc != 0)
c5aa993b 900 {
d2427a71
RH
901 /* Limit the forward search to 50 instructions. */
902 if (start_pc + 200 < limit_pc)
903 limit_pc = start_pc + 200;
c5aa993b 904
d2427a71
RH
905 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
906 {
907 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 908
d2427a71
RH
909 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
910 {
911 if (word & 0x8000)
912 {
913 /* Consider only the first stack allocation instruction
914 to contain the static size of the frame. */
915 if (frame_size == 0)
916 frame_size = (-word) & 0xffff;
917 }
918 else
919 {
920 /* Exit loop if a positive stack adjustment is found, which
921 usually means that the stack cleanup code in the function
922 epilogue is reached. */
923 break;
924 }
925 }
926 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
927 {
928 reg = (word & 0x03e00000) >> 21;
929
930 if (reg == 31)
931 continue;
932
933 /* Do not compute the address where the register was saved yet,
934 because we don't know yet if the offset will need to be
935 relative to $sp or $fp (we can not compute the address
936 relative to $sp if $sp is updated during the execution of
937 the current subroutine, for instance when doing some alloca).
938 So just store the offset for the moment, and compute the
939 address later when we know whether this frame has a frame
940 pointer or not. */
941 /* Hack: temporarily add one, so that the offset is non-zero
942 and we can tell which registers have save offsets below. */
943 info->saved_regs[reg] = (word & 0xffff) + 1;
944
945 /* Starting with OSF/1-3.2C, the system libraries are shipped
946 without local symbols, but they still contain procedure
947 descriptors without a symbol reference. GDB is currently
948 unable to find these procedure descriptors and uses
949 heuristic_proc_desc instead.
950 As some low level compiler support routines (__div*, __add*)
951 use a non-standard return address register, we have to
952 add some heuristics to determine the return address register,
953 or stepping over these routines will fail.
954 Usually the return address register is the first register
955 saved on the stack, but assembler optimization might
956 rearrange the register saves.
957 So we recognize only a few registers (t7, t9, ra) within
958 the procedure prologue as valid return address registers.
959 If we encounter a return instruction, we extract the
960 the return address register from it.
961
962 FIXME: Rewriting GDB to access the procedure descriptors,
963 e.g. via the minimal symbol table, might obviate this hack. */
964 if (return_reg == -1
965 && cur_pc < (start_pc + 80)
966 && (reg == ALPHA_T7_REGNUM
967 || reg == ALPHA_T9_REGNUM
968 || reg == ALPHA_RA_REGNUM))
969 return_reg = reg;
970 }
971 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
972 return_reg = (word >> 16) & 0x1f;
973 else if (word == 0x47de040f) /* bis sp,sp,fp */
974 frame_reg = ALPHA_GCC_FP_REGNUM;
975 else if (word == 0x47fe040f) /* bis zero,sp,fp */
976 frame_reg = ALPHA_GCC_FP_REGNUM;
977 }
c5aa993b 978
d2427a71
RH
979 /* If we haven't found a valid return address register yet, keep
980 searching in the procedure prologue. */
981 if (return_reg == -1)
982 {
983 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
984 {
985 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 986
d2427a71
RH
987 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
988 {
989 reg = (word & 0x03e00000) >> 21;
990 if (reg == ALPHA_T7_REGNUM
991 || reg == ALPHA_T9_REGNUM
992 || reg == ALPHA_RA_REGNUM)
993 {
994 return_reg = reg;
995 break;
996 }
997 }
998 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
999 {
1000 return_reg = (word >> 16) & 0x1f;
1001 break;
1002 }
85b32d22
RH
1003
1004 cur_pc += 4;
d2427a71
RH
1005 }
1006 }
c906108c 1007 }
c906108c 1008
d2427a71
RH
1009 /* Failing that, do default to the customary RA. */
1010 if (return_reg == -1)
1011 return_reg = ALPHA_RA_REGNUM;
1012 info->return_reg = return_reg;
f8453e34 1013
d2427a71
RH
1014 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1015 info->vfp = val + frame_size;
c906108c 1016
d2427a71
RH
1017 /* Convert offsets to absolute addresses. See above about adding
1018 one to the offsets to make all detected offsets non-zero. */
1019 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1020 if (info->saved_regs[reg])
1021 info->saved_regs[reg] += val - 1;
1022
1023 return info;
c906108c 1024}
c906108c 1025
d2427a71
RH
1026/* Given a GDB frame, determine the address of the calling function's
1027 frame. This will be used to create a new GDB frame struct. */
1028
fbe586ae 1029static void
d2427a71
RH
1030alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1031 void **this_prologue_cache,
1032 struct frame_id *this_id)
c906108c 1033{
d2427a71
RH
1034 struct alpha_heuristic_unwind_cache *info
1035 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1036
fbe586ae
RH
1037 /* This is meant to halt the backtrace at "_start". Make sure we
1038 don't halt it at a generic dummy frame. */
1039 if (inside_entry_file (info->start_pc))
1040 return;
1041
d2427a71 1042 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1043}
1044
d2427a71
RH
1045/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1046
fbe586ae 1047static void
d2427a71
RH
1048alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1049 void **this_prologue_cache,
1050 int regnum, int *optimizedp,
1051 enum lval_type *lvalp, CORE_ADDR *addrp,
1052 int *realnump, void *bufferp)
c906108c 1053{
d2427a71
RH
1054 struct alpha_heuristic_unwind_cache *info
1055 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1056
1057 /* The PC of the previous frame is stored in the link register of
1058 the current frame. Frob regnum so that we pull the value from
1059 the correct place. */
1060 if (regnum == ALPHA_PC_REGNUM)
1061 regnum = info->return_reg;
1062
1063 /* For all registers known to be saved in the current frame,
1064 do the obvious and pull the value out. */
1065 if (info->saved_regs[regnum])
c906108c 1066 {
d2427a71
RH
1067 *optimizedp = 0;
1068 *lvalp = lval_memory;
1069 *addrp = info->saved_regs[regnum];
1070 *realnump = -1;
1071 if (bufferp != NULL)
1072 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1073 return;
1074 }
1075
d2427a71
RH
1076 /* The stack pointer of the previous frame is computed by popping
1077 the current stack frame. */
1078 if (regnum == ALPHA_SP_REGNUM)
c906108c 1079 {
d2427a71
RH
1080 *optimizedp = 0;
1081 *lvalp = not_lval;
1082 *addrp = 0;
1083 *realnump = -1;
1084 if (bufferp != NULL)
1085 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1086 return;
c906108c 1087 }
95b80706 1088
d2427a71
RH
1089 /* Otherwise assume the next frame has the same register value. */
1090 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1091 realnump, bufferp);
95b80706
JT
1092}
1093
d2427a71
RH
1094static const struct frame_unwind alpha_heuristic_frame_unwind = {
1095 NORMAL_FRAME,
1096 alpha_heuristic_frame_this_id,
1097 alpha_heuristic_frame_prev_register
1098};
c906108c 1099
d2427a71
RH
1100static const struct frame_unwind *
1101alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 1102{
d2427a71 1103 return &alpha_heuristic_frame_unwind;
c906108c
SS
1104}
1105
fbe586ae 1106static CORE_ADDR
d2427a71
RH
1107alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1108 void **this_prologue_cache)
c906108c 1109{
d2427a71
RH
1110 struct alpha_heuristic_unwind_cache *info
1111 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1112
d2427a71 1113 return info->vfp;
c906108c
SS
1114}
1115
d2427a71
RH
1116static const struct frame_base alpha_heuristic_frame_base = {
1117 &alpha_heuristic_frame_unwind,
1118 alpha_heuristic_frame_base_address,
1119 alpha_heuristic_frame_base_address,
1120 alpha_heuristic_frame_base_address
1121};
1122
c906108c 1123/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1124 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1125
1126static void
fba45db2 1127reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1128{
1129 reinit_frame_cache ();
1130}
1131
d2427a71
RH
1132\f
1133/* ALPHA stack frames are almost impenetrable. When execution stops,
1134 we basically have to look at symbol information for the function
1135 that we stopped in, which tells us *which* register (if any) is
1136 the base of the frame pointer, and what offset from that register
1137 the frame itself is at.
c906108c 1138
d2427a71
RH
1139 This presents a problem when trying to examine a stack in memory
1140 (that isn't executing at the moment), using the "frame" command. We
1141 don't have a PC, nor do we have any registers except SP.
c906108c 1142
d2427a71
RH
1143 This routine takes two arguments, SP and PC, and tries to make the
1144 cached frames look as if these two arguments defined a frame on the
1145 cache. This allows the rest of info frame to extract the important
1146 arguments without difficulty. */
ec32e4be 1147
d2427a71
RH
1148struct frame_info *
1149alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1150{
d2427a71
RH
1151 if (argc != 2)
1152 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1153
d2427a71 1154 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1155}
1156
d2427a71
RH
1157/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1158 dummy frame. The frame ID's base needs to match the TOS value
1159 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1160 breakpoint. */
d734c450 1161
d2427a71
RH
1162static struct frame_id
1163alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1164{
d2427a71
RH
1165 ULONGEST base;
1166 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1167 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1168}
1169
dc129d82 1170static CORE_ADDR
d2427a71 1171alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1172{
d2427a71
RH
1173 ULONGEST pc;
1174 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1175 return pc;
accc6d1f
JT
1176}
1177
d2427a71 1178\f
ec32e4be
JT
1179/* alpha_software_single_step() is called just before we want to resume
1180 the inferior, if we want to single-step it but there is no hardware
1181 or kernel single-step support (NetBSD on Alpha, for example). We find
1182 the target of the coming instruction and breakpoint it.
1183
1184 single_step is also called just after the inferior stops. If we had
1185 set up a simulated single-step, we undo our damage. */
1186
1187static CORE_ADDR
1188alpha_next_pc (CORE_ADDR pc)
1189{
1190 unsigned int insn;
1191 unsigned int op;
1192 int offset;
1193 LONGEST rav;
1194
1195 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1196
1197 /* Opcode is top 6 bits. */
1198 op = (insn >> 26) & 0x3f;
1199
1200 if (op == 0x1a)
1201 {
1202 /* Jump format: target PC is:
1203 RB & ~3 */
1204 return (read_register ((insn >> 16) & 0x1f) & ~3);
1205 }
1206
1207 if ((op & 0x30) == 0x30)
1208 {
1209 /* Branch format: target PC is:
1210 (new PC) + (4 * sext(displacement)) */
1211 if (op == 0x30 || /* BR */
1212 op == 0x34) /* BSR */
1213 {
1214 branch_taken:
1215 offset = (insn & 0x001fffff);
1216 if (offset & 0x00100000)
1217 offset |= 0xffe00000;
1218 offset *= 4;
1219 return (pc + 4 + offset);
1220 }
1221
1222 /* Need to determine if branch is taken; read RA. */
1223 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1224 switch (op)
1225 {
1226 case 0x38: /* BLBC */
1227 if ((rav & 1) == 0)
1228 goto branch_taken;
1229 break;
1230 case 0x3c: /* BLBS */
1231 if (rav & 1)
1232 goto branch_taken;
1233 break;
1234 case 0x39: /* BEQ */
1235 if (rav == 0)
1236 goto branch_taken;
1237 break;
1238 case 0x3d: /* BNE */
1239 if (rav != 0)
1240 goto branch_taken;
1241 break;
1242 case 0x3a: /* BLT */
1243 if (rav < 0)
1244 goto branch_taken;
1245 break;
1246 case 0x3b: /* BLE */
1247 if (rav <= 0)
1248 goto branch_taken;
1249 break;
1250 case 0x3f: /* BGT */
1251 if (rav > 0)
1252 goto branch_taken;
1253 break;
1254 case 0x3e: /* BGE */
1255 if (rav >= 0)
1256 goto branch_taken;
1257 break;
d2427a71
RH
1258
1259 /* ??? Missing floating-point branches. */
ec32e4be
JT
1260 }
1261 }
1262
1263 /* Not a branch or branch not taken; target PC is:
1264 pc + 4 */
1265 return (pc + 4);
1266}
1267
1268void
1269alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1270{
1271 static CORE_ADDR next_pc;
1272 typedef char binsn_quantum[BREAKPOINT_MAX];
1273 static binsn_quantum break_mem;
1274 CORE_ADDR pc;
1275
1276 if (insert_breakpoints_p)
1277 {
1278 pc = read_pc ();
1279 next_pc = alpha_next_pc (pc);
1280
1281 target_insert_breakpoint (next_pc, break_mem);
1282 }
1283 else
1284 {
1285 target_remove_breakpoint (next_pc, break_mem);
1286 write_pc (next_pc);
1287 }
c906108c
SS
1288}
1289
dc129d82 1290\f
dc129d82
JT
1291/* Initialize the current architecture based on INFO. If possible, re-use an
1292 architecture from ARCHES, which is a list of architectures already created
1293 during this debugging session.
1294
1295 Called e.g. at program startup, when reading a core file, and when reading
1296 a binary file. */
1297
1298static struct gdbarch *
1299alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1300{
1301 struct gdbarch_tdep *tdep;
1302 struct gdbarch *gdbarch;
dc129d82
JT
1303
1304 /* Try to determine the ABI of the object we are loading. */
4be87837 1305 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1306 {
4be87837
DJ
1307 /* If it's an ECOFF file, assume it's OSF/1. */
1308 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1309 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1310 }
1311
1312 /* Find a candidate among extant architectures. */
4be87837
DJ
1313 arches = gdbarch_list_lookup_by_info (arches, &info);
1314 if (arches != NULL)
1315 return arches->gdbarch;
dc129d82
JT
1316
1317 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1318 gdbarch = gdbarch_alloc (&info, tdep);
1319
d2427a71
RH
1320 /* Lowest text address. This is used by heuristic_proc_start()
1321 to decide when to stop looking. */
d9b023cc
JT
1322 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1323
36a6271d 1324 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1325 tdep->sigcontext_addr = NULL;
36a6271d 1326
accc6d1f
JT
1327 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1328
dc129d82
JT
1329 /* Type sizes */
1330 set_gdbarch_short_bit (gdbarch, 16);
1331 set_gdbarch_int_bit (gdbarch, 32);
1332 set_gdbarch_long_bit (gdbarch, 64);
1333 set_gdbarch_long_long_bit (gdbarch, 64);
1334 set_gdbarch_float_bit (gdbarch, 32);
1335 set_gdbarch_double_bit (gdbarch, 64);
1336 set_gdbarch_long_double_bit (gdbarch, 64);
1337 set_gdbarch_ptr_bit (gdbarch, 64);
1338
1339 /* Register info */
1340 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1341 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1342 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1343 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1344
1345 set_gdbarch_register_name (gdbarch, alpha_register_name);
dc129d82
JT
1346 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1347 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
dc129d82 1348 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
dc129d82
JT
1349 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1350
1351 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1352 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1353
1354 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1355 set_gdbarch_register_convert_to_virtual (gdbarch,
1356 alpha_register_convert_to_virtual);
1357 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1358
615967cb
RH
1359 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1360
d2427a71 1361 /* Prologue heuristics. */
dc129d82
JT
1362 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1363
5ef165c2
RH
1364 /* Disassembler. */
1365 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1366
d2427a71 1367 /* Call info. */
dc129d82
JT
1368 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1369 set_gdbarch_frameless_function_invocation (gdbarch,
1370 generic_frameless_function_invocation_not);
1371
dc129d82 1372 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
5ec2bb99
RH
1373 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value);
1374 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value);
1375 set_gdbarch_extract_struct_value_address (gdbarch,
dc129d82
JT
1376 alpha_extract_struct_value_address);
1377
1378 /* Settings for calling functions in the inferior. */
c88e30c0 1379 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1380
1381 /* Methods for saving / extracting a dummy frame's ID. */
1382 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1383 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1384
1385 /* Return the unwound PC value. */
1386 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1387
1388 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1389 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1390
95b80706 1391 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1392 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1393
1394 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1395 set_gdbarch_frame_args_skip (gdbarch, 0);
1396
44dffaac 1397 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1398 gdbarch_init_osabi (info, gdbarch);
44dffaac 1399
accc6d1f
JT
1400 /* Now that we have tuned the configuration, set a few final things
1401 based on what the OS ABI has told us. */
1402
1403 if (tdep->jb_pc >= 0)
1404 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1405
d2427a71
RH
1406 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1407 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1408
d2427a71 1409 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1410
d2427a71 1411 return gdbarch;
dc129d82
JT
1412}
1413
c906108c 1414void
fba45db2 1415_initialize_alpha_tdep (void)
c906108c
SS
1416{
1417 struct cmd_list_element *c;
1418
d2427a71 1419 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1420
1421 /* Let the user set the fence post for heuristic_proc_start. */
1422
1423 /* We really would like to have both "0" and "unlimited" work, but
1424 command.c doesn't deal with that. So make it a var_zinteger
1425 because the user can always use "999999" or some such for unlimited. */
1426 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1427 (char *) &heuristic_fence_post,
1428 "\
1429Set the distance searched for the start of a function.\n\
1430If you are debugging a stripped executable, GDB needs to search through the\n\
1431program for the start of a function. This command sets the distance of the\n\
1432search. The only need to set it is when debugging a stripped executable.",
1433 &setlist);
1434 /* We need to throw away the frame cache when we set this, since it
1435 might change our ability to get backtraces. */
9f60d481 1436 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1437 add_show_from_set (c, &showlist);
1438}
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