2004-07-23 Andrew Cagney <cagney@gnu.org>
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
baa490c4 27#include "dwarf2-frame.h"
c906108c
SS
28#include "inferior.h"
29#include "symtab.h"
30#include "value.h"
31#include "gdbcmd.h"
32#include "gdbcore.h"
33#include "dis-asm.h"
34#include "symfile.h"
35#include "objfiles.h"
36#include "gdb_string.h"
c5f0f3d0 37#include "linespec.h"
4e052eda 38#include "regcache.h"
615967cb 39#include "reggroups.h"
dc129d82 40#include "arch-utils.h"
4be87837 41#include "osabi.h"
fe898f56 42#include "block.h"
7d9b040b 43#include "infcall.h"
dc129d82
JT
44
45#include "elf-bfd.h"
46
47#include "alpha-tdep.h"
48
c906108c 49\f
fa88f677 50static const char *
636a6dfc
JT
51alpha_register_name (int regno)
52{
5ab84872 53 static const char * const register_names[] =
636a6dfc
JT
54 {
55 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
56 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
57 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
58 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
59 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
60 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
61 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
62 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 63 "pc", "", "unique"
636a6dfc
JT
64 };
65
66 if (regno < 0)
5ab84872 67 return NULL;
636a6dfc 68 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
69 return NULL;
70 return register_names[regno];
636a6dfc 71}
d734c450 72
dc129d82 73static int
d734c450
JT
74alpha_cannot_fetch_register (int regno)
75{
44d88583 76 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
77}
78
dc129d82 79static int
d734c450
JT
80alpha_cannot_store_register (int regno)
81{
44d88583 82 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
83}
84
dc129d82 85static struct type *
c483c494 86alpha_register_type (struct gdbarch *gdbarch, int regno)
0d056799 87{
72667056
RH
88 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
89 return builtin_type_void_data_ptr;
90 if (regno == ALPHA_PC_REGNUM)
91 return builtin_type_void_func_ptr;
92
93 /* Don't need to worry about little vs big endian until
94 some jerk tries to port to alpha-unicosmk. */
b38b6be2 95 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
72667056
RH
96 return builtin_type_ieee_double_little;
97
98 return builtin_type_int64;
0d056799 99}
f8453e34 100
615967cb
RH
101/* Is REGNUM a member of REGGROUP? */
102
103static int
104alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
105 struct reggroup *group)
106{
107 /* Filter out any registers eliminated, but whose regnum is
108 reserved for backward compatibility, e.g. the vfp. */
109 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
110 return 0;
111
df4a182b
RH
112 if (group == all_reggroup)
113 return 1;
114
115 /* Zero should not be saved or restored. Technically it is a general
116 register (just as $f31 would be a float if we represented it), but
117 there's no point displaying it during "info regs", so leave it out
118 of all groups except for "all". */
119 if (regnum == ALPHA_ZERO_REGNUM)
120 return 0;
121
122 /* All other registers are saved and restored. */
123 if (group == save_reggroup || group == restore_reggroup)
615967cb
RH
124 return 1;
125
126 /* All other groups are non-overlapping. */
127
128 /* Since this is really a PALcode memory slot... */
129 if (regnum == ALPHA_UNIQUE_REGNUM)
130 return group == system_reggroup;
131
132 /* Force the FPCR to be considered part of the floating point state. */
133 if (regnum == ALPHA_FPCR_REGNUM)
134 return group == float_reggroup;
135
136 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
137 return group == float_reggroup;
138 else
139 return group == general_reggroup;
140}
141
dc129d82 142static int
f8453e34
JT
143alpha_register_byte (int regno)
144{
145 return (regno * 8);
146}
147
dc129d82 148static int
f8453e34
JT
149alpha_register_raw_size (int regno)
150{
151 return 8;
152}
153
dc129d82 154static int
f8453e34
JT
155alpha_register_virtual_size (int regno)
156{
157 return 8;
158}
636a6dfc 159
c483c494
RH
160/* The following represents exactly the conversion performed by
161 the LDS instruction. This applies to both single-precision
162 floating point and 32-bit integers. */
163
164static void
165alpha_lds (void *out, const void *in)
166{
167 ULONGEST mem = extract_unsigned_integer (in, 4);
168 ULONGEST frac = (mem >> 0) & 0x7fffff;
169 ULONGEST sign = (mem >> 31) & 1;
170 ULONGEST exp_msb = (mem >> 30) & 1;
171 ULONGEST exp_low = (mem >> 23) & 0x7f;
172 ULONGEST exp, reg;
173
174 exp = (exp_msb << 10) | exp_low;
175 if (exp_msb)
176 {
177 if (exp_low == 0x7f)
178 exp = 0x7ff;
179 }
180 else
181 {
182 if (exp_low != 0x00)
183 exp |= 0x380;
184 }
185
186 reg = (sign << 63) | (exp << 52) | (frac << 29);
187 store_unsigned_integer (out, 8, reg);
188}
189
190/* Similarly, this represents exactly the conversion performed by
191 the STS instruction. */
192
39efb398 193static void
c483c494
RH
194alpha_sts (void *out, const void *in)
195{
196 ULONGEST reg, mem;
197
198 reg = extract_unsigned_integer (in, 8);
199 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
200 store_unsigned_integer (out, 4, mem);
201}
202
d2427a71
RH
203/* The alpha needs a conversion between register and memory format if the
204 register is a floating point register and memory format is float, as the
205 register format must be double or memory format is an integer with 4
206 bytes or less, as the representation of integers in floating point
207 registers is different. */
208
c483c494 209static int
ff2e87ac 210alpha_convert_register_p (int regno, struct type *type)
14696584 211{
c483c494 212 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31);
14696584
RH
213}
214
d2427a71 215static void
ff2e87ac
AC
216alpha_register_to_value (struct frame_info *frame, int regnum,
217 struct type *valtype, void *out)
5868c862 218{
ff2e87ac
AC
219 char in[MAX_REGISTER_SIZE];
220 frame_register_read (frame, regnum, in);
c483c494 221 switch (TYPE_LENGTH (valtype))
d2427a71 222 {
c483c494
RH
223 case 4:
224 alpha_sts (out, in);
225 break;
226 case 8:
227 memcpy (out, in, 8);
228 break;
229 default:
230 error ("Cannot retrieve value from floating point register");
d2427a71 231 }
d2427a71 232}
5868c862 233
d2427a71 234static void
ff2e87ac
AC
235alpha_value_to_register (struct frame_info *frame, int regnum,
236 struct type *valtype, const void *in)
d2427a71 237{
ff2e87ac 238 char out[MAX_REGISTER_SIZE];
c483c494 239 switch (TYPE_LENGTH (valtype))
d2427a71 240 {
c483c494
RH
241 case 4:
242 alpha_lds (out, in);
243 break;
244 case 8:
245 memcpy (out, in, 8);
246 break;
247 default:
248 error ("Cannot store value in floating point register");
d2427a71 249 }
ff2e87ac 250 put_frame_register (frame, regnum, out);
5868c862
JT
251}
252
d2427a71
RH
253\f
254/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
255 the stack. The register arguments are stored in ARG_REG_BUFFER, and
256 then moved into the register file; this simplifies the passing of a
257 large struct which extends from the registers to the stack, plus avoids
258 three ptrace invocations per word.
259
260 We don't bother tracking which register values should go in integer
261 regs or fp regs; we load the same values into both.
262
d2427a71
RH
263 If the called function is returning a structure, the address of the
264 structure to be returned is passed as a hidden first argument. */
c906108c 265
d2427a71 266static CORE_ADDR
7d9b040b 267alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
c88e30c0
RH
268 struct regcache *regcache, CORE_ADDR bp_addr,
269 int nargs, struct value **args, CORE_ADDR sp,
270 int struct_return, CORE_ADDR struct_addr)
c906108c 271{
d2427a71
RH
272 int i;
273 int accumulate_size = struct_return ? 8 : 0;
d2427a71 274 struct alpha_arg
c906108c 275 {
d2427a71
RH
276 char *contents;
277 int len;
278 int offset;
279 };
c88e30c0
RH
280 struct alpha_arg *alpha_args
281 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
52f0bd74 282 struct alpha_arg *m_arg;
c88e30c0 283 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 284 int required_arg_regs;
7d9b040b 285 CORE_ADDR func_addr = find_function_addr (function, NULL);
c906108c 286
c88e30c0
RH
287 /* The ABI places the address of the called function in T12. */
288 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
289
290 /* Set the return address register to point to the entry point
291 of the program, where a breakpoint lies in wait. */
292 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
293
294 /* Lay out the arguments in memory. */
d2427a71
RH
295 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
296 {
297 struct value *arg = args[i];
298 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 299
d2427a71
RH
300 /* Cast argument to long if necessary as the compiler does it too. */
301 switch (TYPE_CODE (arg_type))
c906108c 302 {
d2427a71
RH
303 case TYPE_CODE_INT:
304 case TYPE_CODE_BOOL:
305 case TYPE_CODE_CHAR:
306 case TYPE_CODE_RANGE:
307 case TYPE_CODE_ENUM:
0ede8eca 308 if (TYPE_LENGTH (arg_type) == 4)
d2427a71 309 {
0ede8eca
RH
310 /* 32-bit values must be sign-extended to 64 bits
311 even if the base data type is unsigned. */
312 arg_type = builtin_type_int32;
313 arg = value_cast (arg_type, arg);
314 }
315 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
316 {
317 arg_type = builtin_type_int64;
d2427a71
RH
318 arg = value_cast (arg_type, arg);
319 }
320 break;
7b5e1cb3 321
c88e30c0
RH
322 case TYPE_CODE_FLT:
323 /* "float" arguments loaded in registers must be passed in
324 register format, aka "double". */
325 if (accumulate_size < sizeof (arg_reg_buffer)
326 && TYPE_LENGTH (arg_type) == 4)
327 {
eb4edb88 328 arg_type = builtin_type_ieee_double_little;
c88e30c0
RH
329 arg = value_cast (arg_type, arg);
330 }
331 /* Tru64 5.1 has a 128-bit long double, and passes this by
332 invisible reference. No one else uses this data type. */
333 else if (TYPE_LENGTH (arg_type) == 16)
334 {
335 /* Allocate aligned storage. */
336 sp = (sp & -16) - 16;
337
338 /* Write the real data into the stack. */
339 write_memory (sp, VALUE_CONTENTS (arg), 16);
340
341 /* Construct the indirection. */
342 arg_type = lookup_pointer_type (arg_type);
343 arg = value_from_pointer (arg_type, sp);
344 }
345 break;
7b5e1cb3
RH
346
347 case TYPE_CODE_COMPLEX:
348 /* ??? The ABI says that complex values are passed as two
349 separate scalar values. This distinction only matters
350 for complex float. However, GCC does not implement this. */
351
352 /* Tru64 5.1 has a 128-bit long double, and passes this by
353 invisible reference. */
354 if (TYPE_LENGTH (arg_type) == 32)
355 {
356 /* Allocate aligned storage. */
357 sp = (sp & -16) - 16;
358
359 /* Write the real data into the stack. */
360 write_memory (sp, VALUE_CONTENTS (arg), 32);
361
362 /* Construct the indirection. */
363 arg_type = lookup_pointer_type (arg_type);
364 arg = value_from_pointer (arg_type, sp);
365 }
366 break;
367
d2427a71
RH
368 default:
369 break;
c906108c 370 }
d2427a71
RH
371 m_arg->len = TYPE_LENGTH (arg_type);
372 m_arg->offset = accumulate_size;
373 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
374 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
375 }
376
d2427a71
RH
377 /* Determine required argument register loads, loading an argument register
378 is expensive as it uses three ptrace calls. */
379 required_arg_regs = accumulate_size / 8;
380 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
381 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 382
d2427a71 383 /* Make room for the arguments on the stack. */
c88e30c0
RH
384 if (accumulate_size < sizeof(arg_reg_buffer))
385 accumulate_size = 0;
386 else
387 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 388 sp -= accumulate_size;
c906108c 389
c88e30c0 390 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 391 sp &= ~15;
c906108c 392
d2427a71
RH
393 /* `Push' arguments on the stack. */
394 for (i = nargs; m_arg--, --i >= 0;)
c906108c 395 {
c88e30c0
RH
396 char *contents = m_arg->contents;
397 int offset = m_arg->offset;
398 int len = m_arg->len;
399
400 /* Copy the bytes destined for registers into arg_reg_buffer. */
401 if (offset < sizeof(arg_reg_buffer))
402 {
403 if (offset + len <= sizeof(arg_reg_buffer))
404 {
405 memcpy (arg_reg_buffer + offset, contents, len);
406 continue;
407 }
408 else
409 {
410 int tlen = sizeof(arg_reg_buffer) - offset;
411 memcpy (arg_reg_buffer + offset, contents, tlen);
412 offset += tlen;
413 contents += tlen;
414 len -= tlen;
415 }
416 }
417
418 /* Everything else goes to the stack. */
419 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 420 }
c88e30c0
RH
421 if (struct_return)
422 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 423
d2427a71
RH
424 /* Load the argument registers. */
425 for (i = 0; i < required_arg_regs; i++)
426 {
09cc52fd
RH
427 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
428 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
429 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
430 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 431 }
c906108c 432
09cc52fd
RH
433 /* Finally, update the stack pointer. */
434 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
435
c88e30c0 436 return sp;
c906108c
SS
437}
438
5ec2bb99
RH
439/* Extract from REGCACHE the value about to be returned from a function
440 and copy it into VALBUF. */
d2427a71 441
dc129d82 442static void
5ec2bb99
RH
443alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
444 void *valbuf)
140f9984 445{
7b5e1cb3 446 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
447 char raw_buffer[ALPHA_REGISTER_SIZE];
448 ULONGEST l;
449
450 switch (TYPE_CODE (valtype))
451 {
452 case TYPE_CODE_FLT:
7b5e1cb3 453 switch (length)
5ec2bb99
RH
454 {
455 case 4:
456 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
c483c494 457 alpha_sts (valbuf, raw_buffer);
5ec2bb99
RH
458 break;
459
460 case 8:
461 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
462 break;
463
24064b5c
RH
464 case 16:
465 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
466 read_memory (l, valbuf, 16);
467 break;
468
5ec2bb99 469 default:
67dfac52 470 internal_error (__FILE__, __LINE__, "unknown floating point width");
5ec2bb99
RH
471 }
472 break;
473
7b5e1cb3
RH
474 case TYPE_CODE_COMPLEX:
475 switch (length)
476 {
477 case 8:
478 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
479 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
480 break;
481
482 case 16:
483 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
484 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1,
485 (char *)valbuf + 8);
486 break;
487
488 case 32:
489 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
490 read_memory (l, valbuf, 32);
491 break;
492
493 default:
67dfac52 494 internal_error (__FILE__, __LINE__, "unknown floating point width");
7b5e1cb3
RH
495 }
496 break;
497
5ec2bb99
RH
498 default:
499 /* Assume everything else degenerates to an integer. */
500 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
7b5e1cb3 501 store_unsigned_integer (valbuf, length, l);
5ec2bb99
RH
502 break;
503 }
140f9984
JT
504}
505
5ec2bb99
RH
506/* Extract from REGCACHE the address of a structure about to be returned
507 from a function. */
508
509static CORE_ADDR
510alpha_extract_struct_value_address (struct regcache *regcache)
511{
512 ULONGEST addr;
513 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
514 return addr;
515}
516
517/* Insert the given value into REGCACHE as if it was being
518 returned by a function. */
0d056799 519
d2427a71 520static void
5ec2bb99
RH
521alpha_store_return_value (struct type *valtype, struct regcache *regcache,
522 const void *valbuf)
c906108c 523{
d2427a71 524 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
525 char raw_buffer[ALPHA_REGISTER_SIZE];
526 ULONGEST l;
d2427a71 527
5ec2bb99 528 switch (TYPE_CODE (valtype))
c906108c 529 {
5ec2bb99
RH
530 case TYPE_CODE_FLT:
531 switch (length)
532 {
533 case 4:
c483c494 534 alpha_lds (raw_buffer, valbuf);
f75d70cc
RH
535 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
536 break;
5ec2bb99
RH
537
538 case 8:
539 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
540 break;
541
24064b5c
RH
542 case 16:
543 /* FIXME: 128-bit long doubles are returned like structures:
544 by writing into indirect storage provided by the caller
545 as the first argument. */
546 error ("Cannot set a 128-bit long double return value.");
547
5ec2bb99 548 default:
67dfac52 549 internal_error (__FILE__, __LINE__, "unknown floating point width");
5ec2bb99
RH
550 }
551 break;
d2427a71 552
7b5e1cb3
RH
553 case TYPE_CODE_COMPLEX:
554 switch (length)
555 {
556 case 8:
557 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
558 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
559 break;
560
561 case 16:
562 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
563 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1,
564 (const char *)valbuf + 8);
565 break;
566
567 case 32:
568 /* FIXME: 128-bit long doubles are returned like structures:
569 by writing into indirect storage provided by the caller
570 as the first argument. */
571 error ("Cannot set a 128-bit long double return value.");
572
573 default:
67dfac52 574 internal_error (__FILE__, __LINE__, "unknown floating point width");
7b5e1cb3
RH
575 }
576 break;
577
5ec2bb99
RH
578 default:
579 /* Assume everything else degenerates to an integer. */
0ede8eca
RH
580 /* 32-bit values must be sign-extended to 64 bits
581 even if the base data type is unsigned. */
582 if (length == 4)
583 valtype = builtin_type_int32;
5ec2bb99
RH
584 l = unpack_long (valtype, valbuf);
585 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
586 break;
587 }
c906108c
SS
588}
589
d2427a71
RH
590\f
591static const unsigned char *
592alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 593{
d2427a71
RH
594 static const unsigned char alpha_breakpoint[] =
595 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 596
d2427a71
RH
597 *lenptr = sizeof(alpha_breakpoint);
598 return (alpha_breakpoint);
599}
c906108c 600
d2427a71
RH
601\f
602/* This returns the PC of the first insn after the prologue.
603 If we can't find the prologue, then return 0. */
c906108c 604
d2427a71
RH
605CORE_ADDR
606alpha_after_prologue (CORE_ADDR pc)
c906108c 607{
d2427a71
RH
608 struct symtab_and_line sal;
609 CORE_ADDR func_addr, func_end;
c906108c 610
d2427a71 611 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 612 return 0;
c906108c 613
d2427a71
RH
614 sal = find_pc_line (func_addr, 0);
615 if (sal.end < func_end)
616 return sal.end;
c5aa993b 617
d2427a71
RH
618 /* The line after the prologue is after the end of the function. In this
619 case, tell the caller to find the prologue the hard way. */
620 return 0;
c906108c
SS
621}
622
d2427a71
RH
623/* Read an instruction from memory at PC, looking through breakpoints. */
624
625unsigned int
626alpha_read_insn (CORE_ADDR pc)
c906108c 627{
d2427a71
RH
628 char buf[4];
629 int status;
c5aa993b 630
1f602b35 631 status = deprecated_read_memory_nobpt (pc, buf, 4);
d2427a71
RH
632 if (status)
633 memory_error (status, pc);
634 return extract_unsigned_integer (buf, 4);
635}
c5aa993b 636
d2427a71
RH
637/* To skip prologues, I use this predicate. Returns either PC itself
638 if the code at PC does not look like a function prologue; otherwise
639 returns an address that (if we're lucky) follows the prologue. If
640 LENIENT, then we must skip everything which is involved in setting
641 up the frame (it's OK to skip more, just so long as we don't skip
642 anything which might clobber the registers which are being saved. */
c906108c 643
d2427a71
RH
644static CORE_ADDR
645alpha_skip_prologue (CORE_ADDR pc)
646{
647 unsigned long inst;
648 int offset;
649 CORE_ADDR post_prologue_pc;
650 char buf[4];
c906108c 651
d2427a71
RH
652 /* Silently return the unaltered pc upon memory errors.
653 This could happen on OSF/1 if decode_line_1 tries to skip the
654 prologue for quickstarted shared library functions when the
655 shared library is not yet mapped in.
656 Reading target memory is slow over serial lines, so we perform
657 this check only if the target has shared libraries (which all
658 Alpha targets do). */
659 if (target_read_memory (pc, buf, 4))
660 return pc;
c906108c 661
d2427a71
RH
662 /* See if we can determine the end of the prologue via the symbol table.
663 If so, then return either PC, or the PC after the prologue, whichever
664 is greater. */
c906108c 665
d2427a71
RH
666 post_prologue_pc = alpha_after_prologue (pc);
667 if (post_prologue_pc != 0)
668 return max (pc, post_prologue_pc);
c906108c 669
d2427a71
RH
670 /* Can't determine prologue from the symbol table, need to examine
671 instructions. */
dc1b0db2 672
d2427a71
RH
673 /* Skip the typical prologue instructions. These are the stack adjustment
674 instruction and the instructions that save registers on the stack
675 or in the gcc frame. */
676 for (offset = 0; offset < 100; offset += 4)
677 {
678 inst = alpha_read_insn (pc + offset);
c906108c 679
d2427a71
RH
680 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
681 continue;
682 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
683 continue;
684 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
685 continue;
686 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
687 continue;
c906108c 688
d2427a71
RH
689 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
690 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
691 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
692 continue;
c906108c 693
d2427a71
RH
694 if (inst == 0x47de040f) /* bis sp,sp,fp */
695 continue;
696 if (inst == 0x47fe040f) /* bis zero,sp,fp */
697 continue;
c906108c 698
d2427a71 699 break;
c906108c 700 }
d2427a71
RH
701 return pc + offset;
702}
c906108c 703
d2427a71
RH
704\f
705/* Figure out where the longjmp will land.
706 We expect the first arg to be a pointer to the jmp_buf structure from
707 which we extract the PC (JB_PC) that we will land at. The PC is copied
708 into the "pc". This routine returns true on success. */
c906108c
SS
709
710static int
d2427a71 711alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 712{
d2427a71
RH
713 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
714 CORE_ADDR jb_addr;
5ab84872 715 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 716
d2427a71 717 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 718
d2427a71
RH
719 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
720 raw_buffer, tdep->jb_elt_size))
c906108c 721 return 0;
d2427a71 722
7c0b4a20 723 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 724 return 1;
c906108c
SS
725}
726
d2427a71
RH
727\f
728/* Frame unwinder for signal trampolines. We use alpha tdep bits that
729 describe the location and shape of the sigcontext structure. After
730 that, all registers are in memory, so it's easy. */
731/* ??? Shouldn't we be able to do this generically, rather than with
732 OSABI data specific to Alpha? */
733
734struct alpha_sigtramp_unwind_cache
c906108c 735{
d2427a71
RH
736 CORE_ADDR sigcontext_addr;
737};
c906108c 738
d2427a71
RH
739static struct alpha_sigtramp_unwind_cache *
740alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
741 void **this_prologue_cache)
742{
743 struct alpha_sigtramp_unwind_cache *info;
744 struct gdbarch_tdep *tdep;
c906108c 745
d2427a71
RH
746 if (*this_prologue_cache)
747 return *this_prologue_cache;
c906108c 748
d2427a71
RH
749 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
750 *this_prologue_cache = info;
c906108c 751
d2427a71
RH
752 tdep = gdbarch_tdep (current_gdbarch);
753 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 754
d2427a71 755 return info;
c906108c
SS
756}
757
138e7be5
MK
758/* Return the address of REGNUM in a sigtramp frame. Since this is
759 all arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 760
d2427a71 761static CORE_ADDR
138e7be5 762alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum)
d2427a71 763{
138e7be5
MK
764 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
765
766 if (regnum >= 0 && regnum < 32)
767 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
768 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
769 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
770 else if (regnum == ALPHA_PC_REGNUM)
771 return sigcontext_addr + tdep->sc_pc_offset;
c5aa993b 772
d2427a71 773 return 0;
c906108c
SS
774}
775
d2427a71
RH
776/* Given a GDB frame, determine the address of the calling function's
777 frame. This will be used to create a new GDB frame struct. */
140f9984 778
dc129d82 779static void
d2427a71
RH
780alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
781 void **this_prologue_cache,
782 struct frame_id *this_id)
c906108c 783{
d2427a71
RH
784 struct alpha_sigtramp_unwind_cache *info
785 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
786 struct gdbarch_tdep *tdep;
787 CORE_ADDR stack_addr, code_addr;
788
789 /* If the OSABI couldn't locate the sigcontext, give up. */
790 if (info->sigcontext_addr == 0)
791 return;
792
793 /* If we have dynamic signal trampolines, find their start.
794 If we do not, then we must assume there is a symbol record
795 that can provide the start address. */
796 tdep = gdbarch_tdep (current_gdbarch);
797 if (tdep->dynamic_sigtramp_offset)
c906108c 798 {
d2427a71
RH
799 int offset;
800 code_addr = frame_pc_unwind (next_frame);
801 offset = tdep->dynamic_sigtramp_offset (code_addr);
802 if (offset >= 0)
803 code_addr -= offset;
c906108c 804 else
d2427a71 805 code_addr = 0;
c906108c 806 }
d2427a71
RH
807 else
808 code_addr = frame_func_unwind (next_frame);
c906108c 809
d2427a71
RH
810 /* The stack address is trivially read from the sigcontext. */
811 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
812 ALPHA_SP_REGNUM);
b21fd293
RH
813 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
814 ALPHA_REGISTER_SIZE);
c906108c 815
d2427a71 816 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
817}
818
d2427a71 819/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 820
d2427a71
RH
821static void
822alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
823 void **this_prologue_cache,
824 int regnum, int *optimizedp,
825 enum lval_type *lvalp, CORE_ADDR *addrp,
826 int *realnump, void *bufferp)
c906108c 827{
d2427a71
RH
828 struct alpha_sigtramp_unwind_cache *info
829 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
830 CORE_ADDR addr;
c906108c 831
d2427a71 832 if (info->sigcontext_addr != 0)
c906108c 833 {
d2427a71
RH
834 /* All integer and fp registers are stored in memory. */
835 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
836 if (addr != 0)
c906108c 837 {
d2427a71
RH
838 *optimizedp = 0;
839 *lvalp = lval_memory;
840 *addrp = addr;
841 *realnump = -1;
842 if (bufferp != NULL)
b21fd293 843 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
d2427a71 844 return;
c906108c 845 }
c906108c
SS
846 }
847
d2427a71
RH
848 /* This extra register may actually be in the sigcontext, but our
849 current description of it in alpha_sigtramp_frame_unwind_cache
850 doesn't include it. Too bad. Fall back on whatever's in the
851 outer frame. */
852 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
853 realnump, bufferp);
854}
c906108c 855
d2427a71
RH
856static const struct frame_unwind alpha_sigtramp_frame_unwind = {
857 SIGTRAMP_FRAME,
858 alpha_sigtramp_frame_this_id,
859 alpha_sigtramp_frame_prev_register
860};
c906108c 861
d2427a71 862static const struct frame_unwind *
336d1bba 863alpha_sigtramp_frame_sniffer (struct frame_info *next_frame)
d2427a71 864{
336d1bba 865 CORE_ADDR pc = frame_pc_unwind (next_frame);
d2427a71 866 char *name;
c906108c 867
f2524b93
AC
868 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
869 look at tramp-frame.h and other simplier per-architecture
870 sigtramp unwinders. */
871
872 /* We shouldn't even bother to try if the OSABI didn't register a
873 sigcontext_addr handler or pc_in_sigtramp hander. */
874 if (gdbarch_tdep (current_gdbarch)->sigcontext_addr == NULL)
875 return NULL;
876 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp == NULL)
d2427a71 877 return NULL;
c906108c 878
d2427a71
RH
879 /* Otherwise we should be in a signal frame. */
880 find_pc_partial_function (pc, &name, NULL, NULL);
f2524b93 881 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp (pc, name))
d2427a71 882 return &alpha_sigtramp_frame_unwind;
c906108c 883
d2427a71 884 return NULL;
c906108c 885}
d2427a71
RH
886\f
887/* Fallback alpha frame unwinder. Uses instruction scanning and knows
888 something about the traditional layout of alpha stack frames. */
c906108c 889
d2427a71 890struct alpha_heuristic_unwind_cache
c906108c 891{
d2427a71
RH
892 CORE_ADDR *saved_regs;
893 CORE_ADDR vfp;
894 CORE_ADDR start_pc;
895 int return_reg;
896};
c906108c 897
d2427a71
RH
898/* Heuristic_proc_start may hunt through the text section for a long
899 time across a 2400 baud serial line. Allows the user to limit this
900 search. */
901static unsigned int heuristic_fence_post = 0;
c906108c 902
d2427a71
RH
903/* Attempt to locate the start of the function containing PC. We assume that
904 the previous function ends with an about_to_return insn. Not foolproof by
905 any means, since gcc is happy to put the epilogue in the middle of a
906 function. But we're guessing anyway... */
c906108c 907
d2427a71
RH
908static CORE_ADDR
909alpha_heuristic_proc_start (CORE_ADDR pc)
910{
911 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
912 CORE_ADDR last_non_nop = pc;
913 CORE_ADDR fence = pc - heuristic_fence_post;
914 CORE_ADDR orig_pc = pc;
fbe586ae 915 CORE_ADDR func;
9e0b60a8 916
d2427a71
RH
917 if (pc == 0)
918 return 0;
9e0b60a8 919
fbe586ae
RH
920 /* First see if we can find the start of the function from minimal
921 symbol information. This can succeed with a binary that doesn't
922 have debug info, but hasn't been stripped. */
923 func = get_pc_function_start (pc);
924 if (func)
925 return func;
926
d2427a71
RH
927 if (heuristic_fence_post == UINT_MAX
928 || fence < tdep->vm_min_address)
929 fence = tdep->vm_min_address;
c906108c 930
d2427a71
RH
931 /* Search back for previous return; also stop at a 0, which might be
932 seen for instance before the start of a code section. Don't include
933 nops, since this usually indicates padding between functions. */
934 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 935 {
d2427a71
RH
936 unsigned int insn = alpha_read_insn (pc);
937 switch (insn)
c906108c 938 {
d2427a71
RH
939 case 0: /* invalid insn */
940 case 0x6bfa8001: /* ret $31,($26),1 */
941 return last_non_nop;
942
943 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
944 case 0x47ff041f: /* nop: bis $31,$31,$31 */
945 break;
946
947 default:
948 last_non_nop = pc;
949 break;
c906108c 950 }
d2427a71 951 }
c906108c 952
d2427a71
RH
953 /* It's not clear to me why we reach this point when stopping quietly,
954 but with this test, at least we don't print out warnings for every
955 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
956 if (stop_soon == NO_STOP_QUIETLY)
957 {
958 static int blurb_printed = 0;
c906108c 959
d2427a71
RH
960 if (fence == tdep->vm_min_address)
961 warning ("Hit beginning of text section without finding");
c906108c 962 else
d2427a71
RH
963 warning ("Hit heuristic-fence-post without finding");
964 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 965
d2427a71
RH
966 if (!blurb_printed)
967 {
968 printf_filtered ("\
969This warning occurs if you are debugging a function without any symbols\n\
970(for example, in a stripped executable). In that case, you may wish to\n\
971increase the size of the search with the `set heuristic-fence-post' command.\n\
972\n\
973Otherwise, you told GDB there was a function where there isn't one, or\n\
974(more likely) you have encountered a bug in GDB.\n");
975 blurb_printed = 1;
976 }
977 }
c906108c 978
d2427a71
RH
979 return 0;
980}
c906108c 981
fbe586ae 982static struct alpha_heuristic_unwind_cache *
d2427a71
RH
983alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
984 void **this_prologue_cache,
985 CORE_ADDR start_pc)
986{
987 struct alpha_heuristic_unwind_cache *info;
988 ULONGEST val;
989 CORE_ADDR limit_pc, cur_pc;
990 int frame_reg, frame_size, return_reg, reg;
c906108c 991
d2427a71
RH
992 if (*this_prologue_cache)
993 return *this_prologue_cache;
c906108c 994
d2427a71
RH
995 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
996 *this_prologue_cache = info;
997 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 998
d2427a71
RH
999 limit_pc = frame_pc_unwind (next_frame);
1000 if (start_pc == 0)
1001 start_pc = alpha_heuristic_proc_start (limit_pc);
1002 info->start_pc = start_pc;
c906108c 1003
d2427a71
RH
1004 frame_reg = ALPHA_SP_REGNUM;
1005 frame_size = 0;
1006 return_reg = -1;
c906108c 1007
d2427a71
RH
1008 /* If we've identified a likely place to start, do code scanning. */
1009 if (start_pc != 0)
c5aa993b 1010 {
d2427a71
RH
1011 /* Limit the forward search to 50 instructions. */
1012 if (start_pc + 200 < limit_pc)
1013 limit_pc = start_pc + 200;
c5aa993b 1014
d2427a71
RH
1015 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
1016 {
1017 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1018
d2427a71
RH
1019 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1020 {
1021 if (word & 0x8000)
1022 {
1023 /* Consider only the first stack allocation instruction
1024 to contain the static size of the frame. */
1025 if (frame_size == 0)
1026 frame_size = (-word) & 0xffff;
1027 }
1028 else
1029 {
1030 /* Exit loop if a positive stack adjustment is found, which
1031 usually means that the stack cleanup code in the function
1032 epilogue is reached. */
1033 break;
1034 }
1035 }
1036 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1037 {
1038 reg = (word & 0x03e00000) >> 21;
1039
d15bfd3a
AC
1040 /* Ignore this instruction if we have already encountered
1041 an instruction saving the same register earlier in the
1042 function code. The current instruction does not tell
1043 us where the original value upon function entry is saved.
1044 All it says is that the function we are scanning reused
1045 that register for some computation of its own, and is now
1046 saving its result. */
1047 if (info->saved_regs[reg])
1048 continue;
1049
d2427a71
RH
1050 if (reg == 31)
1051 continue;
1052
1053 /* Do not compute the address where the register was saved yet,
1054 because we don't know yet if the offset will need to be
1055 relative to $sp or $fp (we can not compute the address
1056 relative to $sp if $sp is updated during the execution of
1057 the current subroutine, for instance when doing some alloca).
1058 So just store the offset for the moment, and compute the
1059 address later when we know whether this frame has a frame
1060 pointer or not. */
1061 /* Hack: temporarily add one, so that the offset is non-zero
1062 and we can tell which registers have save offsets below. */
1063 info->saved_regs[reg] = (word & 0xffff) + 1;
1064
1065 /* Starting with OSF/1-3.2C, the system libraries are shipped
1066 without local symbols, but they still contain procedure
1067 descriptors without a symbol reference. GDB is currently
1068 unable to find these procedure descriptors and uses
1069 heuristic_proc_desc instead.
1070 As some low level compiler support routines (__div*, __add*)
1071 use a non-standard return address register, we have to
1072 add some heuristics to determine the return address register,
1073 or stepping over these routines will fail.
1074 Usually the return address register is the first register
1075 saved on the stack, but assembler optimization might
1076 rearrange the register saves.
1077 So we recognize only a few registers (t7, t9, ra) within
1078 the procedure prologue as valid return address registers.
1079 If we encounter a return instruction, we extract the
1080 the return address register from it.
1081
1082 FIXME: Rewriting GDB to access the procedure descriptors,
1083 e.g. via the minimal symbol table, might obviate this hack. */
1084 if (return_reg == -1
1085 && cur_pc < (start_pc + 80)
1086 && (reg == ALPHA_T7_REGNUM
1087 || reg == ALPHA_T9_REGNUM
1088 || reg == ALPHA_RA_REGNUM))
1089 return_reg = reg;
1090 }
1091 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1092 return_reg = (word >> 16) & 0x1f;
1093 else if (word == 0x47de040f) /* bis sp,sp,fp */
1094 frame_reg = ALPHA_GCC_FP_REGNUM;
1095 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1096 frame_reg = ALPHA_GCC_FP_REGNUM;
1097 }
c5aa993b 1098
d2427a71
RH
1099 /* If we haven't found a valid return address register yet, keep
1100 searching in the procedure prologue. */
1101 if (return_reg == -1)
1102 {
1103 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1104 {
1105 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1106
d2427a71
RH
1107 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1108 {
1109 reg = (word & 0x03e00000) >> 21;
1110 if (reg == ALPHA_T7_REGNUM
1111 || reg == ALPHA_T9_REGNUM
1112 || reg == ALPHA_RA_REGNUM)
1113 {
1114 return_reg = reg;
1115 break;
1116 }
1117 }
1118 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1119 {
1120 return_reg = (word >> 16) & 0x1f;
1121 break;
1122 }
85b32d22
RH
1123
1124 cur_pc += 4;
d2427a71
RH
1125 }
1126 }
c906108c 1127 }
c906108c 1128
d2427a71
RH
1129 /* Failing that, do default to the customary RA. */
1130 if (return_reg == -1)
1131 return_reg = ALPHA_RA_REGNUM;
1132 info->return_reg = return_reg;
f8453e34 1133
d2427a71
RH
1134 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1135 info->vfp = val + frame_size;
c906108c 1136
d2427a71
RH
1137 /* Convert offsets to absolute addresses. See above about adding
1138 one to the offsets to make all detected offsets non-zero. */
1139 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1140 if (info->saved_regs[reg])
1141 info->saved_regs[reg] += val - 1;
1142
1143 return info;
c906108c 1144}
c906108c 1145
d2427a71
RH
1146/* Given a GDB frame, determine the address of the calling function's
1147 frame. This will be used to create a new GDB frame struct. */
1148
fbe586ae 1149static void
d2427a71
RH
1150alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1151 void **this_prologue_cache,
1152 struct frame_id *this_id)
c906108c 1153{
d2427a71
RH
1154 struct alpha_heuristic_unwind_cache *info
1155 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1156
d2427a71 1157 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1158}
1159
d2427a71
RH
1160/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1161
fbe586ae 1162static void
d2427a71
RH
1163alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1164 void **this_prologue_cache,
1165 int regnum, int *optimizedp,
1166 enum lval_type *lvalp, CORE_ADDR *addrp,
1167 int *realnump, void *bufferp)
c906108c 1168{
d2427a71
RH
1169 struct alpha_heuristic_unwind_cache *info
1170 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1171
1172 /* The PC of the previous frame is stored in the link register of
1173 the current frame. Frob regnum so that we pull the value from
1174 the correct place. */
1175 if (regnum == ALPHA_PC_REGNUM)
1176 regnum = info->return_reg;
1177
1178 /* For all registers known to be saved in the current frame,
1179 do the obvious and pull the value out. */
1180 if (info->saved_regs[regnum])
c906108c 1181 {
d2427a71
RH
1182 *optimizedp = 0;
1183 *lvalp = lval_memory;
1184 *addrp = info->saved_regs[regnum];
1185 *realnump = -1;
1186 if (bufferp != NULL)
b21fd293 1187 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1188 return;
1189 }
1190
d2427a71
RH
1191 /* The stack pointer of the previous frame is computed by popping
1192 the current stack frame. */
1193 if (regnum == ALPHA_SP_REGNUM)
c906108c 1194 {
d2427a71
RH
1195 *optimizedp = 0;
1196 *lvalp = not_lval;
1197 *addrp = 0;
1198 *realnump = -1;
1199 if (bufferp != NULL)
1200 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1201 return;
c906108c 1202 }
95b80706 1203
d2427a71
RH
1204 /* Otherwise assume the next frame has the same register value. */
1205 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1206 realnump, bufferp);
95b80706
JT
1207}
1208
d2427a71
RH
1209static const struct frame_unwind alpha_heuristic_frame_unwind = {
1210 NORMAL_FRAME,
1211 alpha_heuristic_frame_this_id,
1212 alpha_heuristic_frame_prev_register
1213};
c906108c 1214
d2427a71 1215static const struct frame_unwind *
336d1bba 1216alpha_heuristic_frame_sniffer (struct frame_info *next_frame)
c906108c 1217{
d2427a71 1218 return &alpha_heuristic_frame_unwind;
c906108c
SS
1219}
1220
fbe586ae 1221static CORE_ADDR
d2427a71
RH
1222alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1223 void **this_prologue_cache)
c906108c 1224{
d2427a71
RH
1225 struct alpha_heuristic_unwind_cache *info
1226 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1227
d2427a71 1228 return info->vfp;
c906108c
SS
1229}
1230
d2427a71
RH
1231static const struct frame_base alpha_heuristic_frame_base = {
1232 &alpha_heuristic_frame_unwind,
1233 alpha_heuristic_frame_base_address,
1234 alpha_heuristic_frame_base_address,
1235 alpha_heuristic_frame_base_address
1236};
1237
c906108c 1238/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1239 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1240
1241static void
fba45db2 1242reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1243{
1244 reinit_frame_cache ();
1245}
1246
d2427a71
RH
1247\f
1248/* ALPHA stack frames are almost impenetrable. When execution stops,
1249 we basically have to look at symbol information for the function
1250 that we stopped in, which tells us *which* register (if any) is
1251 the base of the frame pointer, and what offset from that register
1252 the frame itself is at.
c906108c 1253
d2427a71
RH
1254 This presents a problem when trying to examine a stack in memory
1255 (that isn't executing at the moment), using the "frame" command. We
1256 don't have a PC, nor do we have any registers except SP.
c906108c 1257
d2427a71
RH
1258 This routine takes two arguments, SP and PC, and tries to make the
1259 cached frames look as if these two arguments defined a frame on the
1260 cache. This allows the rest of info frame to extract the important
1261 arguments without difficulty. */
ec32e4be 1262
d2427a71
RH
1263struct frame_info *
1264alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1265{
d2427a71
RH
1266 if (argc != 2)
1267 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1268
d2427a71 1269 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1270}
1271
d2427a71
RH
1272/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1273 dummy frame. The frame ID's base needs to match the TOS value
1274 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1275 breakpoint. */
d734c450 1276
d2427a71
RH
1277static struct frame_id
1278alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1279{
d2427a71
RH
1280 ULONGEST base;
1281 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1282 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1283}
1284
dc129d82 1285static CORE_ADDR
d2427a71 1286alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1287{
d2427a71
RH
1288 ULONGEST pc;
1289 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1290 return pc;
accc6d1f
JT
1291}
1292
98a8e1e5
RH
1293\f
1294/* Helper routines for alpha*-nat.c files to move register sets to and
1295 from core files. The UNIQUE pointer is allowed to be NULL, as most
1296 targets don't supply this value in their core files. */
1297
1298void
1299alpha_supply_int_regs (int regno, const void *r0_r30,
1300 const void *pc, const void *unique)
1301{
1302 int i;
1303
1304 for (i = 0; i < 31; ++i)
1305 if (regno == i || regno == -1)
23a6d369 1306 regcache_raw_supply (current_regcache, i, (const char *)r0_r30 + i*8);
98a8e1e5
RH
1307
1308 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
23a6d369 1309 regcache_raw_supply (current_regcache, ALPHA_ZERO_REGNUM, NULL);
98a8e1e5
RH
1310
1311 if (regno == ALPHA_PC_REGNUM || regno == -1)
23a6d369 1312 regcache_raw_supply (current_regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1313
1314 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
23a6d369 1315 regcache_raw_supply (current_regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1316}
1317
1318void
1319alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique)
1320{
1321 int i;
1322
1323 for (i = 0; i < 31; ++i)
1324 if (regno == i || regno == -1)
822c9732 1325 regcache_raw_collect (current_regcache, i, (char *)r0_r30 + i*8);
98a8e1e5
RH
1326
1327 if (regno == ALPHA_PC_REGNUM || regno == -1)
822c9732 1328 regcache_raw_collect (current_regcache, ALPHA_PC_REGNUM, pc);
98a8e1e5
RH
1329
1330 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
822c9732 1331 regcache_raw_collect (current_regcache, ALPHA_UNIQUE_REGNUM, unique);
98a8e1e5
RH
1332}
1333
1334void
1335alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr)
1336{
1337 int i;
1338
1339 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1340 if (regno == i || regno == -1)
23a6d369
AC
1341 regcache_raw_supply (current_regcache, i,
1342 (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1343
1344 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
23a6d369 1345 regcache_raw_supply (current_regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1346}
1347
1348void
1349alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr)
1350{
1351 int i;
1352
1353 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1354 if (regno == i || regno == -1)
822c9732
AC
1355 regcache_raw_collect (current_regcache, i,
1356 (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
98a8e1e5
RH
1357
1358 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
822c9732 1359 regcache_raw_collect (current_regcache, ALPHA_FPCR_REGNUM, fpcr);
98a8e1e5
RH
1360}
1361
d2427a71 1362\f
ec32e4be
JT
1363/* alpha_software_single_step() is called just before we want to resume
1364 the inferior, if we want to single-step it but there is no hardware
1365 or kernel single-step support (NetBSD on Alpha, for example). We find
1366 the target of the coming instruction and breakpoint it.
1367
1368 single_step is also called just after the inferior stops. If we had
1369 set up a simulated single-step, we undo our damage. */
1370
1371static CORE_ADDR
1372alpha_next_pc (CORE_ADDR pc)
1373{
1374 unsigned int insn;
1375 unsigned int op;
1376 int offset;
1377 LONGEST rav;
1378
b21fd293 1379 insn = alpha_read_insn (pc);
ec32e4be
JT
1380
1381 /* Opcode is top 6 bits. */
1382 op = (insn >> 26) & 0x3f;
1383
1384 if (op == 0x1a)
1385 {
1386 /* Jump format: target PC is:
1387 RB & ~3 */
1388 return (read_register ((insn >> 16) & 0x1f) & ~3);
1389 }
1390
1391 if ((op & 0x30) == 0x30)
1392 {
1393 /* Branch format: target PC is:
1394 (new PC) + (4 * sext(displacement)) */
1395 if (op == 0x30 || /* BR */
1396 op == 0x34) /* BSR */
1397 {
1398 branch_taken:
1399 offset = (insn & 0x001fffff);
1400 if (offset & 0x00100000)
1401 offset |= 0xffe00000;
1402 offset *= 4;
1403 return (pc + 4 + offset);
1404 }
1405
1406 /* Need to determine if branch is taken; read RA. */
1407 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1408 switch (op)
1409 {
1410 case 0x38: /* BLBC */
1411 if ((rav & 1) == 0)
1412 goto branch_taken;
1413 break;
1414 case 0x3c: /* BLBS */
1415 if (rav & 1)
1416 goto branch_taken;
1417 break;
1418 case 0x39: /* BEQ */
1419 if (rav == 0)
1420 goto branch_taken;
1421 break;
1422 case 0x3d: /* BNE */
1423 if (rav != 0)
1424 goto branch_taken;
1425 break;
1426 case 0x3a: /* BLT */
1427 if (rav < 0)
1428 goto branch_taken;
1429 break;
1430 case 0x3b: /* BLE */
1431 if (rav <= 0)
1432 goto branch_taken;
1433 break;
1434 case 0x3f: /* BGT */
1435 if (rav > 0)
1436 goto branch_taken;
1437 break;
1438 case 0x3e: /* BGE */
1439 if (rav >= 0)
1440 goto branch_taken;
1441 break;
d2427a71
RH
1442
1443 /* ??? Missing floating-point branches. */
ec32e4be
JT
1444 }
1445 }
1446
1447 /* Not a branch or branch not taken; target PC is:
1448 pc + 4 */
1449 return (pc + 4);
1450}
1451
1452void
1453alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1454{
1455 static CORE_ADDR next_pc;
1456 typedef char binsn_quantum[BREAKPOINT_MAX];
1457 static binsn_quantum break_mem;
1458 CORE_ADDR pc;
1459
1460 if (insert_breakpoints_p)
1461 {
1462 pc = read_pc ();
1463 next_pc = alpha_next_pc (pc);
1464
1465 target_insert_breakpoint (next_pc, break_mem);
1466 }
1467 else
1468 {
1469 target_remove_breakpoint (next_pc, break_mem);
1470 write_pc (next_pc);
1471 }
c906108c
SS
1472}
1473
dc129d82 1474\f
dc129d82
JT
1475/* Initialize the current architecture based on INFO. If possible, re-use an
1476 architecture from ARCHES, which is a list of architectures already created
1477 during this debugging session.
1478
1479 Called e.g. at program startup, when reading a core file, and when reading
1480 a binary file. */
1481
1482static struct gdbarch *
1483alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1484{
1485 struct gdbarch_tdep *tdep;
1486 struct gdbarch *gdbarch;
dc129d82
JT
1487
1488 /* Try to determine the ABI of the object we are loading. */
4be87837 1489 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1490 {
4be87837
DJ
1491 /* If it's an ECOFF file, assume it's OSF/1. */
1492 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1493 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1494 }
1495
1496 /* Find a candidate among extant architectures. */
4be87837
DJ
1497 arches = gdbarch_list_lookup_by_info (arches, &info);
1498 if (arches != NULL)
1499 return arches->gdbarch;
dc129d82
JT
1500
1501 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1502 gdbarch = gdbarch_alloc (&info, tdep);
1503
d2427a71
RH
1504 /* Lowest text address. This is used by heuristic_proc_start()
1505 to decide when to stop looking. */
594706e6 1506 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
d9b023cc 1507
36a6271d 1508 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1509 tdep->sigcontext_addr = NULL;
138e7be5
MK
1510 tdep->sc_pc_offset = 2 * 8;
1511 tdep->sc_regs_offset = 4 * 8;
1512 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
36a6271d 1513
accc6d1f
JT
1514 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1515
dc129d82
JT
1516 /* Type sizes */
1517 set_gdbarch_short_bit (gdbarch, 16);
1518 set_gdbarch_int_bit (gdbarch, 32);
1519 set_gdbarch_long_bit (gdbarch, 64);
1520 set_gdbarch_long_long_bit (gdbarch, 64);
1521 set_gdbarch_float_bit (gdbarch, 32);
1522 set_gdbarch_double_bit (gdbarch, 64);
1523 set_gdbarch_long_double_bit (gdbarch, 64);
1524 set_gdbarch_ptr_bit (gdbarch, 64);
1525
1526 /* Register info */
1527 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1528 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1529 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1530 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1531
1532 set_gdbarch_register_name (gdbarch, alpha_register_name);
9c04cab7
AC
1533 set_gdbarch_deprecated_register_byte (gdbarch, alpha_register_byte);
1534 set_gdbarch_deprecated_register_raw_size (gdbarch, alpha_register_raw_size);
1535 set_gdbarch_deprecated_register_virtual_size (gdbarch, alpha_register_virtual_size);
c483c494 1536 set_gdbarch_register_type (gdbarch, alpha_register_type);
dc129d82
JT
1537
1538 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1539 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1540
c483c494
RH
1541 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1542 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1543 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
dc129d82 1544
615967cb
RH
1545 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1546
d2427a71 1547 /* Prologue heuristics. */
dc129d82
JT
1548 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1549
5ef165c2
RH
1550 /* Disassembler. */
1551 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1552
d2427a71 1553 /* Call info. */
dc129d82 1554
b5622e8d 1555 set_gdbarch_deprecated_use_struct_convention (gdbarch, always_use_struct_convention);
5ec2bb99
RH
1556 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value);
1557 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value);
74055713 1558 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, alpha_extract_struct_value_address);
dc129d82
JT
1559
1560 /* Settings for calling functions in the inferior. */
c88e30c0 1561 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1562
1563 /* Methods for saving / extracting a dummy frame's ID. */
1564 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
d2427a71
RH
1565
1566 /* Return the unwound PC value. */
1567 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1568
1569 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1570 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1571
95b80706 1572 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1573 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706 1574
44dffaac 1575 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1576 gdbarch_init_osabi (info, gdbarch);
44dffaac 1577
accc6d1f
JT
1578 /* Now that we have tuned the configuration, set a few final things
1579 based on what the OS ABI has told us. */
1580
1581 if (tdep->jb_pc >= 0)
1582 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1583
336d1bba
AC
1584 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer);
1585 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer);
dc129d82 1586
d2427a71 1587 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1588
d2427a71 1589 return gdbarch;
dc129d82
JT
1590}
1591
baa490c4
RH
1592void
1593alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1594{
336d1bba
AC
1595 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1596 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
baa490c4
RH
1597}
1598
a78f21af
AC
1599extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1600
c906108c 1601void
fba45db2 1602_initialize_alpha_tdep (void)
c906108c
SS
1603{
1604 struct cmd_list_element *c;
1605
d2427a71 1606 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1607
1608 /* Let the user set the fence post for heuristic_proc_start. */
1609
1610 /* We really would like to have both "0" and "unlimited" work, but
1611 command.c doesn't deal with that. So make it a var_zinteger
1612 because the user can always use "999999" or some such for unlimited. */
1613 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1614 (char *) &heuristic_fence_post,
1615 "\
1616Set the distance searched for the start of a function.\n\
1617If you are debugging a stripped executable, GDB needs to search through the\n\
1618program for the start of a function. This command sets the distance of the\n\
1619search. The only need to set it is when debugging a stripped executable.",
1620 &setlist);
1621 /* We need to throw away the frame cache when we set this, since it
1622 might change our ability to get backtraces. */
9f60d481 1623 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1624 add_show_from_set (c, &showlist);
1625}
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