Commit | Line | Data |
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c906108c | 1 | /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. |
1e698235 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
b6ba6518 | 3 | Free Software Foundation, Inc. |
c906108c | 4 | |
c5aa993b | 5 | This file is part of GDB. |
c906108c | 6 | |
c5aa993b JM |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
c906108c | 11 | |
c5aa993b JM |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
c906108c | 16 | |
c5aa993b JM |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
21 | |
22 | #include "defs.h" | |
615967cb | 23 | #include "doublest.h" |
c906108c | 24 | #include "frame.h" |
d2427a71 RH |
25 | #include "frame-unwind.h" |
26 | #include "frame-base.h" | |
baa490c4 | 27 | #include "dwarf2-frame.h" |
c906108c SS |
28 | #include "inferior.h" |
29 | #include "symtab.h" | |
30 | #include "value.h" | |
31 | #include "gdbcmd.h" | |
32 | #include "gdbcore.h" | |
33 | #include "dis-asm.h" | |
34 | #include "symfile.h" | |
35 | #include "objfiles.h" | |
36 | #include "gdb_string.h" | |
c5f0f3d0 | 37 | #include "linespec.h" |
4e052eda | 38 | #include "regcache.h" |
615967cb | 39 | #include "reggroups.h" |
dc129d82 | 40 | #include "arch-utils.h" |
4be87837 | 41 | #include "osabi.h" |
fe898f56 | 42 | #include "block.h" |
dc129d82 JT |
43 | |
44 | #include "elf-bfd.h" | |
45 | ||
46 | #include "alpha-tdep.h" | |
47 | ||
c906108c | 48 | \f |
fa88f677 | 49 | static const char * |
636a6dfc JT |
50 | alpha_register_name (int regno) |
51 | { | |
5ab84872 | 52 | static const char * const register_names[] = |
636a6dfc JT |
53 | { |
54 | "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", | |
55 | "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", | |
56 | "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", | |
57 | "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", | |
58 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
59 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
60 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
61 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", | |
44d88583 | 62 | "pc", "", "unique" |
636a6dfc JT |
63 | }; |
64 | ||
65 | if (regno < 0) | |
5ab84872 | 66 | return NULL; |
636a6dfc | 67 | if (regno >= (sizeof(register_names) / sizeof(*register_names))) |
5ab84872 RH |
68 | return NULL; |
69 | return register_names[regno]; | |
636a6dfc | 70 | } |
d734c450 | 71 | |
dc129d82 | 72 | static int |
d734c450 JT |
73 | alpha_cannot_fetch_register (int regno) |
74 | { | |
44d88583 | 75 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
76 | } |
77 | ||
dc129d82 | 78 | static int |
d734c450 JT |
79 | alpha_cannot_store_register (int regno) |
80 | { | |
44d88583 | 81 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
82 | } |
83 | ||
dc129d82 | 84 | static struct type * |
c483c494 | 85 | alpha_register_type (struct gdbarch *gdbarch, int regno) |
0d056799 | 86 | { |
72667056 RH |
87 | if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) |
88 | return builtin_type_void_data_ptr; | |
89 | if (regno == ALPHA_PC_REGNUM) | |
90 | return builtin_type_void_func_ptr; | |
91 | ||
92 | /* Don't need to worry about little vs big endian until | |
93 | some jerk tries to port to alpha-unicosmk. */ | |
b38b6be2 | 94 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) |
72667056 RH |
95 | return builtin_type_ieee_double_little; |
96 | ||
97 | return builtin_type_int64; | |
0d056799 | 98 | } |
f8453e34 | 99 | |
615967cb RH |
100 | /* Is REGNUM a member of REGGROUP? */ |
101 | ||
102 | static int | |
103 | alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
104 | struct reggroup *group) | |
105 | { | |
106 | /* Filter out any registers eliminated, but whose regnum is | |
107 | reserved for backward compatibility, e.g. the vfp. */ | |
108 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') | |
109 | return 0; | |
110 | ||
df4a182b RH |
111 | if (group == all_reggroup) |
112 | return 1; | |
113 | ||
114 | /* Zero should not be saved or restored. Technically it is a general | |
115 | register (just as $f31 would be a float if we represented it), but | |
116 | there's no point displaying it during "info regs", so leave it out | |
117 | of all groups except for "all". */ | |
118 | if (regnum == ALPHA_ZERO_REGNUM) | |
119 | return 0; | |
120 | ||
121 | /* All other registers are saved and restored. */ | |
122 | if (group == save_reggroup || group == restore_reggroup) | |
615967cb RH |
123 | return 1; |
124 | ||
125 | /* All other groups are non-overlapping. */ | |
126 | ||
127 | /* Since this is really a PALcode memory slot... */ | |
128 | if (regnum == ALPHA_UNIQUE_REGNUM) | |
129 | return group == system_reggroup; | |
130 | ||
131 | /* Force the FPCR to be considered part of the floating point state. */ | |
132 | if (regnum == ALPHA_FPCR_REGNUM) | |
133 | return group == float_reggroup; | |
134 | ||
135 | if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) | |
136 | return group == float_reggroup; | |
137 | else | |
138 | return group == general_reggroup; | |
139 | } | |
140 | ||
dc129d82 | 141 | static int |
f8453e34 JT |
142 | alpha_register_byte (int regno) |
143 | { | |
144 | return (regno * 8); | |
145 | } | |
146 | ||
dc129d82 | 147 | static int |
f8453e34 JT |
148 | alpha_register_raw_size (int regno) |
149 | { | |
150 | return 8; | |
151 | } | |
152 | ||
dc129d82 | 153 | static int |
f8453e34 JT |
154 | alpha_register_virtual_size (int regno) |
155 | { | |
156 | return 8; | |
157 | } | |
636a6dfc | 158 | |
c483c494 RH |
159 | /* The following represents exactly the conversion performed by |
160 | the LDS instruction. This applies to both single-precision | |
161 | floating point and 32-bit integers. */ | |
162 | ||
163 | static void | |
164 | alpha_lds (void *out, const void *in) | |
165 | { | |
166 | ULONGEST mem = extract_unsigned_integer (in, 4); | |
167 | ULONGEST frac = (mem >> 0) & 0x7fffff; | |
168 | ULONGEST sign = (mem >> 31) & 1; | |
169 | ULONGEST exp_msb = (mem >> 30) & 1; | |
170 | ULONGEST exp_low = (mem >> 23) & 0x7f; | |
171 | ULONGEST exp, reg; | |
172 | ||
173 | exp = (exp_msb << 10) | exp_low; | |
174 | if (exp_msb) | |
175 | { | |
176 | if (exp_low == 0x7f) | |
177 | exp = 0x7ff; | |
178 | } | |
179 | else | |
180 | { | |
181 | if (exp_low != 0x00) | |
182 | exp |= 0x380; | |
183 | } | |
184 | ||
185 | reg = (sign << 63) | (exp << 52) | (frac << 29); | |
186 | store_unsigned_integer (out, 8, reg); | |
187 | } | |
188 | ||
189 | /* Similarly, this represents exactly the conversion performed by | |
190 | the STS instruction. */ | |
191 | ||
192 | static inline void | |
193 | alpha_sts (void *out, const void *in) | |
194 | { | |
195 | ULONGEST reg, mem; | |
196 | ||
197 | reg = extract_unsigned_integer (in, 8); | |
198 | mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); | |
199 | store_unsigned_integer (out, 4, mem); | |
200 | } | |
201 | ||
d2427a71 RH |
202 | /* The alpha needs a conversion between register and memory format if the |
203 | register is a floating point register and memory format is float, as the | |
204 | register format must be double or memory format is an integer with 4 | |
205 | bytes or less, as the representation of integers in floating point | |
206 | registers is different. */ | |
207 | ||
c483c494 RH |
208 | static int |
209 | alpha_convert_register_p (int regno) | |
14696584 | 210 | { |
c483c494 | 211 | return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31); |
14696584 RH |
212 | } |
213 | ||
d2427a71 | 214 | static void |
c483c494 | 215 | alpha_register_to_value (int regnum, struct type *valtype, char *in, char *out) |
5868c862 | 216 | { |
c483c494 | 217 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 218 | { |
c483c494 RH |
219 | case 4: |
220 | alpha_sts (out, in); | |
221 | break; | |
222 | case 8: | |
223 | memcpy (out, in, 8); | |
224 | break; | |
225 | default: | |
226 | error ("Cannot retrieve value from floating point register"); | |
d2427a71 | 227 | } |
d2427a71 | 228 | } |
5868c862 | 229 | |
d2427a71 | 230 | static void |
c483c494 | 231 | alpha_value_to_register (struct type *valtype, int regnum, char *in, char *out) |
d2427a71 | 232 | { |
c483c494 | 233 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 234 | { |
c483c494 RH |
235 | case 4: |
236 | alpha_lds (out, in); | |
237 | break; | |
238 | case 8: | |
239 | memcpy (out, in, 8); | |
240 | break; | |
241 | default: | |
242 | error ("Cannot store value in floating point register"); | |
d2427a71 | 243 | } |
5868c862 JT |
244 | } |
245 | ||
d2427a71 RH |
246 | \f |
247 | /* The alpha passes the first six arguments in the registers, the rest on | |
c88e30c0 RH |
248 | the stack. The register arguments are stored in ARG_REG_BUFFER, and |
249 | then moved into the register file; this simplifies the passing of a | |
250 | large struct which extends from the registers to the stack, plus avoids | |
251 | three ptrace invocations per word. | |
252 | ||
253 | We don't bother tracking which register values should go in integer | |
254 | regs or fp regs; we load the same values into both. | |
255 | ||
d2427a71 RH |
256 | If the called function is returning a structure, the address of the |
257 | structure to be returned is passed as a hidden first argument. */ | |
c906108c | 258 | |
d2427a71 | 259 | static CORE_ADDR |
c88e30c0 RH |
260 | alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
261 | struct regcache *regcache, CORE_ADDR bp_addr, | |
262 | int nargs, struct value **args, CORE_ADDR sp, | |
263 | int struct_return, CORE_ADDR struct_addr) | |
c906108c | 264 | { |
d2427a71 RH |
265 | int i; |
266 | int accumulate_size = struct_return ? 8 : 0; | |
d2427a71 | 267 | struct alpha_arg |
c906108c | 268 | { |
d2427a71 RH |
269 | char *contents; |
270 | int len; | |
271 | int offset; | |
272 | }; | |
c88e30c0 RH |
273 | struct alpha_arg *alpha_args |
274 | = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); | |
d2427a71 | 275 | register struct alpha_arg *m_arg; |
c88e30c0 | 276 | char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; |
d2427a71 | 277 | int required_arg_regs; |
c906108c | 278 | |
c88e30c0 RH |
279 | /* The ABI places the address of the called function in T12. */ |
280 | regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); | |
281 | ||
282 | /* Set the return address register to point to the entry point | |
283 | of the program, where a breakpoint lies in wait. */ | |
284 | regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); | |
285 | ||
286 | /* Lay out the arguments in memory. */ | |
d2427a71 RH |
287 | for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) |
288 | { | |
289 | struct value *arg = args[i]; | |
290 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
c88e30c0 | 291 | |
d2427a71 RH |
292 | /* Cast argument to long if necessary as the compiler does it too. */ |
293 | switch (TYPE_CODE (arg_type)) | |
c906108c | 294 | { |
d2427a71 RH |
295 | case TYPE_CODE_INT: |
296 | case TYPE_CODE_BOOL: | |
297 | case TYPE_CODE_CHAR: | |
298 | case TYPE_CODE_RANGE: | |
299 | case TYPE_CODE_ENUM: | |
0ede8eca | 300 | if (TYPE_LENGTH (arg_type) == 4) |
d2427a71 | 301 | { |
0ede8eca RH |
302 | /* 32-bit values must be sign-extended to 64 bits |
303 | even if the base data type is unsigned. */ | |
304 | arg_type = builtin_type_int32; | |
305 | arg = value_cast (arg_type, arg); | |
306 | } | |
307 | if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) | |
308 | { | |
309 | arg_type = builtin_type_int64; | |
d2427a71 RH |
310 | arg = value_cast (arg_type, arg); |
311 | } | |
312 | break; | |
7b5e1cb3 | 313 | |
c88e30c0 RH |
314 | case TYPE_CODE_FLT: |
315 | /* "float" arguments loaded in registers must be passed in | |
316 | register format, aka "double". */ | |
317 | if (accumulate_size < sizeof (arg_reg_buffer) | |
318 | && TYPE_LENGTH (arg_type) == 4) | |
319 | { | |
eb4edb88 | 320 | arg_type = builtin_type_ieee_double_little; |
c88e30c0 RH |
321 | arg = value_cast (arg_type, arg); |
322 | } | |
323 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
324 | invisible reference. No one else uses this data type. */ | |
325 | else if (TYPE_LENGTH (arg_type) == 16) | |
326 | { | |
327 | /* Allocate aligned storage. */ | |
328 | sp = (sp & -16) - 16; | |
329 | ||
330 | /* Write the real data into the stack. */ | |
331 | write_memory (sp, VALUE_CONTENTS (arg), 16); | |
332 | ||
333 | /* Construct the indirection. */ | |
334 | arg_type = lookup_pointer_type (arg_type); | |
335 | arg = value_from_pointer (arg_type, sp); | |
336 | } | |
337 | break; | |
7b5e1cb3 RH |
338 | |
339 | case TYPE_CODE_COMPLEX: | |
340 | /* ??? The ABI says that complex values are passed as two | |
341 | separate scalar values. This distinction only matters | |
342 | for complex float. However, GCC does not implement this. */ | |
343 | ||
344 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
345 | invisible reference. */ | |
346 | if (TYPE_LENGTH (arg_type) == 32) | |
347 | { | |
348 | /* Allocate aligned storage. */ | |
349 | sp = (sp & -16) - 16; | |
350 | ||
351 | /* Write the real data into the stack. */ | |
352 | write_memory (sp, VALUE_CONTENTS (arg), 32); | |
353 | ||
354 | /* Construct the indirection. */ | |
355 | arg_type = lookup_pointer_type (arg_type); | |
356 | arg = value_from_pointer (arg_type, sp); | |
357 | } | |
358 | break; | |
359 | ||
d2427a71 RH |
360 | default: |
361 | break; | |
c906108c | 362 | } |
d2427a71 RH |
363 | m_arg->len = TYPE_LENGTH (arg_type); |
364 | m_arg->offset = accumulate_size; | |
365 | accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; | |
366 | m_arg->contents = VALUE_CONTENTS (arg); | |
c906108c SS |
367 | } |
368 | ||
d2427a71 RH |
369 | /* Determine required argument register loads, loading an argument register |
370 | is expensive as it uses three ptrace calls. */ | |
371 | required_arg_regs = accumulate_size / 8; | |
372 | if (required_arg_regs > ALPHA_NUM_ARG_REGS) | |
373 | required_arg_regs = ALPHA_NUM_ARG_REGS; | |
c906108c | 374 | |
d2427a71 | 375 | /* Make room for the arguments on the stack. */ |
c88e30c0 RH |
376 | if (accumulate_size < sizeof(arg_reg_buffer)) |
377 | accumulate_size = 0; | |
378 | else | |
379 | accumulate_size -= sizeof(arg_reg_buffer); | |
d2427a71 | 380 | sp -= accumulate_size; |
c906108c | 381 | |
c88e30c0 | 382 | /* Keep sp aligned to a multiple of 16 as the ABI requires. */ |
d2427a71 | 383 | sp &= ~15; |
c906108c | 384 | |
d2427a71 RH |
385 | /* `Push' arguments on the stack. */ |
386 | for (i = nargs; m_arg--, --i >= 0;) | |
c906108c | 387 | { |
c88e30c0 RH |
388 | char *contents = m_arg->contents; |
389 | int offset = m_arg->offset; | |
390 | int len = m_arg->len; | |
391 | ||
392 | /* Copy the bytes destined for registers into arg_reg_buffer. */ | |
393 | if (offset < sizeof(arg_reg_buffer)) | |
394 | { | |
395 | if (offset + len <= sizeof(arg_reg_buffer)) | |
396 | { | |
397 | memcpy (arg_reg_buffer + offset, contents, len); | |
398 | continue; | |
399 | } | |
400 | else | |
401 | { | |
402 | int tlen = sizeof(arg_reg_buffer) - offset; | |
403 | memcpy (arg_reg_buffer + offset, contents, tlen); | |
404 | offset += tlen; | |
405 | contents += tlen; | |
406 | len -= tlen; | |
407 | } | |
408 | } | |
409 | ||
410 | /* Everything else goes to the stack. */ | |
411 | write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); | |
c906108c | 412 | } |
c88e30c0 RH |
413 | if (struct_return) |
414 | store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr); | |
c906108c | 415 | |
d2427a71 RH |
416 | /* Load the argument registers. */ |
417 | for (i = 0; i < required_arg_regs; i++) | |
418 | { | |
09cc52fd RH |
419 | regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, |
420 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
421 | regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, | |
422 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
d2427a71 | 423 | } |
c906108c | 424 | |
09cc52fd RH |
425 | /* Finally, update the stack pointer. */ |
426 | regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); | |
427 | ||
c88e30c0 | 428 | return sp; |
c906108c SS |
429 | } |
430 | ||
5ec2bb99 RH |
431 | /* Extract from REGCACHE the value about to be returned from a function |
432 | and copy it into VALBUF. */ | |
d2427a71 | 433 | |
dc129d82 | 434 | static void |
5ec2bb99 RH |
435 | alpha_extract_return_value (struct type *valtype, struct regcache *regcache, |
436 | void *valbuf) | |
140f9984 | 437 | { |
7b5e1cb3 | 438 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
439 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
440 | ULONGEST l; | |
441 | ||
442 | switch (TYPE_CODE (valtype)) | |
443 | { | |
444 | case TYPE_CODE_FLT: | |
7b5e1cb3 | 445 | switch (length) |
5ec2bb99 RH |
446 | { |
447 | case 4: | |
448 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); | |
c483c494 | 449 | alpha_sts (valbuf, raw_buffer); |
5ec2bb99 RH |
450 | break; |
451 | ||
452 | case 8: | |
453 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
454 | break; | |
455 | ||
24064b5c RH |
456 | case 16: |
457 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
458 | read_memory (l, valbuf, 16); | |
459 | break; | |
460 | ||
5ec2bb99 | 461 | default: |
67dfac52 | 462 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
463 | } |
464 | break; | |
465 | ||
7b5e1cb3 RH |
466 | case TYPE_CODE_COMPLEX: |
467 | switch (length) | |
468 | { | |
469 | case 8: | |
470 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
471 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
472 | break; | |
473 | ||
474 | case 16: | |
475 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
476 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1, | |
477 | (char *)valbuf + 8); | |
478 | break; | |
479 | ||
480 | case 32: | |
481 | regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); | |
482 | read_memory (l, valbuf, 32); | |
483 | break; | |
484 | ||
485 | default: | |
67dfac52 | 486 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
487 | } |
488 | break; | |
489 | ||
5ec2bb99 RH |
490 | default: |
491 | /* Assume everything else degenerates to an integer. */ | |
492 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
7b5e1cb3 | 493 | store_unsigned_integer (valbuf, length, l); |
5ec2bb99 RH |
494 | break; |
495 | } | |
140f9984 JT |
496 | } |
497 | ||
5ec2bb99 RH |
498 | /* Extract from REGCACHE the address of a structure about to be returned |
499 | from a function. */ | |
500 | ||
501 | static CORE_ADDR | |
502 | alpha_extract_struct_value_address (struct regcache *regcache) | |
503 | { | |
504 | ULONGEST addr; | |
505 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); | |
506 | return addr; | |
507 | } | |
508 | ||
509 | /* Insert the given value into REGCACHE as if it was being | |
510 | returned by a function. */ | |
0d056799 | 511 | |
d2427a71 | 512 | static void |
5ec2bb99 RH |
513 | alpha_store_return_value (struct type *valtype, struct regcache *regcache, |
514 | const void *valbuf) | |
c906108c | 515 | { |
d2427a71 | 516 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
517 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
518 | ULONGEST l; | |
d2427a71 | 519 | |
5ec2bb99 | 520 | switch (TYPE_CODE (valtype)) |
c906108c | 521 | { |
5ec2bb99 RH |
522 | case TYPE_CODE_FLT: |
523 | switch (length) | |
524 | { | |
525 | case 4: | |
c483c494 | 526 | alpha_lds (raw_buffer, valbuf); |
f75d70cc RH |
527 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
528 | break; | |
5ec2bb99 RH |
529 | |
530 | case 8: | |
531 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
532 | break; | |
533 | ||
24064b5c RH |
534 | case 16: |
535 | /* FIXME: 128-bit long doubles are returned like structures: | |
536 | by writing into indirect storage provided by the caller | |
537 | as the first argument. */ | |
538 | error ("Cannot set a 128-bit long double return value."); | |
539 | ||
5ec2bb99 | 540 | default: |
67dfac52 | 541 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
542 | } |
543 | break; | |
d2427a71 | 544 | |
7b5e1cb3 RH |
545 | case TYPE_CODE_COMPLEX: |
546 | switch (length) | |
547 | { | |
548 | case 8: | |
549 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
550 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
551 | break; | |
552 | ||
553 | case 16: | |
554 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
555 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1, | |
556 | (const char *)valbuf + 8); | |
557 | break; | |
558 | ||
559 | case 32: | |
560 | /* FIXME: 128-bit long doubles are returned like structures: | |
561 | by writing into indirect storage provided by the caller | |
562 | as the first argument. */ | |
563 | error ("Cannot set a 128-bit long double return value."); | |
564 | ||
565 | default: | |
67dfac52 | 566 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
567 | } |
568 | break; | |
569 | ||
5ec2bb99 RH |
570 | default: |
571 | /* Assume everything else degenerates to an integer. */ | |
0ede8eca RH |
572 | /* 32-bit values must be sign-extended to 64 bits |
573 | even if the base data type is unsigned. */ | |
574 | if (length == 4) | |
575 | valtype = builtin_type_int32; | |
5ec2bb99 RH |
576 | l = unpack_long (valtype, valbuf); |
577 | regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); | |
578 | break; | |
579 | } | |
c906108c SS |
580 | } |
581 | ||
d2427a71 RH |
582 | \f |
583 | static const unsigned char * | |
584 | alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
c906108c | 585 | { |
d2427a71 RH |
586 | static const unsigned char alpha_breakpoint[] = |
587 | { 0x80, 0, 0, 0 }; /* call_pal bpt */ | |
c906108c | 588 | |
d2427a71 RH |
589 | *lenptr = sizeof(alpha_breakpoint); |
590 | return (alpha_breakpoint); | |
591 | } | |
c906108c | 592 | |
d2427a71 RH |
593 | \f |
594 | /* This returns the PC of the first insn after the prologue. | |
595 | If we can't find the prologue, then return 0. */ | |
c906108c | 596 | |
d2427a71 RH |
597 | CORE_ADDR |
598 | alpha_after_prologue (CORE_ADDR pc) | |
c906108c | 599 | { |
d2427a71 RH |
600 | struct symtab_and_line sal; |
601 | CORE_ADDR func_addr, func_end; | |
c906108c | 602 | |
d2427a71 | 603 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
c5aa993b | 604 | return 0; |
c906108c | 605 | |
d2427a71 RH |
606 | sal = find_pc_line (func_addr, 0); |
607 | if (sal.end < func_end) | |
608 | return sal.end; | |
c5aa993b | 609 | |
d2427a71 RH |
610 | /* The line after the prologue is after the end of the function. In this |
611 | case, tell the caller to find the prologue the hard way. */ | |
612 | return 0; | |
c906108c SS |
613 | } |
614 | ||
d2427a71 RH |
615 | /* Read an instruction from memory at PC, looking through breakpoints. */ |
616 | ||
617 | unsigned int | |
618 | alpha_read_insn (CORE_ADDR pc) | |
c906108c | 619 | { |
d2427a71 RH |
620 | char buf[4]; |
621 | int status; | |
c5aa993b | 622 | |
d2427a71 RH |
623 | status = read_memory_nobpt (pc, buf, 4); |
624 | if (status) | |
625 | memory_error (status, pc); | |
626 | return extract_unsigned_integer (buf, 4); | |
627 | } | |
c5aa993b | 628 | |
d2427a71 RH |
629 | /* To skip prologues, I use this predicate. Returns either PC itself |
630 | if the code at PC does not look like a function prologue; otherwise | |
631 | returns an address that (if we're lucky) follows the prologue. If | |
632 | LENIENT, then we must skip everything which is involved in setting | |
633 | up the frame (it's OK to skip more, just so long as we don't skip | |
634 | anything which might clobber the registers which are being saved. */ | |
c906108c | 635 | |
d2427a71 RH |
636 | static CORE_ADDR |
637 | alpha_skip_prologue (CORE_ADDR pc) | |
638 | { | |
639 | unsigned long inst; | |
640 | int offset; | |
641 | CORE_ADDR post_prologue_pc; | |
642 | char buf[4]; | |
c906108c | 643 | |
d2427a71 RH |
644 | /* Silently return the unaltered pc upon memory errors. |
645 | This could happen on OSF/1 if decode_line_1 tries to skip the | |
646 | prologue for quickstarted shared library functions when the | |
647 | shared library is not yet mapped in. | |
648 | Reading target memory is slow over serial lines, so we perform | |
649 | this check only if the target has shared libraries (which all | |
650 | Alpha targets do). */ | |
651 | if (target_read_memory (pc, buf, 4)) | |
652 | return pc; | |
c906108c | 653 | |
d2427a71 RH |
654 | /* See if we can determine the end of the prologue via the symbol table. |
655 | If so, then return either PC, or the PC after the prologue, whichever | |
656 | is greater. */ | |
c906108c | 657 | |
d2427a71 RH |
658 | post_prologue_pc = alpha_after_prologue (pc); |
659 | if (post_prologue_pc != 0) | |
660 | return max (pc, post_prologue_pc); | |
c906108c | 661 | |
d2427a71 RH |
662 | /* Can't determine prologue from the symbol table, need to examine |
663 | instructions. */ | |
dc1b0db2 | 664 | |
d2427a71 RH |
665 | /* Skip the typical prologue instructions. These are the stack adjustment |
666 | instruction and the instructions that save registers on the stack | |
667 | or in the gcc frame. */ | |
668 | for (offset = 0; offset < 100; offset += 4) | |
669 | { | |
670 | inst = alpha_read_insn (pc + offset); | |
c906108c | 671 | |
d2427a71 RH |
672 | if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ |
673 | continue; | |
674 | if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ | |
675 | continue; | |
676 | if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ | |
677 | continue; | |
678 | if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ | |
679 | continue; | |
c906108c | 680 | |
d2427a71 RH |
681 | if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ |
682 | || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ | |
683 | && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ | |
684 | continue; | |
c906108c | 685 | |
d2427a71 RH |
686 | if (inst == 0x47de040f) /* bis sp,sp,fp */ |
687 | continue; | |
688 | if (inst == 0x47fe040f) /* bis zero,sp,fp */ | |
689 | continue; | |
c906108c | 690 | |
d2427a71 | 691 | break; |
c906108c | 692 | } |
d2427a71 RH |
693 | return pc + offset; |
694 | } | |
c906108c | 695 | |
d2427a71 RH |
696 | \f |
697 | /* Figure out where the longjmp will land. | |
698 | We expect the first arg to be a pointer to the jmp_buf structure from | |
699 | which we extract the PC (JB_PC) that we will land at. The PC is copied | |
700 | into the "pc". This routine returns true on success. */ | |
c906108c SS |
701 | |
702 | static int | |
d2427a71 | 703 | alpha_get_longjmp_target (CORE_ADDR *pc) |
c906108c | 704 | { |
d2427a71 RH |
705 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
706 | CORE_ADDR jb_addr; | |
5ab84872 | 707 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
c906108c | 708 | |
d2427a71 | 709 | jb_addr = read_register (ALPHA_A0_REGNUM); |
c906108c | 710 | |
d2427a71 RH |
711 | if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), |
712 | raw_buffer, tdep->jb_elt_size)) | |
c906108c | 713 | return 0; |
d2427a71 | 714 | |
7c0b4a20 | 715 | *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size); |
d2427a71 | 716 | return 1; |
c906108c SS |
717 | } |
718 | ||
d2427a71 RH |
719 | \f |
720 | /* Frame unwinder for signal trampolines. We use alpha tdep bits that | |
721 | describe the location and shape of the sigcontext structure. After | |
722 | that, all registers are in memory, so it's easy. */ | |
723 | /* ??? Shouldn't we be able to do this generically, rather than with | |
724 | OSABI data specific to Alpha? */ | |
725 | ||
726 | struct alpha_sigtramp_unwind_cache | |
c906108c | 727 | { |
d2427a71 RH |
728 | CORE_ADDR sigcontext_addr; |
729 | }; | |
c906108c | 730 | |
d2427a71 RH |
731 | static struct alpha_sigtramp_unwind_cache * |
732 | alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame, | |
733 | void **this_prologue_cache) | |
734 | { | |
735 | struct alpha_sigtramp_unwind_cache *info; | |
736 | struct gdbarch_tdep *tdep; | |
c906108c | 737 | |
d2427a71 RH |
738 | if (*this_prologue_cache) |
739 | return *this_prologue_cache; | |
c906108c | 740 | |
d2427a71 RH |
741 | info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); |
742 | *this_prologue_cache = info; | |
c906108c | 743 | |
d2427a71 RH |
744 | tdep = gdbarch_tdep (current_gdbarch); |
745 | info->sigcontext_addr = tdep->sigcontext_addr (next_frame); | |
c906108c | 746 | |
d2427a71 | 747 | return info; |
c906108c SS |
748 | } |
749 | ||
d2427a71 RH |
750 | /* Return the address of REGNO in a sigtramp frame. Since this is all |
751 | arithmetic, it doesn't seem worthwhile to cache it. */ | |
c5aa993b | 752 | |
d2427a71 RH |
753 | #ifndef SIGFRAME_PC_OFF |
754 | #define SIGFRAME_PC_OFF (2 * 8) | |
755 | #define SIGFRAME_REGSAVE_OFF (4 * 8) | |
756 | #define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8) | |
757 | #endif | |
c5aa993b | 758 | |
d2427a71 RH |
759 | static CORE_ADDR |
760 | alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno) | |
761 | { | |
762 | if (regno < 32) | |
763 | return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8; | |
b38b6be2 | 764 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 32) |
d2427a71 | 765 | return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8; |
b38b6be2 | 766 | if (regno == ALPHA_PC_REGNUM) |
d2427a71 | 767 | return sigcontext_addr + SIGFRAME_PC_OFF; |
c5aa993b | 768 | |
d2427a71 | 769 | return 0; |
c906108c SS |
770 | } |
771 | ||
d2427a71 RH |
772 | /* Given a GDB frame, determine the address of the calling function's |
773 | frame. This will be used to create a new GDB frame struct. */ | |
140f9984 | 774 | |
dc129d82 | 775 | static void |
d2427a71 RH |
776 | alpha_sigtramp_frame_this_id (struct frame_info *next_frame, |
777 | void **this_prologue_cache, | |
778 | struct frame_id *this_id) | |
c906108c | 779 | { |
d2427a71 RH |
780 | struct alpha_sigtramp_unwind_cache *info |
781 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
782 | struct gdbarch_tdep *tdep; | |
783 | CORE_ADDR stack_addr, code_addr; | |
784 | ||
785 | /* If the OSABI couldn't locate the sigcontext, give up. */ | |
786 | if (info->sigcontext_addr == 0) | |
787 | return; | |
788 | ||
789 | /* If we have dynamic signal trampolines, find their start. | |
790 | If we do not, then we must assume there is a symbol record | |
791 | that can provide the start address. */ | |
792 | tdep = gdbarch_tdep (current_gdbarch); | |
793 | if (tdep->dynamic_sigtramp_offset) | |
c906108c | 794 | { |
d2427a71 RH |
795 | int offset; |
796 | code_addr = frame_pc_unwind (next_frame); | |
797 | offset = tdep->dynamic_sigtramp_offset (code_addr); | |
798 | if (offset >= 0) | |
799 | code_addr -= offset; | |
c906108c | 800 | else |
d2427a71 | 801 | code_addr = 0; |
c906108c | 802 | } |
d2427a71 RH |
803 | else |
804 | code_addr = frame_func_unwind (next_frame); | |
c906108c | 805 | |
d2427a71 RH |
806 | /* The stack address is trivially read from the sigcontext. */ |
807 | stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr, | |
808 | ALPHA_SP_REGNUM); | |
b21fd293 RH |
809 | stack_addr = get_frame_memory_unsigned (next_frame, stack_addr, |
810 | ALPHA_REGISTER_SIZE); | |
c906108c | 811 | |
d2427a71 | 812 | *this_id = frame_id_build (stack_addr, code_addr); |
c906108c SS |
813 | } |
814 | ||
d2427a71 | 815 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
c906108c | 816 | |
d2427a71 RH |
817 | static void |
818 | alpha_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
819 | void **this_prologue_cache, | |
820 | int regnum, int *optimizedp, | |
821 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
822 | int *realnump, void *bufferp) | |
c906108c | 823 | { |
d2427a71 RH |
824 | struct alpha_sigtramp_unwind_cache *info |
825 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
826 | CORE_ADDR addr; | |
c906108c | 827 | |
d2427a71 | 828 | if (info->sigcontext_addr != 0) |
c906108c | 829 | { |
d2427a71 RH |
830 | /* All integer and fp registers are stored in memory. */ |
831 | addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum); | |
832 | if (addr != 0) | |
c906108c | 833 | { |
d2427a71 RH |
834 | *optimizedp = 0; |
835 | *lvalp = lval_memory; | |
836 | *addrp = addr; | |
837 | *realnump = -1; | |
838 | if (bufferp != NULL) | |
b21fd293 | 839 | get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE); |
d2427a71 | 840 | return; |
c906108c | 841 | } |
c906108c SS |
842 | } |
843 | ||
d2427a71 RH |
844 | /* This extra register may actually be in the sigcontext, but our |
845 | current description of it in alpha_sigtramp_frame_unwind_cache | |
846 | doesn't include it. Too bad. Fall back on whatever's in the | |
847 | outer frame. */ | |
848 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
849 | realnump, bufferp); | |
850 | } | |
c906108c | 851 | |
d2427a71 RH |
852 | static const struct frame_unwind alpha_sigtramp_frame_unwind = { |
853 | SIGTRAMP_FRAME, | |
854 | alpha_sigtramp_frame_this_id, | |
855 | alpha_sigtramp_frame_prev_register | |
856 | }; | |
c906108c | 857 | |
d2427a71 RH |
858 | static const struct frame_unwind * |
859 | alpha_sigtramp_frame_p (CORE_ADDR pc) | |
860 | { | |
861 | char *name; | |
c906108c | 862 | |
d2427a71 RH |
863 | /* We shouldn't even bother to try if the OSABI didn't register |
864 | a sigcontext_addr handler. */ | |
865 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
866 | return NULL; | |
c906108c | 867 | |
d2427a71 RH |
868 | /* Otherwise we should be in a signal frame. */ |
869 | find_pc_partial_function (pc, &name, NULL, NULL); | |
870 | if (PC_IN_SIGTRAMP (pc, name)) | |
871 | return &alpha_sigtramp_frame_unwind; | |
c906108c | 872 | |
d2427a71 | 873 | return NULL; |
c906108c | 874 | } |
d2427a71 RH |
875 | \f |
876 | /* Fallback alpha frame unwinder. Uses instruction scanning and knows | |
877 | something about the traditional layout of alpha stack frames. */ | |
c906108c | 878 | |
d2427a71 | 879 | struct alpha_heuristic_unwind_cache |
c906108c | 880 | { |
d2427a71 RH |
881 | CORE_ADDR *saved_regs; |
882 | CORE_ADDR vfp; | |
883 | CORE_ADDR start_pc; | |
884 | int return_reg; | |
885 | }; | |
c906108c | 886 | |
d2427a71 RH |
887 | /* Heuristic_proc_start may hunt through the text section for a long |
888 | time across a 2400 baud serial line. Allows the user to limit this | |
889 | search. */ | |
890 | static unsigned int heuristic_fence_post = 0; | |
c906108c | 891 | |
d2427a71 RH |
892 | /* Attempt to locate the start of the function containing PC. We assume that |
893 | the previous function ends with an about_to_return insn. Not foolproof by | |
894 | any means, since gcc is happy to put the epilogue in the middle of a | |
895 | function. But we're guessing anyway... */ | |
c906108c | 896 | |
d2427a71 RH |
897 | static CORE_ADDR |
898 | alpha_heuristic_proc_start (CORE_ADDR pc) | |
899 | { | |
900 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
901 | CORE_ADDR last_non_nop = pc; | |
902 | CORE_ADDR fence = pc - heuristic_fence_post; | |
903 | CORE_ADDR orig_pc = pc; | |
fbe586ae | 904 | CORE_ADDR func; |
9e0b60a8 | 905 | |
d2427a71 RH |
906 | if (pc == 0) |
907 | return 0; | |
9e0b60a8 | 908 | |
fbe586ae RH |
909 | /* First see if we can find the start of the function from minimal |
910 | symbol information. This can succeed with a binary that doesn't | |
911 | have debug info, but hasn't been stripped. */ | |
912 | func = get_pc_function_start (pc); | |
913 | if (func) | |
914 | return func; | |
915 | ||
d2427a71 RH |
916 | if (heuristic_fence_post == UINT_MAX |
917 | || fence < tdep->vm_min_address) | |
918 | fence = tdep->vm_min_address; | |
c906108c | 919 | |
d2427a71 RH |
920 | /* Search back for previous return; also stop at a 0, which might be |
921 | seen for instance before the start of a code section. Don't include | |
922 | nops, since this usually indicates padding between functions. */ | |
923 | for (pc -= 4; pc >= fence; pc -= 4) | |
c906108c | 924 | { |
d2427a71 RH |
925 | unsigned int insn = alpha_read_insn (pc); |
926 | switch (insn) | |
c906108c | 927 | { |
d2427a71 RH |
928 | case 0: /* invalid insn */ |
929 | case 0x6bfa8001: /* ret $31,($26),1 */ | |
930 | return last_non_nop; | |
931 | ||
932 | case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ | |
933 | case 0x47ff041f: /* nop: bis $31,$31,$31 */ | |
934 | break; | |
935 | ||
936 | default: | |
937 | last_non_nop = pc; | |
938 | break; | |
c906108c | 939 | } |
d2427a71 | 940 | } |
c906108c | 941 | |
d2427a71 RH |
942 | /* It's not clear to me why we reach this point when stopping quietly, |
943 | but with this test, at least we don't print out warnings for every | |
944 | child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ | |
945 | if (stop_soon == NO_STOP_QUIETLY) | |
946 | { | |
947 | static int blurb_printed = 0; | |
c906108c | 948 | |
d2427a71 RH |
949 | if (fence == tdep->vm_min_address) |
950 | warning ("Hit beginning of text section without finding"); | |
c906108c | 951 | else |
d2427a71 RH |
952 | warning ("Hit heuristic-fence-post without finding"); |
953 | warning ("enclosing function for address 0x%s", paddr_nz (orig_pc)); | |
c906108c | 954 | |
d2427a71 RH |
955 | if (!blurb_printed) |
956 | { | |
957 | printf_filtered ("\ | |
958 | This warning occurs if you are debugging a function without any symbols\n\ | |
959 | (for example, in a stripped executable). In that case, you may wish to\n\ | |
960 | increase the size of the search with the `set heuristic-fence-post' command.\n\ | |
961 | \n\ | |
962 | Otherwise, you told GDB there was a function where there isn't one, or\n\ | |
963 | (more likely) you have encountered a bug in GDB.\n"); | |
964 | blurb_printed = 1; | |
965 | } | |
966 | } | |
c906108c | 967 | |
d2427a71 RH |
968 | return 0; |
969 | } | |
c906108c | 970 | |
fbe586ae | 971 | static struct alpha_heuristic_unwind_cache * |
d2427a71 RH |
972 | alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame, |
973 | void **this_prologue_cache, | |
974 | CORE_ADDR start_pc) | |
975 | { | |
976 | struct alpha_heuristic_unwind_cache *info; | |
977 | ULONGEST val; | |
978 | CORE_ADDR limit_pc, cur_pc; | |
979 | int frame_reg, frame_size, return_reg, reg; | |
c906108c | 980 | |
d2427a71 RH |
981 | if (*this_prologue_cache) |
982 | return *this_prologue_cache; | |
c906108c | 983 | |
d2427a71 RH |
984 | info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); |
985 | *this_prologue_cache = info; | |
986 | info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); | |
c906108c | 987 | |
d2427a71 RH |
988 | limit_pc = frame_pc_unwind (next_frame); |
989 | if (start_pc == 0) | |
990 | start_pc = alpha_heuristic_proc_start (limit_pc); | |
991 | info->start_pc = start_pc; | |
c906108c | 992 | |
d2427a71 RH |
993 | frame_reg = ALPHA_SP_REGNUM; |
994 | frame_size = 0; | |
995 | return_reg = -1; | |
c906108c | 996 | |
d2427a71 RH |
997 | /* If we've identified a likely place to start, do code scanning. */ |
998 | if (start_pc != 0) | |
c5aa993b | 999 | { |
d2427a71 RH |
1000 | /* Limit the forward search to 50 instructions. */ |
1001 | if (start_pc + 200 < limit_pc) | |
1002 | limit_pc = start_pc + 200; | |
c5aa993b | 1003 | |
d2427a71 RH |
1004 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) |
1005 | { | |
1006 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1007 | |
d2427a71 RH |
1008 | if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
1009 | { | |
1010 | if (word & 0x8000) | |
1011 | { | |
1012 | /* Consider only the first stack allocation instruction | |
1013 | to contain the static size of the frame. */ | |
1014 | if (frame_size == 0) | |
1015 | frame_size = (-word) & 0xffff; | |
1016 | } | |
1017 | else | |
1018 | { | |
1019 | /* Exit loop if a positive stack adjustment is found, which | |
1020 | usually means that the stack cleanup code in the function | |
1021 | epilogue is reached. */ | |
1022 | break; | |
1023 | } | |
1024 | } | |
1025 | else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ | |
1026 | { | |
1027 | reg = (word & 0x03e00000) >> 21; | |
1028 | ||
1029 | if (reg == 31) | |
1030 | continue; | |
1031 | ||
1032 | /* Do not compute the address where the register was saved yet, | |
1033 | because we don't know yet if the offset will need to be | |
1034 | relative to $sp or $fp (we can not compute the address | |
1035 | relative to $sp if $sp is updated during the execution of | |
1036 | the current subroutine, for instance when doing some alloca). | |
1037 | So just store the offset for the moment, and compute the | |
1038 | address later when we know whether this frame has a frame | |
1039 | pointer or not. */ | |
1040 | /* Hack: temporarily add one, so that the offset is non-zero | |
1041 | and we can tell which registers have save offsets below. */ | |
1042 | info->saved_regs[reg] = (word & 0xffff) + 1; | |
1043 | ||
1044 | /* Starting with OSF/1-3.2C, the system libraries are shipped | |
1045 | without local symbols, but they still contain procedure | |
1046 | descriptors without a symbol reference. GDB is currently | |
1047 | unable to find these procedure descriptors and uses | |
1048 | heuristic_proc_desc instead. | |
1049 | As some low level compiler support routines (__div*, __add*) | |
1050 | use a non-standard return address register, we have to | |
1051 | add some heuristics to determine the return address register, | |
1052 | or stepping over these routines will fail. | |
1053 | Usually the return address register is the first register | |
1054 | saved on the stack, but assembler optimization might | |
1055 | rearrange the register saves. | |
1056 | So we recognize only a few registers (t7, t9, ra) within | |
1057 | the procedure prologue as valid return address registers. | |
1058 | If we encounter a return instruction, we extract the | |
1059 | the return address register from it. | |
1060 | ||
1061 | FIXME: Rewriting GDB to access the procedure descriptors, | |
1062 | e.g. via the minimal symbol table, might obviate this hack. */ | |
1063 | if (return_reg == -1 | |
1064 | && cur_pc < (start_pc + 80) | |
1065 | && (reg == ALPHA_T7_REGNUM | |
1066 | || reg == ALPHA_T9_REGNUM | |
1067 | || reg == ALPHA_RA_REGNUM)) | |
1068 | return_reg = reg; | |
1069 | } | |
1070 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1071 | return_reg = (word >> 16) & 0x1f; | |
1072 | else if (word == 0x47de040f) /* bis sp,sp,fp */ | |
1073 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1074 | else if (word == 0x47fe040f) /* bis zero,sp,fp */ | |
1075 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1076 | } | |
c5aa993b | 1077 | |
d2427a71 RH |
1078 | /* If we haven't found a valid return address register yet, keep |
1079 | searching in the procedure prologue. */ | |
1080 | if (return_reg == -1) | |
1081 | { | |
1082 | while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) | |
1083 | { | |
1084 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1085 | |
d2427a71 RH |
1086 | if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
1087 | { | |
1088 | reg = (word & 0x03e00000) >> 21; | |
1089 | if (reg == ALPHA_T7_REGNUM | |
1090 | || reg == ALPHA_T9_REGNUM | |
1091 | || reg == ALPHA_RA_REGNUM) | |
1092 | { | |
1093 | return_reg = reg; | |
1094 | break; | |
1095 | } | |
1096 | } | |
1097 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1098 | { | |
1099 | return_reg = (word >> 16) & 0x1f; | |
1100 | break; | |
1101 | } | |
85b32d22 RH |
1102 | |
1103 | cur_pc += 4; | |
d2427a71 RH |
1104 | } |
1105 | } | |
c906108c | 1106 | } |
c906108c | 1107 | |
d2427a71 RH |
1108 | /* Failing that, do default to the customary RA. */ |
1109 | if (return_reg == -1) | |
1110 | return_reg = ALPHA_RA_REGNUM; | |
1111 | info->return_reg = return_reg; | |
f8453e34 | 1112 | |
d2427a71 RH |
1113 | frame_unwind_unsigned_register (next_frame, frame_reg, &val); |
1114 | info->vfp = val + frame_size; | |
c906108c | 1115 | |
d2427a71 RH |
1116 | /* Convert offsets to absolute addresses. See above about adding |
1117 | one to the offsets to make all detected offsets non-zero. */ | |
1118 | for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) | |
1119 | if (info->saved_regs[reg]) | |
1120 | info->saved_regs[reg] += val - 1; | |
1121 | ||
1122 | return info; | |
c906108c | 1123 | } |
c906108c | 1124 | |
d2427a71 RH |
1125 | /* Given a GDB frame, determine the address of the calling function's |
1126 | frame. This will be used to create a new GDB frame struct. */ | |
1127 | ||
fbe586ae | 1128 | static void |
d2427a71 RH |
1129 | alpha_heuristic_frame_this_id (struct frame_info *next_frame, |
1130 | void **this_prologue_cache, | |
1131 | struct frame_id *this_id) | |
c906108c | 1132 | { |
d2427a71 RH |
1133 | struct alpha_heuristic_unwind_cache *info |
1134 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1135 | |
fbe586ae RH |
1136 | /* This is meant to halt the backtrace at "_start". Make sure we |
1137 | don't halt it at a generic dummy frame. */ | |
1138 | if (inside_entry_file (info->start_pc)) | |
1139 | return; | |
1140 | ||
d2427a71 | 1141 | *this_id = frame_id_build (info->vfp, info->start_pc); |
c906108c SS |
1142 | } |
1143 | ||
d2427a71 RH |
1144 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
1145 | ||
fbe586ae | 1146 | static void |
d2427a71 RH |
1147 | alpha_heuristic_frame_prev_register (struct frame_info *next_frame, |
1148 | void **this_prologue_cache, | |
1149 | int regnum, int *optimizedp, | |
1150 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1151 | int *realnump, void *bufferp) | |
c906108c | 1152 | { |
d2427a71 RH |
1153 | struct alpha_heuristic_unwind_cache *info |
1154 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
1155 | ||
1156 | /* The PC of the previous frame is stored in the link register of | |
1157 | the current frame. Frob regnum so that we pull the value from | |
1158 | the correct place. */ | |
1159 | if (regnum == ALPHA_PC_REGNUM) | |
1160 | regnum = info->return_reg; | |
1161 | ||
1162 | /* For all registers known to be saved in the current frame, | |
1163 | do the obvious and pull the value out. */ | |
1164 | if (info->saved_regs[regnum]) | |
c906108c | 1165 | { |
d2427a71 RH |
1166 | *optimizedp = 0; |
1167 | *lvalp = lval_memory; | |
1168 | *addrp = info->saved_regs[regnum]; | |
1169 | *realnump = -1; | |
1170 | if (bufferp != NULL) | |
b21fd293 | 1171 | get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE); |
c906108c SS |
1172 | return; |
1173 | } | |
1174 | ||
d2427a71 RH |
1175 | /* The stack pointer of the previous frame is computed by popping |
1176 | the current stack frame. */ | |
1177 | if (regnum == ALPHA_SP_REGNUM) | |
c906108c | 1178 | { |
d2427a71 RH |
1179 | *optimizedp = 0; |
1180 | *lvalp = not_lval; | |
1181 | *addrp = 0; | |
1182 | *realnump = -1; | |
1183 | if (bufferp != NULL) | |
1184 | store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp); | |
1185 | return; | |
c906108c | 1186 | } |
95b80706 | 1187 | |
d2427a71 RH |
1188 | /* Otherwise assume the next frame has the same register value. */ |
1189 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
1190 | realnump, bufferp); | |
95b80706 JT |
1191 | } |
1192 | ||
d2427a71 RH |
1193 | static const struct frame_unwind alpha_heuristic_frame_unwind = { |
1194 | NORMAL_FRAME, | |
1195 | alpha_heuristic_frame_this_id, | |
1196 | alpha_heuristic_frame_prev_register | |
1197 | }; | |
c906108c | 1198 | |
d2427a71 RH |
1199 | static const struct frame_unwind * |
1200 | alpha_heuristic_frame_p (CORE_ADDR pc) | |
c906108c | 1201 | { |
d2427a71 | 1202 | return &alpha_heuristic_frame_unwind; |
c906108c SS |
1203 | } |
1204 | ||
fbe586ae | 1205 | static CORE_ADDR |
d2427a71 RH |
1206 | alpha_heuristic_frame_base_address (struct frame_info *next_frame, |
1207 | void **this_prologue_cache) | |
c906108c | 1208 | { |
d2427a71 RH |
1209 | struct alpha_heuristic_unwind_cache *info |
1210 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1211 | |
d2427a71 | 1212 | return info->vfp; |
c906108c SS |
1213 | } |
1214 | ||
d2427a71 RH |
1215 | static const struct frame_base alpha_heuristic_frame_base = { |
1216 | &alpha_heuristic_frame_unwind, | |
1217 | alpha_heuristic_frame_base_address, | |
1218 | alpha_heuristic_frame_base_address, | |
1219 | alpha_heuristic_frame_base_address | |
1220 | }; | |
1221 | ||
c906108c | 1222 | /* Just like reinit_frame_cache, but with the right arguments to be |
d2427a71 | 1223 | callable as an sfunc. Used by the "set heuristic-fence-post" command. */ |
c906108c SS |
1224 | |
1225 | static void | |
fba45db2 | 1226 | reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) |
c906108c SS |
1227 | { |
1228 | reinit_frame_cache (); | |
1229 | } | |
1230 | ||
d2427a71 RH |
1231 | \f |
1232 | /* ALPHA stack frames are almost impenetrable. When execution stops, | |
1233 | we basically have to look at symbol information for the function | |
1234 | that we stopped in, which tells us *which* register (if any) is | |
1235 | the base of the frame pointer, and what offset from that register | |
1236 | the frame itself is at. | |
c906108c | 1237 | |
d2427a71 RH |
1238 | This presents a problem when trying to examine a stack in memory |
1239 | (that isn't executing at the moment), using the "frame" command. We | |
1240 | don't have a PC, nor do we have any registers except SP. | |
c906108c | 1241 | |
d2427a71 RH |
1242 | This routine takes two arguments, SP and PC, and tries to make the |
1243 | cached frames look as if these two arguments defined a frame on the | |
1244 | cache. This allows the rest of info frame to extract the important | |
1245 | arguments without difficulty. */ | |
ec32e4be | 1246 | |
d2427a71 RH |
1247 | struct frame_info * |
1248 | alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv) | |
0d056799 | 1249 | { |
d2427a71 RH |
1250 | if (argc != 2) |
1251 | error ("ALPHA frame specifications require two arguments: sp and pc"); | |
0d056799 | 1252 | |
d2427a71 | 1253 | return create_new_frame (argv[0], argv[1]); |
0d056799 JT |
1254 | } |
1255 | ||
d2427a71 RH |
1256 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1257 | dummy frame. The frame ID's base needs to match the TOS value | |
1258 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1259 | breakpoint. */ | |
d734c450 | 1260 | |
d2427a71 RH |
1261 | static struct frame_id |
1262 | alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
0d056799 | 1263 | { |
d2427a71 RH |
1264 | ULONGEST base; |
1265 | frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base); | |
1266 | return frame_id_build (base, frame_pc_unwind (next_frame)); | |
0d056799 JT |
1267 | } |
1268 | ||
dc129d82 | 1269 | static CORE_ADDR |
d2427a71 | 1270 | alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
accc6d1f | 1271 | { |
d2427a71 RH |
1272 | ULONGEST pc; |
1273 | frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc); | |
1274 | return pc; | |
accc6d1f JT |
1275 | } |
1276 | ||
98a8e1e5 RH |
1277 | \f |
1278 | /* Helper routines for alpha*-nat.c files to move register sets to and | |
1279 | from core files. The UNIQUE pointer is allowed to be NULL, as most | |
1280 | targets don't supply this value in their core files. */ | |
1281 | ||
1282 | void | |
1283 | alpha_supply_int_regs (int regno, const void *r0_r30, | |
1284 | const void *pc, const void *unique) | |
1285 | { | |
1286 | int i; | |
1287 | ||
1288 | for (i = 0; i < 31; ++i) | |
1289 | if (regno == i || regno == -1) | |
1290 | supply_register (i, (const char *)r0_r30 + i*8); | |
1291 | ||
1292 | if (regno == ALPHA_ZERO_REGNUM || regno == -1) | |
1293 | supply_register (ALPHA_ZERO_REGNUM, NULL); | |
1294 | ||
1295 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
1296 | supply_register (ALPHA_PC_REGNUM, pc); | |
1297 | ||
1298 | if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) | |
1299 | supply_register (ALPHA_UNIQUE_REGNUM, unique); | |
1300 | } | |
1301 | ||
1302 | void | |
1303 | alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique) | |
1304 | { | |
1305 | int i; | |
1306 | ||
1307 | for (i = 0; i < 31; ++i) | |
1308 | if (regno == i || regno == -1) | |
1309 | regcache_collect (i, (char *)r0_r30 + i*8); | |
1310 | ||
1311 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
1312 | regcache_collect (ALPHA_PC_REGNUM, pc); | |
1313 | ||
1314 | if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) | |
1315 | regcache_collect (ALPHA_UNIQUE_REGNUM, unique); | |
1316 | } | |
1317 | ||
1318 | void | |
1319 | alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr) | |
1320 | { | |
1321 | int i; | |
1322 | ||
1323 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1324 | if (regno == i || regno == -1) | |
1325 | supply_register (i, (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
1326 | ||
1327 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
1328 | supply_register (ALPHA_FPCR_REGNUM, fpcr); | |
1329 | } | |
1330 | ||
1331 | void | |
1332 | alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr) | |
1333 | { | |
1334 | int i; | |
1335 | ||
1336 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1337 | if (regno == i || regno == -1) | |
1338 | regcache_collect (i, (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
1339 | ||
1340 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
1341 | regcache_collect (ALPHA_FPCR_REGNUM, fpcr); | |
1342 | } | |
1343 | ||
d2427a71 | 1344 | \f |
ec32e4be JT |
1345 | /* alpha_software_single_step() is called just before we want to resume |
1346 | the inferior, if we want to single-step it but there is no hardware | |
1347 | or kernel single-step support (NetBSD on Alpha, for example). We find | |
1348 | the target of the coming instruction and breakpoint it. | |
1349 | ||
1350 | single_step is also called just after the inferior stops. If we had | |
1351 | set up a simulated single-step, we undo our damage. */ | |
1352 | ||
1353 | static CORE_ADDR | |
1354 | alpha_next_pc (CORE_ADDR pc) | |
1355 | { | |
1356 | unsigned int insn; | |
1357 | unsigned int op; | |
1358 | int offset; | |
1359 | LONGEST rav; | |
1360 | ||
b21fd293 | 1361 | insn = alpha_read_insn (pc); |
ec32e4be JT |
1362 | |
1363 | /* Opcode is top 6 bits. */ | |
1364 | op = (insn >> 26) & 0x3f; | |
1365 | ||
1366 | if (op == 0x1a) | |
1367 | { | |
1368 | /* Jump format: target PC is: | |
1369 | RB & ~3 */ | |
1370 | return (read_register ((insn >> 16) & 0x1f) & ~3); | |
1371 | } | |
1372 | ||
1373 | if ((op & 0x30) == 0x30) | |
1374 | { | |
1375 | /* Branch format: target PC is: | |
1376 | (new PC) + (4 * sext(displacement)) */ | |
1377 | if (op == 0x30 || /* BR */ | |
1378 | op == 0x34) /* BSR */ | |
1379 | { | |
1380 | branch_taken: | |
1381 | offset = (insn & 0x001fffff); | |
1382 | if (offset & 0x00100000) | |
1383 | offset |= 0xffe00000; | |
1384 | offset *= 4; | |
1385 | return (pc + 4 + offset); | |
1386 | } | |
1387 | ||
1388 | /* Need to determine if branch is taken; read RA. */ | |
1389 | rav = (LONGEST) read_register ((insn >> 21) & 0x1f); | |
1390 | switch (op) | |
1391 | { | |
1392 | case 0x38: /* BLBC */ | |
1393 | if ((rav & 1) == 0) | |
1394 | goto branch_taken; | |
1395 | break; | |
1396 | case 0x3c: /* BLBS */ | |
1397 | if (rav & 1) | |
1398 | goto branch_taken; | |
1399 | break; | |
1400 | case 0x39: /* BEQ */ | |
1401 | if (rav == 0) | |
1402 | goto branch_taken; | |
1403 | break; | |
1404 | case 0x3d: /* BNE */ | |
1405 | if (rav != 0) | |
1406 | goto branch_taken; | |
1407 | break; | |
1408 | case 0x3a: /* BLT */ | |
1409 | if (rav < 0) | |
1410 | goto branch_taken; | |
1411 | break; | |
1412 | case 0x3b: /* BLE */ | |
1413 | if (rav <= 0) | |
1414 | goto branch_taken; | |
1415 | break; | |
1416 | case 0x3f: /* BGT */ | |
1417 | if (rav > 0) | |
1418 | goto branch_taken; | |
1419 | break; | |
1420 | case 0x3e: /* BGE */ | |
1421 | if (rav >= 0) | |
1422 | goto branch_taken; | |
1423 | break; | |
d2427a71 RH |
1424 | |
1425 | /* ??? Missing floating-point branches. */ | |
ec32e4be JT |
1426 | } |
1427 | } | |
1428 | ||
1429 | /* Not a branch or branch not taken; target PC is: | |
1430 | pc + 4 */ | |
1431 | return (pc + 4); | |
1432 | } | |
1433 | ||
1434 | void | |
1435 | alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) | |
1436 | { | |
1437 | static CORE_ADDR next_pc; | |
1438 | typedef char binsn_quantum[BREAKPOINT_MAX]; | |
1439 | static binsn_quantum break_mem; | |
1440 | CORE_ADDR pc; | |
1441 | ||
1442 | if (insert_breakpoints_p) | |
1443 | { | |
1444 | pc = read_pc (); | |
1445 | next_pc = alpha_next_pc (pc); | |
1446 | ||
1447 | target_insert_breakpoint (next_pc, break_mem); | |
1448 | } | |
1449 | else | |
1450 | { | |
1451 | target_remove_breakpoint (next_pc, break_mem); | |
1452 | write_pc (next_pc); | |
1453 | } | |
c906108c SS |
1454 | } |
1455 | ||
dc129d82 | 1456 | \f |
dc129d82 JT |
1457 | /* Initialize the current architecture based on INFO. If possible, re-use an |
1458 | architecture from ARCHES, which is a list of architectures already created | |
1459 | during this debugging session. | |
1460 | ||
1461 | Called e.g. at program startup, when reading a core file, and when reading | |
1462 | a binary file. */ | |
1463 | ||
1464 | static struct gdbarch * | |
1465 | alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1466 | { | |
1467 | struct gdbarch_tdep *tdep; | |
1468 | struct gdbarch *gdbarch; | |
dc129d82 JT |
1469 | |
1470 | /* Try to determine the ABI of the object we are loading. */ | |
4be87837 | 1471 | if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) |
dc129d82 | 1472 | { |
4be87837 DJ |
1473 | /* If it's an ECOFF file, assume it's OSF/1. */ |
1474 | if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) | |
aff87235 | 1475 | info.osabi = GDB_OSABI_OSF1; |
dc129d82 JT |
1476 | } |
1477 | ||
1478 | /* Find a candidate among extant architectures. */ | |
4be87837 DJ |
1479 | arches = gdbarch_list_lookup_by_info (arches, &info); |
1480 | if (arches != NULL) | |
1481 | return arches->gdbarch; | |
dc129d82 JT |
1482 | |
1483 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1484 | gdbarch = gdbarch_alloc (&info, tdep); | |
1485 | ||
d2427a71 RH |
1486 | /* Lowest text address. This is used by heuristic_proc_start() |
1487 | to decide when to stop looking. */ | |
d9b023cc JT |
1488 | tdep->vm_min_address = (CORE_ADDR) 0x120000000; |
1489 | ||
36a6271d | 1490 | tdep->dynamic_sigtramp_offset = NULL; |
5868c862 | 1491 | tdep->sigcontext_addr = NULL; |
36a6271d | 1492 | |
accc6d1f JT |
1493 | tdep->jb_pc = -1; /* longjmp support not enabled by default */ |
1494 | ||
dc129d82 JT |
1495 | /* Type sizes */ |
1496 | set_gdbarch_short_bit (gdbarch, 16); | |
1497 | set_gdbarch_int_bit (gdbarch, 32); | |
1498 | set_gdbarch_long_bit (gdbarch, 64); | |
1499 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1500 | set_gdbarch_float_bit (gdbarch, 32); | |
1501 | set_gdbarch_double_bit (gdbarch, 64); | |
1502 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1503 | set_gdbarch_ptr_bit (gdbarch, 64); | |
1504 | ||
1505 | /* Register info */ | |
1506 | set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); | |
1507 | set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); | |
dc129d82 JT |
1508 | set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); |
1509 | set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); | |
1510 | ||
1511 | set_gdbarch_register_name (gdbarch, alpha_register_name); | |
dc129d82 JT |
1512 | set_gdbarch_register_byte (gdbarch, alpha_register_byte); |
1513 | set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size); | |
dc129d82 | 1514 | set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size); |
c483c494 | 1515 | set_gdbarch_register_type (gdbarch, alpha_register_type); |
dc129d82 JT |
1516 | |
1517 | set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); | |
1518 | set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); | |
1519 | ||
c483c494 RH |
1520 | set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); |
1521 | set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); | |
1522 | set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); | |
dc129d82 | 1523 | |
615967cb RH |
1524 | set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); |
1525 | ||
d2427a71 | 1526 | /* Prologue heuristics. */ |
dc129d82 JT |
1527 | set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); |
1528 | ||
5ef165c2 RH |
1529 | /* Disassembler. */ |
1530 | set_gdbarch_print_insn (gdbarch, print_insn_alpha); | |
1531 | ||
d2427a71 | 1532 | /* Call info. */ |
dc129d82 JT |
1533 | set_gdbarch_frameless_function_invocation (gdbarch, |
1534 | generic_frameless_function_invocation_not); | |
1535 | ||
1fd35568 | 1536 | set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention); |
5ec2bb99 RH |
1537 | set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value); |
1538 | set_gdbarch_store_return_value (gdbarch, alpha_store_return_value); | |
1539 | set_gdbarch_extract_struct_value_address (gdbarch, | |
dc129d82 JT |
1540 | alpha_extract_struct_value_address); |
1541 | ||
1542 | /* Settings for calling functions in the inferior. */ | |
c88e30c0 | 1543 | set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); |
d2427a71 RH |
1544 | |
1545 | /* Methods for saving / extracting a dummy frame's ID. */ | |
1546 | set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id); | |
1547 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); | |
1548 | ||
1549 | /* Return the unwound PC value. */ | |
1550 | set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); | |
dc129d82 JT |
1551 | |
1552 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
36a6271d | 1553 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
dc129d82 | 1554 | |
95b80706 | 1555 | set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); |
dc129d82 | 1556 | set_gdbarch_decr_pc_after_break (gdbarch, 4); |
95b80706 JT |
1557 | |
1558 | set_gdbarch_function_start_offset (gdbarch, 0); | |
dc129d82 JT |
1559 | set_gdbarch_frame_args_skip (gdbarch, 0); |
1560 | ||
44dffaac | 1561 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1562 | gdbarch_init_osabi (info, gdbarch); |
44dffaac | 1563 | |
accc6d1f JT |
1564 | /* Now that we have tuned the configuration, set a few final things |
1565 | based on what the OS ABI has told us. */ | |
1566 | ||
1567 | if (tdep->jb_pc >= 0) | |
1568 | set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); | |
1569 | ||
d2427a71 RH |
1570 | frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p); |
1571 | frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p); | |
dc129d82 | 1572 | |
d2427a71 | 1573 | frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); |
accc6d1f | 1574 | |
d2427a71 | 1575 | return gdbarch; |
dc129d82 JT |
1576 | } |
1577 | ||
baa490c4 RH |
1578 | void |
1579 | alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1580 | { | |
1581 | frame_unwind_append_predicate (gdbarch, dwarf2_frame_p); | |
1582 | frame_base_append_predicate (gdbarch, dwarf2_frame_base_p); | |
1583 | set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info); | |
1584 | } | |
1585 | ||
a78f21af AC |
1586 | extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ |
1587 | ||
c906108c | 1588 | void |
fba45db2 | 1589 | _initialize_alpha_tdep (void) |
c906108c SS |
1590 | { |
1591 | struct cmd_list_element *c; | |
1592 | ||
d2427a71 | 1593 | gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); |
c906108c SS |
1594 | |
1595 | /* Let the user set the fence post for heuristic_proc_start. */ | |
1596 | ||
1597 | /* We really would like to have both "0" and "unlimited" work, but | |
1598 | command.c doesn't deal with that. So make it a var_zinteger | |
1599 | because the user can always use "999999" or some such for unlimited. */ | |
1600 | c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger, | |
1601 | (char *) &heuristic_fence_post, | |
1602 | "\ | |
1603 | Set the distance searched for the start of a function.\n\ | |
1604 | If you are debugging a stripped executable, GDB needs to search through the\n\ | |
1605 | program for the start of a function. This command sets the distance of the\n\ | |
1606 | search. The only need to set it is when debugging a stripped executable.", | |
1607 | &setlist); | |
1608 | /* We need to throw away the frame cache when we set this, since it | |
1609 | might change our ability to get backtraces. */ | |
9f60d481 | 1610 | set_cmd_sfunc (c, reinit_frame_cache_sfunc); |
c906108c SS |
1611 | add_show_from_set (c, &showlist); |
1612 | } |