Commit | Line | Data |
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c906108c | 1 | /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. |
1e698235 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
b6ba6518 | 3 | Free Software Foundation, Inc. |
c906108c | 4 | |
c5aa993b | 5 | This file is part of GDB. |
c906108c | 6 | |
c5aa993b JM |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
c906108c | 11 | |
c5aa993b JM |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
c906108c | 16 | |
c5aa993b JM |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
21 | |
22 | #include "defs.h" | |
615967cb | 23 | #include "doublest.h" |
c906108c | 24 | #include "frame.h" |
d2427a71 RH |
25 | #include "frame-unwind.h" |
26 | #include "frame-base.h" | |
baa490c4 | 27 | #include "dwarf2-frame.h" |
c906108c SS |
28 | #include "inferior.h" |
29 | #include "symtab.h" | |
30 | #include "value.h" | |
31 | #include "gdbcmd.h" | |
32 | #include "gdbcore.h" | |
33 | #include "dis-asm.h" | |
34 | #include "symfile.h" | |
35 | #include "objfiles.h" | |
36 | #include "gdb_string.h" | |
c5f0f3d0 | 37 | #include "linespec.h" |
4e052eda | 38 | #include "regcache.h" |
615967cb | 39 | #include "reggroups.h" |
dc129d82 | 40 | #include "arch-utils.h" |
4be87837 | 41 | #include "osabi.h" |
fe898f56 | 42 | #include "block.h" |
dc129d82 JT |
43 | |
44 | #include "elf-bfd.h" | |
45 | ||
46 | #include "alpha-tdep.h" | |
47 | ||
c906108c | 48 | \f |
fa88f677 | 49 | static const char * |
636a6dfc JT |
50 | alpha_register_name (int regno) |
51 | { | |
5ab84872 | 52 | static const char * const register_names[] = |
636a6dfc JT |
53 | { |
54 | "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", | |
55 | "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", | |
56 | "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", | |
57 | "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", | |
58 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
59 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
60 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
61 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", | |
44d88583 | 62 | "pc", "", "unique" |
636a6dfc JT |
63 | }; |
64 | ||
65 | if (regno < 0) | |
5ab84872 | 66 | return NULL; |
636a6dfc | 67 | if (regno >= (sizeof(register_names) / sizeof(*register_names))) |
5ab84872 RH |
68 | return NULL; |
69 | return register_names[regno]; | |
636a6dfc | 70 | } |
d734c450 | 71 | |
dc129d82 | 72 | static int |
d734c450 JT |
73 | alpha_cannot_fetch_register (int regno) |
74 | { | |
44d88583 | 75 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
76 | } |
77 | ||
dc129d82 | 78 | static int |
d734c450 JT |
79 | alpha_cannot_store_register (int regno) |
80 | { | |
44d88583 | 81 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
82 | } |
83 | ||
dc129d82 | 84 | static struct type * |
c483c494 | 85 | alpha_register_type (struct gdbarch *gdbarch, int regno) |
0d056799 | 86 | { |
72667056 RH |
87 | if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) |
88 | return builtin_type_void_data_ptr; | |
89 | if (regno == ALPHA_PC_REGNUM) | |
90 | return builtin_type_void_func_ptr; | |
91 | ||
92 | /* Don't need to worry about little vs big endian until | |
93 | some jerk tries to port to alpha-unicosmk. */ | |
b38b6be2 | 94 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) |
72667056 RH |
95 | return builtin_type_ieee_double_little; |
96 | ||
97 | return builtin_type_int64; | |
0d056799 | 98 | } |
f8453e34 | 99 | |
615967cb RH |
100 | /* Is REGNUM a member of REGGROUP? */ |
101 | ||
102 | static int | |
103 | alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
104 | struct reggroup *group) | |
105 | { | |
106 | /* Filter out any registers eliminated, but whose regnum is | |
107 | reserved for backward compatibility, e.g. the vfp. */ | |
108 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') | |
109 | return 0; | |
110 | ||
df4a182b RH |
111 | if (group == all_reggroup) |
112 | return 1; | |
113 | ||
114 | /* Zero should not be saved or restored. Technically it is a general | |
115 | register (just as $f31 would be a float if we represented it), but | |
116 | there's no point displaying it during "info regs", so leave it out | |
117 | of all groups except for "all". */ | |
118 | if (regnum == ALPHA_ZERO_REGNUM) | |
119 | return 0; | |
120 | ||
121 | /* All other registers are saved and restored. */ | |
122 | if (group == save_reggroup || group == restore_reggroup) | |
615967cb RH |
123 | return 1; |
124 | ||
125 | /* All other groups are non-overlapping. */ | |
126 | ||
127 | /* Since this is really a PALcode memory slot... */ | |
128 | if (regnum == ALPHA_UNIQUE_REGNUM) | |
129 | return group == system_reggroup; | |
130 | ||
131 | /* Force the FPCR to be considered part of the floating point state. */ | |
132 | if (regnum == ALPHA_FPCR_REGNUM) | |
133 | return group == float_reggroup; | |
134 | ||
135 | if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) | |
136 | return group == float_reggroup; | |
137 | else | |
138 | return group == general_reggroup; | |
139 | } | |
140 | ||
dc129d82 | 141 | static int |
f8453e34 JT |
142 | alpha_register_byte (int regno) |
143 | { | |
144 | return (regno * 8); | |
145 | } | |
146 | ||
dc129d82 | 147 | static int |
f8453e34 JT |
148 | alpha_register_raw_size (int regno) |
149 | { | |
150 | return 8; | |
151 | } | |
152 | ||
dc129d82 | 153 | static int |
f8453e34 JT |
154 | alpha_register_virtual_size (int regno) |
155 | { | |
156 | return 8; | |
157 | } | |
636a6dfc | 158 | |
c483c494 RH |
159 | /* The following represents exactly the conversion performed by |
160 | the LDS instruction. This applies to both single-precision | |
161 | floating point and 32-bit integers. */ | |
162 | ||
163 | static void | |
164 | alpha_lds (void *out, const void *in) | |
165 | { | |
166 | ULONGEST mem = extract_unsigned_integer (in, 4); | |
167 | ULONGEST frac = (mem >> 0) & 0x7fffff; | |
168 | ULONGEST sign = (mem >> 31) & 1; | |
169 | ULONGEST exp_msb = (mem >> 30) & 1; | |
170 | ULONGEST exp_low = (mem >> 23) & 0x7f; | |
171 | ULONGEST exp, reg; | |
172 | ||
173 | exp = (exp_msb << 10) | exp_low; | |
174 | if (exp_msb) | |
175 | { | |
176 | if (exp_low == 0x7f) | |
177 | exp = 0x7ff; | |
178 | } | |
179 | else | |
180 | { | |
181 | if (exp_low != 0x00) | |
182 | exp |= 0x380; | |
183 | } | |
184 | ||
185 | reg = (sign << 63) | (exp << 52) | (frac << 29); | |
186 | store_unsigned_integer (out, 8, reg); | |
187 | } | |
188 | ||
189 | /* Similarly, this represents exactly the conversion performed by | |
190 | the STS instruction. */ | |
191 | ||
192 | static inline void | |
193 | alpha_sts (void *out, const void *in) | |
194 | { | |
195 | ULONGEST reg, mem; | |
196 | ||
197 | reg = extract_unsigned_integer (in, 8); | |
198 | mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); | |
199 | store_unsigned_integer (out, 4, mem); | |
200 | } | |
201 | ||
d2427a71 RH |
202 | /* The alpha needs a conversion between register and memory format if the |
203 | register is a floating point register and memory format is float, as the | |
204 | register format must be double or memory format is an integer with 4 | |
205 | bytes or less, as the representation of integers in floating point | |
206 | registers is different. */ | |
207 | ||
c483c494 RH |
208 | static int |
209 | alpha_convert_register_p (int regno) | |
14696584 | 210 | { |
c483c494 | 211 | return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31); |
14696584 RH |
212 | } |
213 | ||
d2427a71 | 214 | static void |
c483c494 | 215 | alpha_register_to_value (int regnum, struct type *valtype, char *in, char *out) |
5868c862 | 216 | { |
c483c494 | 217 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 218 | { |
c483c494 RH |
219 | case 4: |
220 | alpha_sts (out, in); | |
221 | break; | |
222 | case 8: | |
223 | memcpy (out, in, 8); | |
224 | break; | |
225 | default: | |
226 | error ("Cannot retrieve value from floating point register"); | |
d2427a71 | 227 | } |
d2427a71 | 228 | } |
5868c862 | 229 | |
d2427a71 | 230 | static void |
c483c494 | 231 | alpha_value_to_register (struct type *valtype, int regnum, char *in, char *out) |
d2427a71 | 232 | { |
c483c494 | 233 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 234 | { |
c483c494 RH |
235 | case 4: |
236 | alpha_lds (out, in); | |
237 | break; | |
238 | case 8: | |
239 | memcpy (out, in, 8); | |
240 | break; | |
241 | default: | |
242 | error ("Cannot store value in floating point register"); | |
d2427a71 | 243 | } |
5868c862 JT |
244 | } |
245 | ||
d2427a71 RH |
246 | \f |
247 | /* The alpha passes the first six arguments in the registers, the rest on | |
c88e30c0 RH |
248 | the stack. The register arguments are stored in ARG_REG_BUFFER, and |
249 | then moved into the register file; this simplifies the passing of a | |
250 | large struct which extends from the registers to the stack, plus avoids | |
251 | three ptrace invocations per word. | |
252 | ||
253 | We don't bother tracking which register values should go in integer | |
254 | regs or fp regs; we load the same values into both. | |
255 | ||
d2427a71 RH |
256 | If the called function is returning a structure, the address of the |
257 | structure to be returned is passed as a hidden first argument. */ | |
c906108c | 258 | |
d2427a71 | 259 | static CORE_ADDR |
c88e30c0 RH |
260 | alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
261 | struct regcache *regcache, CORE_ADDR bp_addr, | |
262 | int nargs, struct value **args, CORE_ADDR sp, | |
263 | int struct_return, CORE_ADDR struct_addr) | |
c906108c | 264 | { |
d2427a71 RH |
265 | int i; |
266 | int accumulate_size = struct_return ? 8 : 0; | |
d2427a71 | 267 | struct alpha_arg |
c906108c | 268 | { |
d2427a71 RH |
269 | char *contents; |
270 | int len; | |
271 | int offset; | |
272 | }; | |
c88e30c0 RH |
273 | struct alpha_arg *alpha_args |
274 | = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); | |
d2427a71 | 275 | register struct alpha_arg *m_arg; |
c88e30c0 | 276 | char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; |
d2427a71 | 277 | int required_arg_regs; |
c906108c | 278 | |
c88e30c0 RH |
279 | /* The ABI places the address of the called function in T12. */ |
280 | regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); | |
281 | ||
282 | /* Set the return address register to point to the entry point | |
283 | of the program, where a breakpoint lies in wait. */ | |
284 | regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); | |
285 | ||
286 | /* Lay out the arguments in memory. */ | |
d2427a71 RH |
287 | for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) |
288 | { | |
289 | struct value *arg = args[i]; | |
290 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
c88e30c0 | 291 | |
d2427a71 RH |
292 | /* Cast argument to long if necessary as the compiler does it too. */ |
293 | switch (TYPE_CODE (arg_type)) | |
c906108c | 294 | { |
d2427a71 RH |
295 | case TYPE_CODE_INT: |
296 | case TYPE_CODE_BOOL: | |
297 | case TYPE_CODE_CHAR: | |
298 | case TYPE_CODE_RANGE: | |
299 | case TYPE_CODE_ENUM: | |
0ede8eca | 300 | if (TYPE_LENGTH (arg_type) == 4) |
d2427a71 | 301 | { |
0ede8eca RH |
302 | /* 32-bit values must be sign-extended to 64 bits |
303 | even if the base data type is unsigned. */ | |
304 | arg_type = builtin_type_int32; | |
305 | arg = value_cast (arg_type, arg); | |
306 | } | |
307 | if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) | |
308 | { | |
309 | arg_type = builtin_type_int64; | |
d2427a71 RH |
310 | arg = value_cast (arg_type, arg); |
311 | } | |
312 | break; | |
7b5e1cb3 | 313 | |
c88e30c0 RH |
314 | case TYPE_CODE_FLT: |
315 | /* "float" arguments loaded in registers must be passed in | |
316 | register format, aka "double". */ | |
317 | if (accumulate_size < sizeof (arg_reg_buffer) | |
318 | && TYPE_LENGTH (arg_type) == 4) | |
319 | { | |
eb4edb88 | 320 | arg_type = builtin_type_ieee_double_little; |
c88e30c0 RH |
321 | arg = value_cast (arg_type, arg); |
322 | } | |
323 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
324 | invisible reference. No one else uses this data type. */ | |
325 | else if (TYPE_LENGTH (arg_type) == 16) | |
326 | { | |
327 | /* Allocate aligned storage. */ | |
328 | sp = (sp & -16) - 16; | |
329 | ||
330 | /* Write the real data into the stack. */ | |
331 | write_memory (sp, VALUE_CONTENTS (arg), 16); | |
332 | ||
333 | /* Construct the indirection. */ | |
334 | arg_type = lookup_pointer_type (arg_type); | |
335 | arg = value_from_pointer (arg_type, sp); | |
336 | } | |
337 | break; | |
7b5e1cb3 RH |
338 | |
339 | case TYPE_CODE_COMPLEX: | |
340 | /* ??? The ABI says that complex values are passed as two | |
341 | separate scalar values. This distinction only matters | |
342 | for complex float. However, GCC does not implement this. */ | |
343 | ||
344 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
345 | invisible reference. */ | |
346 | if (TYPE_LENGTH (arg_type) == 32) | |
347 | { | |
348 | /* Allocate aligned storage. */ | |
349 | sp = (sp & -16) - 16; | |
350 | ||
351 | /* Write the real data into the stack. */ | |
352 | write_memory (sp, VALUE_CONTENTS (arg), 32); | |
353 | ||
354 | /* Construct the indirection. */ | |
355 | arg_type = lookup_pointer_type (arg_type); | |
356 | arg = value_from_pointer (arg_type, sp); | |
357 | } | |
358 | break; | |
359 | ||
d2427a71 RH |
360 | default: |
361 | break; | |
c906108c | 362 | } |
d2427a71 RH |
363 | m_arg->len = TYPE_LENGTH (arg_type); |
364 | m_arg->offset = accumulate_size; | |
365 | accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; | |
366 | m_arg->contents = VALUE_CONTENTS (arg); | |
c906108c SS |
367 | } |
368 | ||
d2427a71 RH |
369 | /* Determine required argument register loads, loading an argument register |
370 | is expensive as it uses three ptrace calls. */ | |
371 | required_arg_regs = accumulate_size / 8; | |
372 | if (required_arg_regs > ALPHA_NUM_ARG_REGS) | |
373 | required_arg_regs = ALPHA_NUM_ARG_REGS; | |
c906108c | 374 | |
d2427a71 | 375 | /* Make room for the arguments on the stack. */ |
c88e30c0 RH |
376 | if (accumulate_size < sizeof(arg_reg_buffer)) |
377 | accumulate_size = 0; | |
378 | else | |
379 | accumulate_size -= sizeof(arg_reg_buffer); | |
d2427a71 | 380 | sp -= accumulate_size; |
c906108c | 381 | |
c88e30c0 | 382 | /* Keep sp aligned to a multiple of 16 as the ABI requires. */ |
d2427a71 | 383 | sp &= ~15; |
c906108c | 384 | |
d2427a71 RH |
385 | /* `Push' arguments on the stack. */ |
386 | for (i = nargs; m_arg--, --i >= 0;) | |
c906108c | 387 | { |
c88e30c0 RH |
388 | char *contents = m_arg->contents; |
389 | int offset = m_arg->offset; | |
390 | int len = m_arg->len; | |
391 | ||
392 | /* Copy the bytes destined for registers into arg_reg_buffer. */ | |
393 | if (offset < sizeof(arg_reg_buffer)) | |
394 | { | |
395 | if (offset + len <= sizeof(arg_reg_buffer)) | |
396 | { | |
397 | memcpy (arg_reg_buffer + offset, contents, len); | |
398 | continue; | |
399 | } | |
400 | else | |
401 | { | |
402 | int tlen = sizeof(arg_reg_buffer) - offset; | |
403 | memcpy (arg_reg_buffer + offset, contents, tlen); | |
404 | offset += tlen; | |
405 | contents += tlen; | |
406 | len -= tlen; | |
407 | } | |
408 | } | |
409 | ||
410 | /* Everything else goes to the stack. */ | |
411 | write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); | |
c906108c | 412 | } |
c88e30c0 RH |
413 | if (struct_return) |
414 | store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr); | |
c906108c | 415 | |
d2427a71 RH |
416 | /* Load the argument registers. */ |
417 | for (i = 0; i < required_arg_regs; i++) | |
418 | { | |
09cc52fd RH |
419 | regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, |
420 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
421 | regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, | |
422 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
d2427a71 | 423 | } |
c906108c | 424 | |
09cc52fd RH |
425 | /* Finally, update the stack pointer. */ |
426 | regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); | |
427 | ||
c88e30c0 | 428 | return sp; |
c906108c SS |
429 | } |
430 | ||
5ec2bb99 RH |
431 | /* Extract from REGCACHE the value about to be returned from a function |
432 | and copy it into VALBUF. */ | |
d2427a71 | 433 | |
dc129d82 | 434 | static void |
5ec2bb99 RH |
435 | alpha_extract_return_value (struct type *valtype, struct regcache *regcache, |
436 | void *valbuf) | |
140f9984 | 437 | { |
7b5e1cb3 | 438 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
439 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
440 | ULONGEST l; | |
441 | ||
442 | switch (TYPE_CODE (valtype)) | |
443 | { | |
444 | case TYPE_CODE_FLT: | |
7b5e1cb3 | 445 | switch (length) |
5ec2bb99 RH |
446 | { |
447 | case 4: | |
448 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); | |
c483c494 | 449 | alpha_sts (valbuf, raw_buffer); |
5ec2bb99 RH |
450 | break; |
451 | ||
452 | case 8: | |
453 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
454 | break; | |
455 | ||
24064b5c RH |
456 | case 16: |
457 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
458 | read_memory (l, valbuf, 16); | |
459 | break; | |
460 | ||
5ec2bb99 | 461 | default: |
67dfac52 | 462 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
463 | } |
464 | break; | |
465 | ||
7b5e1cb3 RH |
466 | case TYPE_CODE_COMPLEX: |
467 | switch (length) | |
468 | { | |
469 | case 8: | |
470 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
471 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
472 | break; | |
473 | ||
474 | case 16: | |
475 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
476 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1, | |
477 | (char *)valbuf + 8); | |
478 | break; | |
479 | ||
480 | case 32: | |
481 | regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); | |
482 | read_memory (l, valbuf, 32); | |
483 | break; | |
484 | ||
485 | default: | |
67dfac52 | 486 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
487 | } |
488 | break; | |
489 | ||
5ec2bb99 RH |
490 | default: |
491 | /* Assume everything else degenerates to an integer. */ | |
492 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
7b5e1cb3 | 493 | store_unsigned_integer (valbuf, length, l); |
5ec2bb99 RH |
494 | break; |
495 | } | |
140f9984 JT |
496 | } |
497 | ||
5ec2bb99 RH |
498 | /* Extract from REGCACHE the address of a structure about to be returned |
499 | from a function. */ | |
500 | ||
501 | static CORE_ADDR | |
502 | alpha_extract_struct_value_address (struct regcache *regcache) | |
503 | { | |
504 | ULONGEST addr; | |
505 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); | |
506 | return addr; | |
507 | } | |
508 | ||
509 | /* Insert the given value into REGCACHE as if it was being | |
510 | returned by a function. */ | |
0d056799 | 511 | |
d2427a71 | 512 | static void |
5ec2bb99 RH |
513 | alpha_store_return_value (struct type *valtype, struct regcache *regcache, |
514 | const void *valbuf) | |
c906108c | 515 | { |
d2427a71 | 516 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
517 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
518 | ULONGEST l; | |
d2427a71 | 519 | |
5ec2bb99 | 520 | switch (TYPE_CODE (valtype)) |
c906108c | 521 | { |
5ec2bb99 RH |
522 | case TYPE_CODE_FLT: |
523 | switch (length) | |
524 | { | |
525 | case 4: | |
c483c494 | 526 | alpha_lds (raw_buffer, valbuf); |
f75d70cc RH |
527 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
528 | break; | |
5ec2bb99 RH |
529 | |
530 | case 8: | |
531 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
532 | break; | |
533 | ||
24064b5c RH |
534 | case 16: |
535 | /* FIXME: 128-bit long doubles are returned like structures: | |
536 | by writing into indirect storage provided by the caller | |
537 | as the first argument. */ | |
538 | error ("Cannot set a 128-bit long double return value."); | |
539 | ||
5ec2bb99 | 540 | default: |
67dfac52 | 541 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
542 | } |
543 | break; | |
d2427a71 | 544 | |
7b5e1cb3 RH |
545 | case TYPE_CODE_COMPLEX: |
546 | switch (length) | |
547 | { | |
548 | case 8: | |
549 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
550 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
551 | break; | |
552 | ||
553 | case 16: | |
554 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
555 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1, | |
556 | (const char *)valbuf + 8); | |
557 | break; | |
558 | ||
559 | case 32: | |
560 | /* FIXME: 128-bit long doubles are returned like structures: | |
561 | by writing into indirect storage provided by the caller | |
562 | as the first argument. */ | |
563 | error ("Cannot set a 128-bit long double return value."); | |
564 | ||
565 | default: | |
67dfac52 | 566 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
567 | } |
568 | break; | |
569 | ||
5ec2bb99 RH |
570 | default: |
571 | /* Assume everything else degenerates to an integer. */ | |
0ede8eca RH |
572 | /* 32-bit values must be sign-extended to 64 bits |
573 | even if the base data type is unsigned. */ | |
574 | if (length == 4) | |
575 | valtype = builtin_type_int32; | |
5ec2bb99 RH |
576 | l = unpack_long (valtype, valbuf); |
577 | regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); | |
578 | break; | |
579 | } | |
c906108c SS |
580 | } |
581 | ||
d2427a71 RH |
582 | static int |
583 | alpha_use_struct_convention (int gcc_p, struct type *type) | |
c906108c | 584 | { |
d2427a71 RH |
585 | /* Structures are returned by ref in extra arg0. */ |
586 | return 1; | |
587 | } | |
c906108c | 588 | |
d2427a71 RH |
589 | \f |
590 | static const unsigned char * | |
591 | alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
c906108c | 592 | { |
d2427a71 RH |
593 | static const unsigned char alpha_breakpoint[] = |
594 | { 0x80, 0, 0, 0 }; /* call_pal bpt */ | |
c906108c | 595 | |
d2427a71 RH |
596 | *lenptr = sizeof(alpha_breakpoint); |
597 | return (alpha_breakpoint); | |
598 | } | |
c906108c | 599 | |
d2427a71 RH |
600 | \f |
601 | /* This returns the PC of the first insn after the prologue. | |
602 | If we can't find the prologue, then return 0. */ | |
c906108c | 603 | |
d2427a71 RH |
604 | CORE_ADDR |
605 | alpha_after_prologue (CORE_ADDR pc) | |
c906108c | 606 | { |
d2427a71 RH |
607 | struct symtab_and_line sal; |
608 | CORE_ADDR func_addr, func_end; | |
c906108c | 609 | |
d2427a71 | 610 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
c5aa993b | 611 | return 0; |
c906108c | 612 | |
d2427a71 RH |
613 | sal = find_pc_line (func_addr, 0); |
614 | if (sal.end < func_end) | |
615 | return sal.end; | |
c5aa993b | 616 | |
d2427a71 RH |
617 | /* The line after the prologue is after the end of the function. In this |
618 | case, tell the caller to find the prologue the hard way. */ | |
619 | return 0; | |
c906108c SS |
620 | } |
621 | ||
d2427a71 RH |
622 | /* Read an instruction from memory at PC, looking through breakpoints. */ |
623 | ||
624 | unsigned int | |
625 | alpha_read_insn (CORE_ADDR pc) | |
c906108c | 626 | { |
d2427a71 RH |
627 | char buf[4]; |
628 | int status; | |
c5aa993b | 629 | |
d2427a71 RH |
630 | status = read_memory_nobpt (pc, buf, 4); |
631 | if (status) | |
632 | memory_error (status, pc); | |
633 | return extract_unsigned_integer (buf, 4); | |
634 | } | |
c5aa993b | 635 | |
d2427a71 RH |
636 | /* To skip prologues, I use this predicate. Returns either PC itself |
637 | if the code at PC does not look like a function prologue; otherwise | |
638 | returns an address that (if we're lucky) follows the prologue. If | |
639 | LENIENT, then we must skip everything which is involved in setting | |
640 | up the frame (it's OK to skip more, just so long as we don't skip | |
641 | anything which might clobber the registers which are being saved. */ | |
c906108c | 642 | |
d2427a71 RH |
643 | static CORE_ADDR |
644 | alpha_skip_prologue (CORE_ADDR pc) | |
645 | { | |
646 | unsigned long inst; | |
647 | int offset; | |
648 | CORE_ADDR post_prologue_pc; | |
649 | char buf[4]; | |
c906108c | 650 | |
d2427a71 RH |
651 | /* Silently return the unaltered pc upon memory errors. |
652 | This could happen on OSF/1 if decode_line_1 tries to skip the | |
653 | prologue for quickstarted shared library functions when the | |
654 | shared library is not yet mapped in. | |
655 | Reading target memory is slow over serial lines, so we perform | |
656 | this check only if the target has shared libraries (which all | |
657 | Alpha targets do). */ | |
658 | if (target_read_memory (pc, buf, 4)) | |
659 | return pc; | |
c906108c | 660 | |
d2427a71 RH |
661 | /* See if we can determine the end of the prologue via the symbol table. |
662 | If so, then return either PC, or the PC after the prologue, whichever | |
663 | is greater. */ | |
c906108c | 664 | |
d2427a71 RH |
665 | post_prologue_pc = alpha_after_prologue (pc); |
666 | if (post_prologue_pc != 0) | |
667 | return max (pc, post_prologue_pc); | |
c906108c | 668 | |
d2427a71 RH |
669 | /* Can't determine prologue from the symbol table, need to examine |
670 | instructions. */ | |
dc1b0db2 | 671 | |
d2427a71 RH |
672 | /* Skip the typical prologue instructions. These are the stack adjustment |
673 | instruction and the instructions that save registers on the stack | |
674 | or in the gcc frame. */ | |
675 | for (offset = 0; offset < 100; offset += 4) | |
676 | { | |
677 | inst = alpha_read_insn (pc + offset); | |
c906108c | 678 | |
d2427a71 RH |
679 | if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ |
680 | continue; | |
681 | if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ | |
682 | continue; | |
683 | if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ | |
684 | continue; | |
685 | if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ | |
686 | continue; | |
c906108c | 687 | |
d2427a71 RH |
688 | if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ |
689 | || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ | |
690 | && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ | |
691 | continue; | |
c906108c | 692 | |
d2427a71 RH |
693 | if (inst == 0x47de040f) /* bis sp,sp,fp */ |
694 | continue; | |
695 | if (inst == 0x47fe040f) /* bis zero,sp,fp */ | |
696 | continue; | |
c906108c | 697 | |
d2427a71 | 698 | break; |
c906108c | 699 | } |
d2427a71 RH |
700 | return pc + offset; |
701 | } | |
c906108c | 702 | |
d2427a71 RH |
703 | \f |
704 | /* Figure out where the longjmp will land. | |
705 | We expect the first arg to be a pointer to the jmp_buf structure from | |
706 | which we extract the PC (JB_PC) that we will land at. The PC is copied | |
707 | into the "pc". This routine returns true on success. */ | |
c906108c SS |
708 | |
709 | static int | |
d2427a71 | 710 | alpha_get_longjmp_target (CORE_ADDR *pc) |
c906108c | 711 | { |
d2427a71 RH |
712 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
713 | CORE_ADDR jb_addr; | |
5ab84872 | 714 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
c906108c | 715 | |
d2427a71 | 716 | jb_addr = read_register (ALPHA_A0_REGNUM); |
c906108c | 717 | |
d2427a71 RH |
718 | if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), |
719 | raw_buffer, tdep->jb_elt_size)) | |
c906108c | 720 | return 0; |
d2427a71 | 721 | |
7c0b4a20 | 722 | *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size); |
d2427a71 | 723 | return 1; |
c906108c SS |
724 | } |
725 | ||
d2427a71 RH |
726 | \f |
727 | /* Frame unwinder for signal trampolines. We use alpha tdep bits that | |
728 | describe the location and shape of the sigcontext structure. After | |
729 | that, all registers are in memory, so it's easy. */ | |
730 | /* ??? Shouldn't we be able to do this generically, rather than with | |
731 | OSABI data specific to Alpha? */ | |
732 | ||
733 | struct alpha_sigtramp_unwind_cache | |
c906108c | 734 | { |
d2427a71 RH |
735 | CORE_ADDR sigcontext_addr; |
736 | }; | |
c906108c | 737 | |
d2427a71 RH |
738 | static struct alpha_sigtramp_unwind_cache * |
739 | alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame, | |
740 | void **this_prologue_cache) | |
741 | { | |
742 | struct alpha_sigtramp_unwind_cache *info; | |
743 | struct gdbarch_tdep *tdep; | |
c906108c | 744 | |
d2427a71 RH |
745 | if (*this_prologue_cache) |
746 | return *this_prologue_cache; | |
c906108c | 747 | |
d2427a71 RH |
748 | info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); |
749 | *this_prologue_cache = info; | |
c906108c | 750 | |
d2427a71 RH |
751 | tdep = gdbarch_tdep (current_gdbarch); |
752 | info->sigcontext_addr = tdep->sigcontext_addr (next_frame); | |
c906108c | 753 | |
d2427a71 | 754 | return info; |
c906108c SS |
755 | } |
756 | ||
d2427a71 RH |
757 | /* Return the address of REGNO in a sigtramp frame. Since this is all |
758 | arithmetic, it doesn't seem worthwhile to cache it. */ | |
c5aa993b | 759 | |
d2427a71 RH |
760 | #ifndef SIGFRAME_PC_OFF |
761 | #define SIGFRAME_PC_OFF (2 * 8) | |
762 | #define SIGFRAME_REGSAVE_OFF (4 * 8) | |
763 | #define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8) | |
764 | #endif | |
c5aa993b | 765 | |
d2427a71 RH |
766 | static CORE_ADDR |
767 | alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno) | |
768 | { | |
769 | if (regno < 32) | |
770 | return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8; | |
b38b6be2 | 771 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 32) |
d2427a71 | 772 | return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8; |
b38b6be2 | 773 | if (regno == ALPHA_PC_REGNUM) |
d2427a71 | 774 | return sigcontext_addr + SIGFRAME_PC_OFF; |
c5aa993b | 775 | |
d2427a71 | 776 | return 0; |
c906108c SS |
777 | } |
778 | ||
d2427a71 RH |
779 | /* Given a GDB frame, determine the address of the calling function's |
780 | frame. This will be used to create a new GDB frame struct. */ | |
140f9984 | 781 | |
dc129d82 | 782 | static void |
d2427a71 RH |
783 | alpha_sigtramp_frame_this_id (struct frame_info *next_frame, |
784 | void **this_prologue_cache, | |
785 | struct frame_id *this_id) | |
c906108c | 786 | { |
d2427a71 RH |
787 | struct alpha_sigtramp_unwind_cache *info |
788 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
789 | struct gdbarch_tdep *tdep; | |
790 | CORE_ADDR stack_addr, code_addr; | |
791 | ||
792 | /* If the OSABI couldn't locate the sigcontext, give up. */ | |
793 | if (info->sigcontext_addr == 0) | |
794 | return; | |
795 | ||
796 | /* If we have dynamic signal trampolines, find their start. | |
797 | If we do not, then we must assume there is a symbol record | |
798 | that can provide the start address. */ | |
799 | tdep = gdbarch_tdep (current_gdbarch); | |
800 | if (tdep->dynamic_sigtramp_offset) | |
c906108c | 801 | { |
d2427a71 RH |
802 | int offset; |
803 | code_addr = frame_pc_unwind (next_frame); | |
804 | offset = tdep->dynamic_sigtramp_offset (code_addr); | |
805 | if (offset >= 0) | |
806 | code_addr -= offset; | |
c906108c | 807 | else |
d2427a71 | 808 | code_addr = 0; |
c906108c | 809 | } |
d2427a71 RH |
810 | else |
811 | code_addr = frame_func_unwind (next_frame); | |
c906108c | 812 | |
d2427a71 RH |
813 | /* The stack address is trivially read from the sigcontext. */ |
814 | stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr, | |
815 | ALPHA_SP_REGNUM); | |
b21fd293 RH |
816 | stack_addr = get_frame_memory_unsigned (next_frame, stack_addr, |
817 | ALPHA_REGISTER_SIZE); | |
c906108c | 818 | |
d2427a71 | 819 | *this_id = frame_id_build (stack_addr, code_addr); |
c906108c SS |
820 | } |
821 | ||
d2427a71 | 822 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
c906108c | 823 | |
d2427a71 RH |
824 | static void |
825 | alpha_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
826 | void **this_prologue_cache, | |
827 | int regnum, int *optimizedp, | |
828 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
829 | int *realnump, void *bufferp) | |
c906108c | 830 | { |
d2427a71 RH |
831 | struct alpha_sigtramp_unwind_cache *info |
832 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
833 | CORE_ADDR addr; | |
c906108c | 834 | |
d2427a71 | 835 | if (info->sigcontext_addr != 0) |
c906108c | 836 | { |
d2427a71 RH |
837 | /* All integer and fp registers are stored in memory. */ |
838 | addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum); | |
839 | if (addr != 0) | |
c906108c | 840 | { |
d2427a71 RH |
841 | *optimizedp = 0; |
842 | *lvalp = lval_memory; | |
843 | *addrp = addr; | |
844 | *realnump = -1; | |
845 | if (bufferp != NULL) | |
b21fd293 | 846 | get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE); |
d2427a71 | 847 | return; |
c906108c | 848 | } |
c906108c SS |
849 | } |
850 | ||
d2427a71 RH |
851 | /* This extra register may actually be in the sigcontext, but our |
852 | current description of it in alpha_sigtramp_frame_unwind_cache | |
853 | doesn't include it. Too bad. Fall back on whatever's in the | |
854 | outer frame. */ | |
855 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
856 | realnump, bufferp); | |
857 | } | |
c906108c | 858 | |
d2427a71 RH |
859 | static const struct frame_unwind alpha_sigtramp_frame_unwind = { |
860 | SIGTRAMP_FRAME, | |
861 | alpha_sigtramp_frame_this_id, | |
862 | alpha_sigtramp_frame_prev_register | |
863 | }; | |
c906108c | 864 | |
d2427a71 RH |
865 | static const struct frame_unwind * |
866 | alpha_sigtramp_frame_p (CORE_ADDR pc) | |
867 | { | |
868 | char *name; | |
c906108c | 869 | |
d2427a71 RH |
870 | /* We shouldn't even bother to try if the OSABI didn't register |
871 | a sigcontext_addr handler. */ | |
872 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
873 | return NULL; | |
c906108c | 874 | |
d2427a71 RH |
875 | /* Otherwise we should be in a signal frame. */ |
876 | find_pc_partial_function (pc, &name, NULL, NULL); | |
877 | if (PC_IN_SIGTRAMP (pc, name)) | |
878 | return &alpha_sigtramp_frame_unwind; | |
c906108c | 879 | |
d2427a71 | 880 | return NULL; |
c906108c | 881 | } |
d2427a71 RH |
882 | \f |
883 | /* Fallback alpha frame unwinder. Uses instruction scanning and knows | |
884 | something about the traditional layout of alpha stack frames. */ | |
c906108c | 885 | |
d2427a71 | 886 | struct alpha_heuristic_unwind_cache |
c906108c | 887 | { |
d2427a71 RH |
888 | CORE_ADDR *saved_regs; |
889 | CORE_ADDR vfp; | |
890 | CORE_ADDR start_pc; | |
891 | int return_reg; | |
892 | }; | |
c906108c | 893 | |
d2427a71 RH |
894 | /* Heuristic_proc_start may hunt through the text section for a long |
895 | time across a 2400 baud serial line. Allows the user to limit this | |
896 | search. */ | |
897 | static unsigned int heuristic_fence_post = 0; | |
c906108c | 898 | |
d2427a71 RH |
899 | /* Attempt to locate the start of the function containing PC. We assume that |
900 | the previous function ends with an about_to_return insn. Not foolproof by | |
901 | any means, since gcc is happy to put the epilogue in the middle of a | |
902 | function. But we're guessing anyway... */ | |
c906108c | 903 | |
d2427a71 RH |
904 | static CORE_ADDR |
905 | alpha_heuristic_proc_start (CORE_ADDR pc) | |
906 | { | |
907 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
908 | CORE_ADDR last_non_nop = pc; | |
909 | CORE_ADDR fence = pc - heuristic_fence_post; | |
910 | CORE_ADDR orig_pc = pc; | |
fbe586ae | 911 | CORE_ADDR func; |
9e0b60a8 | 912 | |
d2427a71 RH |
913 | if (pc == 0) |
914 | return 0; | |
9e0b60a8 | 915 | |
fbe586ae RH |
916 | /* First see if we can find the start of the function from minimal |
917 | symbol information. This can succeed with a binary that doesn't | |
918 | have debug info, but hasn't been stripped. */ | |
919 | func = get_pc_function_start (pc); | |
920 | if (func) | |
921 | return func; | |
922 | ||
d2427a71 RH |
923 | if (heuristic_fence_post == UINT_MAX |
924 | || fence < tdep->vm_min_address) | |
925 | fence = tdep->vm_min_address; | |
c906108c | 926 | |
d2427a71 RH |
927 | /* Search back for previous return; also stop at a 0, which might be |
928 | seen for instance before the start of a code section. Don't include | |
929 | nops, since this usually indicates padding between functions. */ | |
930 | for (pc -= 4; pc >= fence; pc -= 4) | |
c906108c | 931 | { |
d2427a71 RH |
932 | unsigned int insn = alpha_read_insn (pc); |
933 | switch (insn) | |
c906108c | 934 | { |
d2427a71 RH |
935 | case 0: /* invalid insn */ |
936 | case 0x6bfa8001: /* ret $31,($26),1 */ | |
937 | return last_non_nop; | |
938 | ||
939 | case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ | |
940 | case 0x47ff041f: /* nop: bis $31,$31,$31 */ | |
941 | break; | |
942 | ||
943 | default: | |
944 | last_non_nop = pc; | |
945 | break; | |
c906108c | 946 | } |
d2427a71 | 947 | } |
c906108c | 948 | |
d2427a71 RH |
949 | /* It's not clear to me why we reach this point when stopping quietly, |
950 | but with this test, at least we don't print out warnings for every | |
951 | child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ | |
952 | if (stop_soon == NO_STOP_QUIETLY) | |
953 | { | |
954 | static int blurb_printed = 0; | |
c906108c | 955 | |
d2427a71 RH |
956 | if (fence == tdep->vm_min_address) |
957 | warning ("Hit beginning of text section without finding"); | |
c906108c | 958 | else |
d2427a71 RH |
959 | warning ("Hit heuristic-fence-post without finding"); |
960 | warning ("enclosing function for address 0x%s", paddr_nz (orig_pc)); | |
c906108c | 961 | |
d2427a71 RH |
962 | if (!blurb_printed) |
963 | { | |
964 | printf_filtered ("\ | |
965 | This warning occurs if you are debugging a function without any symbols\n\ | |
966 | (for example, in a stripped executable). In that case, you may wish to\n\ | |
967 | increase the size of the search with the `set heuristic-fence-post' command.\n\ | |
968 | \n\ | |
969 | Otherwise, you told GDB there was a function where there isn't one, or\n\ | |
970 | (more likely) you have encountered a bug in GDB.\n"); | |
971 | blurb_printed = 1; | |
972 | } | |
973 | } | |
c906108c | 974 | |
d2427a71 RH |
975 | return 0; |
976 | } | |
c906108c | 977 | |
fbe586ae | 978 | static struct alpha_heuristic_unwind_cache * |
d2427a71 RH |
979 | alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame, |
980 | void **this_prologue_cache, | |
981 | CORE_ADDR start_pc) | |
982 | { | |
983 | struct alpha_heuristic_unwind_cache *info; | |
984 | ULONGEST val; | |
985 | CORE_ADDR limit_pc, cur_pc; | |
986 | int frame_reg, frame_size, return_reg, reg; | |
c906108c | 987 | |
d2427a71 RH |
988 | if (*this_prologue_cache) |
989 | return *this_prologue_cache; | |
c906108c | 990 | |
d2427a71 RH |
991 | info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); |
992 | *this_prologue_cache = info; | |
993 | info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); | |
c906108c | 994 | |
d2427a71 RH |
995 | limit_pc = frame_pc_unwind (next_frame); |
996 | if (start_pc == 0) | |
997 | start_pc = alpha_heuristic_proc_start (limit_pc); | |
998 | info->start_pc = start_pc; | |
c906108c | 999 | |
d2427a71 RH |
1000 | frame_reg = ALPHA_SP_REGNUM; |
1001 | frame_size = 0; | |
1002 | return_reg = -1; | |
c906108c | 1003 | |
d2427a71 RH |
1004 | /* If we've identified a likely place to start, do code scanning. */ |
1005 | if (start_pc != 0) | |
c5aa993b | 1006 | { |
d2427a71 RH |
1007 | /* Limit the forward search to 50 instructions. */ |
1008 | if (start_pc + 200 < limit_pc) | |
1009 | limit_pc = start_pc + 200; | |
c5aa993b | 1010 | |
d2427a71 RH |
1011 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) |
1012 | { | |
1013 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1014 | |
d2427a71 RH |
1015 | if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
1016 | { | |
1017 | if (word & 0x8000) | |
1018 | { | |
1019 | /* Consider only the first stack allocation instruction | |
1020 | to contain the static size of the frame. */ | |
1021 | if (frame_size == 0) | |
1022 | frame_size = (-word) & 0xffff; | |
1023 | } | |
1024 | else | |
1025 | { | |
1026 | /* Exit loop if a positive stack adjustment is found, which | |
1027 | usually means that the stack cleanup code in the function | |
1028 | epilogue is reached. */ | |
1029 | break; | |
1030 | } | |
1031 | } | |
1032 | else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ | |
1033 | { | |
1034 | reg = (word & 0x03e00000) >> 21; | |
1035 | ||
1036 | if (reg == 31) | |
1037 | continue; | |
1038 | ||
1039 | /* Do not compute the address where the register was saved yet, | |
1040 | because we don't know yet if the offset will need to be | |
1041 | relative to $sp or $fp (we can not compute the address | |
1042 | relative to $sp if $sp is updated during the execution of | |
1043 | the current subroutine, for instance when doing some alloca). | |
1044 | So just store the offset for the moment, and compute the | |
1045 | address later when we know whether this frame has a frame | |
1046 | pointer or not. */ | |
1047 | /* Hack: temporarily add one, so that the offset is non-zero | |
1048 | and we can tell which registers have save offsets below. */ | |
1049 | info->saved_regs[reg] = (word & 0xffff) + 1; | |
1050 | ||
1051 | /* Starting with OSF/1-3.2C, the system libraries are shipped | |
1052 | without local symbols, but they still contain procedure | |
1053 | descriptors without a symbol reference. GDB is currently | |
1054 | unable to find these procedure descriptors and uses | |
1055 | heuristic_proc_desc instead. | |
1056 | As some low level compiler support routines (__div*, __add*) | |
1057 | use a non-standard return address register, we have to | |
1058 | add some heuristics to determine the return address register, | |
1059 | or stepping over these routines will fail. | |
1060 | Usually the return address register is the first register | |
1061 | saved on the stack, but assembler optimization might | |
1062 | rearrange the register saves. | |
1063 | So we recognize only a few registers (t7, t9, ra) within | |
1064 | the procedure prologue as valid return address registers. | |
1065 | If we encounter a return instruction, we extract the | |
1066 | the return address register from it. | |
1067 | ||
1068 | FIXME: Rewriting GDB to access the procedure descriptors, | |
1069 | e.g. via the minimal symbol table, might obviate this hack. */ | |
1070 | if (return_reg == -1 | |
1071 | && cur_pc < (start_pc + 80) | |
1072 | && (reg == ALPHA_T7_REGNUM | |
1073 | || reg == ALPHA_T9_REGNUM | |
1074 | || reg == ALPHA_RA_REGNUM)) | |
1075 | return_reg = reg; | |
1076 | } | |
1077 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1078 | return_reg = (word >> 16) & 0x1f; | |
1079 | else if (word == 0x47de040f) /* bis sp,sp,fp */ | |
1080 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1081 | else if (word == 0x47fe040f) /* bis zero,sp,fp */ | |
1082 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1083 | } | |
c5aa993b | 1084 | |
d2427a71 RH |
1085 | /* If we haven't found a valid return address register yet, keep |
1086 | searching in the procedure prologue. */ | |
1087 | if (return_reg == -1) | |
1088 | { | |
1089 | while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) | |
1090 | { | |
1091 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1092 | |
d2427a71 RH |
1093 | if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
1094 | { | |
1095 | reg = (word & 0x03e00000) >> 21; | |
1096 | if (reg == ALPHA_T7_REGNUM | |
1097 | || reg == ALPHA_T9_REGNUM | |
1098 | || reg == ALPHA_RA_REGNUM) | |
1099 | { | |
1100 | return_reg = reg; | |
1101 | break; | |
1102 | } | |
1103 | } | |
1104 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1105 | { | |
1106 | return_reg = (word >> 16) & 0x1f; | |
1107 | break; | |
1108 | } | |
85b32d22 RH |
1109 | |
1110 | cur_pc += 4; | |
d2427a71 RH |
1111 | } |
1112 | } | |
c906108c | 1113 | } |
c906108c | 1114 | |
d2427a71 RH |
1115 | /* Failing that, do default to the customary RA. */ |
1116 | if (return_reg == -1) | |
1117 | return_reg = ALPHA_RA_REGNUM; | |
1118 | info->return_reg = return_reg; | |
f8453e34 | 1119 | |
d2427a71 RH |
1120 | frame_unwind_unsigned_register (next_frame, frame_reg, &val); |
1121 | info->vfp = val + frame_size; | |
c906108c | 1122 | |
d2427a71 RH |
1123 | /* Convert offsets to absolute addresses. See above about adding |
1124 | one to the offsets to make all detected offsets non-zero. */ | |
1125 | for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) | |
1126 | if (info->saved_regs[reg]) | |
1127 | info->saved_regs[reg] += val - 1; | |
1128 | ||
1129 | return info; | |
c906108c | 1130 | } |
c906108c | 1131 | |
d2427a71 RH |
1132 | /* Given a GDB frame, determine the address of the calling function's |
1133 | frame. This will be used to create a new GDB frame struct. */ | |
1134 | ||
fbe586ae | 1135 | static void |
d2427a71 RH |
1136 | alpha_heuristic_frame_this_id (struct frame_info *next_frame, |
1137 | void **this_prologue_cache, | |
1138 | struct frame_id *this_id) | |
c906108c | 1139 | { |
d2427a71 RH |
1140 | struct alpha_heuristic_unwind_cache *info |
1141 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1142 | |
fbe586ae RH |
1143 | /* This is meant to halt the backtrace at "_start". Make sure we |
1144 | don't halt it at a generic dummy frame. */ | |
1145 | if (inside_entry_file (info->start_pc)) | |
1146 | return; | |
1147 | ||
d2427a71 | 1148 | *this_id = frame_id_build (info->vfp, info->start_pc); |
c906108c SS |
1149 | } |
1150 | ||
d2427a71 RH |
1151 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
1152 | ||
fbe586ae | 1153 | static void |
d2427a71 RH |
1154 | alpha_heuristic_frame_prev_register (struct frame_info *next_frame, |
1155 | void **this_prologue_cache, | |
1156 | int regnum, int *optimizedp, | |
1157 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1158 | int *realnump, void *bufferp) | |
c906108c | 1159 | { |
d2427a71 RH |
1160 | struct alpha_heuristic_unwind_cache *info |
1161 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
1162 | ||
1163 | /* The PC of the previous frame is stored in the link register of | |
1164 | the current frame. Frob regnum so that we pull the value from | |
1165 | the correct place. */ | |
1166 | if (regnum == ALPHA_PC_REGNUM) | |
1167 | regnum = info->return_reg; | |
1168 | ||
1169 | /* For all registers known to be saved in the current frame, | |
1170 | do the obvious and pull the value out. */ | |
1171 | if (info->saved_regs[regnum]) | |
c906108c | 1172 | { |
d2427a71 RH |
1173 | *optimizedp = 0; |
1174 | *lvalp = lval_memory; | |
1175 | *addrp = info->saved_regs[regnum]; | |
1176 | *realnump = -1; | |
1177 | if (bufferp != NULL) | |
b21fd293 | 1178 | get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE); |
c906108c SS |
1179 | return; |
1180 | } | |
1181 | ||
d2427a71 RH |
1182 | /* The stack pointer of the previous frame is computed by popping |
1183 | the current stack frame. */ | |
1184 | if (regnum == ALPHA_SP_REGNUM) | |
c906108c | 1185 | { |
d2427a71 RH |
1186 | *optimizedp = 0; |
1187 | *lvalp = not_lval; | |
1188 | *addrp = 0; | |
1189 | *realnump = -1; | |
1190 | if (bufferp != NULL) | |
1191 | store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp); | |
1192 | return; | |
c906108c | 1193 | } |
95b80706 | 1194 | |
d2427a71 RH |
1195 | /* Otherwise assume the next frame has the same register value. */ |
1196 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
1197 | realnump, bufferp); | |
95b80706 JT |
1198 | } |
1199 | ||
d2427a71 RH |
1200 | static const struct frame_unwind alpha_heuristic_frame_unwind = { |
1201 | NORMAL_FRAME, | |
1202 | alpha_heuristic_frame_this_id, | |
1203 | alpha_heuristic_frame_prev_register | |
1204 | }; | |
c906108c | 1205 | |
d2427a71 RH |
1206 | static const struct frame_unwind * |
1207 | alpha_heuristic_frame_p (CORE_ADDR pc) | |
c906108c | 1208 | { |
d2427a71 | 1209 | return &alpha_heuristic_frame_unwind; |
c906108c SS |
1210 | } |
1211 | ||
fbe586ae | 1212 | static CORE_ADDR |
d2427a71 RH |
1213 | alpha_heuristic_frame_base_address (struct frame_info *next_frame, |
1214 | void **this_prologue_cache) | |
c906108c | 1215 | { |
d2427a71 RH |
1216 | struct alpha_heuristic_unwind_cache *info |
1217 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1218 | |
d2427a71 | 1219 | return info->vfp; |
c906108c SS |
1220 | } |
1221 | ||
d2427a71 RH |
1222 | static const struct frame_base alpha_heuristic_frame_base = { |
1223 | &alpha_heuristic_frame_unwind, | |
1224 | alpha_heuristic_frame_base_address, | |
1225 | alpha_heuristic_frame_base_address, | |
1226 | alpha_heuristic_frame_base_address | |
1227 | }; | |
1228 | ||
c906108c | 1229 | /* Just like reinit_frame_cache, but with the right arguments to be |
d2427a71 | 1230 | callable as an sfunc. Used by the "set heuristic-fence-post" command. */ |
c906108c SS |
1231 | |
1232 | static void | |
fba45db2 | 1233 | reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) |
c906108c SS |
1234 | { |
1235 | reinit_frame_cache (); | |
1236 | } | |
1237 | ||
d2427a71 RH |
1238 | \f |
1239 | /* ALPHA stack frames are almost impenetrable. When execution stops, | |
1240 | we basically have to look at symbol information for the function | |
1241 | that we stopped in, which tells us *which* register (if any) is | |
1242 | the base of the frame pointer, and what offset from that register | |
1243 | the frame itself is at. | |
c906108c | 1244 | |
d2427a71 RH |
1245 | This presents a problem when trying to examine a stack in memory |
1246 | (that isn't executing at the moment), using the "frame" command. We | |
1247 | don't have a PC, nor do we have any registers except SP. | |
c906108c | 1248 | |
d2427a71 RH |
1249 | This routine takes two arguments, SP and PC, and tries to make the |
1250 | cached frames look as if these two arguments defined a frame on the | |
1251 | cache. This allows the rest of info frame to extract the important | |
1252 | arguments without difficulty. */ | |
ec32e4be | 1253 | |
d2427a71 RH |
1254 | struct frame_info * |
1255 | alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv) | |
0d056799 | 1256 | { |
d2427a71 RH |
1257 | if (argc != 2) |
1258 | error ("ALPHA frame specifications require two arguments: sp and pc"); | |
0d056799 | 1259 | |
d2427a71 | 1260 | return create_new_frame (argv[0], argv[1]); |
0d056799 JT |
1261 | } |
1262 | ||
d2427a71 RH |
1263 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1264 | dummy frame. The frame ID's base needs to match the TOS value | |
1265 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1266 | breakpoint. */ | |
d734c450 | 1267 | |
d2427a71 RH |
1268 | static struct frame_id |
1269 | alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
0d056799 | 1270 | { |
d2427a71 RH |
1271 | ULONGEST base; |
1272 | frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base); | |
1273 | return frame_id_build (base, frame_pc_unwind (next_frame)); | |
0d056799 JT |
1274 | } |
1275 | ||
dc129d82 | 1276 | static CORE_ADDR |
d2427a71 | 1277 | alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
accc6d1f | 1278 | { |
d2427a71 RH |
1279 | ULONGEST pc; |
1280 | frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc); | |
1281 | return pc; | |
accc6d1f JT |
1282 | } |
1283 | ||
98a8e1e5 RH |
1284 | \f |
1285 | /* Helper routines for alpha*-nat.c files to move register sets to and | |
1286 | from core files. The UNIQUE pointer is allowed to be NULL, as most | |
1287 | targets don't supply this value in their core files. */ | |
1288 | ||
1289 | void | |
1290 | alpha_supply_int_regs (int regno, const void *r0_r30, | |
1291 | const void *pc, const void *unique) | |
1292 | { | |
1293 | int i; | |
1294 | ||
1295 | for (i = 0; i < 31; ++i) | |
1296 | if (regno == i || regno == -1) | |
1297 | supply_register (i, (const char *)r0_r30 + i*8); | |
1298 | ||
1299 | if (regno == ALPHA_ZERO_REGNUM || regno == -1) | |
1300 | supply_register (ALPHA_ZERO_REGNUM, NULL); | |
1301 | ||
1302 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
1303 | supply_register (ALPHA_PC_REGNUM, pc); | |
1304 | ||
1305 | if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) | |
1306 | supply_register (ALPHA_UNIQUE_REGNUM, unique); | |
1307 | } | |
1308 | ||
1309 | void | |
1310 | alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique) | |
1311 | { | |
1312 | int i; | |
1313 | ||
1314 | for (i = 0; i < 31; ++i) | |
1315 | if (regno == i || regno == -1) | |
1316 | regcache_collect (i, (char *)r0_r30 + i*8); | |
1317 | ||
1318 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
1319 | regcache_collect (ALPHA_PC_REGNUM, pc); | |
1320 | ||
1321 | if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) | |
1322 | regcache_collect (ALPHA_UNIQUE_REGNUM, unique); | |
1323 | } | |
1324 | ||
1325 | void | |
1326 | alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr) | |
1327 | { | |
1328 | int i; | |
1329 | ||
1330 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1331 | if (regno == i || regno == -1) | |
1332 | supply_register (i, (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
1333 | ||
1334 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
1335 | supply_register (ALPHA_FPCR_REGNUM, fpcr); | |
1336 | } | |
1337 | ||
1338 | void | |
1339 | alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr) | |
1340 | { | |
1341 | int i; | |
1342 | ||
1343 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1344 | if (regno == i || regno == -1) | |
1345 | regcache_collect (i, (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
1346 | ||
1347 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
1348 | regcache_collect (ALPHA_FPCR_REGNUM, fpcr); | |
1349 | } | |
1350 | ||
d2427a71 | 1351 | \f |
ec32e4be JT |
1352 | /* alpha_software_single_step() is called just before we want to resume |
1353 | the inferior, if we want to single-step it but there is no hardware | |
1354 | or kernel single-step support (NetBSD on Alpha, for example). We find | |
1355 | the target of the coming instruction and breakpoint it. | |
1356 | ||
1357 | single_step is also called just after the inferior stops. If we had | |
1358 | set up a simulated single-step, we undo our damage. */ | |
1359 | ||
1360 | static CORE_ADDR | |
1361 | alpha_next_pc (CORE_ADDR pc) | |
1362 | { | |
1363 | unsigned int insn; | |
1364 | unsigned int op; | |
1365 | int offset; | |
1366 | LONGEST rav; | |
1367 | ||
b21fd293 | 1368 | insn = alpha_read_insn (pc); |
ec32e4be JT |
1369 | |
1370 | /* Opcode is top 6 bits. */ | |
1371 | op = (insn >> 26) & 0x3f; | |
1372 | ||
1373 | if (op == 0x1a) | |
1374 | { | |
1375 | /* Jump format: target PC is: | |
1376 | RB & ~3 */ | |
1377 | return (read_register ((insn >> 16) & 0x1f) & ~3); | |
1378 | } | |
1379 | ||
1380 | if ((op & 0x30) == 0x30) | |
1381 | { | |
1382 | /* Branch format: target PC is: | |
1383 | (new PC) + (4 * sext(displacement)) */ | |
1384 | if (op == 0x30 || /* BR */ | |
1385 | op == 0x34) /* BSR */ | |
1386 | { | |
1387 | branch_taken: | |
1388 | offset = (insn & 0x001fffff); | |
1389 | if (offset & 0x00100000) | |
1390 | offset |= 0xffe00000; | |
1391 | offset *= 4; | |
1392 | return (pc + 4 + offset); | |
1393 | } | |
1394 | ||
1395 | /* Need to determine if branch is taken; read RA. */ | |
1396 | rav = (LONGEST) read_register ((insn >> 21) & 0x1f); | |
1397 | switch (op) | |
1398 | { | |
1399 | case 0x38: /* BLBC */ | |
1400 | if ((rav & 1) == 0) | |
1401 | goto branch_taken; | |
1402 | break; | |
1403 | case 0x3c: /* BLBS */ | |
1404 | if (rav & 1) | |
1405 | goto branch_taken; | |
1406 | break; | |
1407 | case 0x39: /* BEQ */ | |
1408 | if (rav == 0) | |
1409 | goto branch_taken; | |
1410 | break; | |
1411 | case 0x3d: /* BNE */ | |
1412 | if (rav != 0) | |
1413 | goto branch_taken; | |
1414 | break; | |
1415 | case 0x3a: /* BLT */ | |
1416 | if (rav < 0) | |
1417 | goto branch_taken; | |
1418 | break; | |
1419 | case 0x3b: /* BLE */ | |
1420 | if (rav <= 0) | |
1421 | goto branch_taken; | |
1422 | break; | |
1423 | case 0x3f: /* BGT */ | |
1424 | if (rav > 0) | |
1425 | goto branch_taken; | |
1426 | break; | |
1427 | case 0x3e: /* BGE */ | |
1428 | if (rav >= 0) | |
1429 | goto branch_taken; | |
1430 | break; | |
d2427a71 RH |
1431 | |
1432 | /* ??? Missing floating-point branches. */ | |
ec32e4be JT |
1433 | } |
1434 | } | |
1435 | ||
1436 | /* Not a branch or branch not taken; target PC is: | |
1437 | pc + 4 */ | |
1438 | return (pc + 4); | |
1439 | } | |
1440 | ||
1441 | void | |
1442 | alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) | |
1443 | { | |
1444 | static CORE_ADDR next_pc; | |
1445 | typedef char binsn_quantum[BREAKPOINT_MAX]; | |
1446 | static binsn_quantum break_mem; | |
1447 | CORE_ADDR pc; | |
1448 | ||
1449 | if (insert_breakpoints_p) | |
1450 | { | |
1451 | pc = read_pc (); | |
1452 | next_pc = alpha_next_pc (pc); | |
1453 | ||
1454 | target_insert_breakpoint (next_pc, break_mem); | |
1455 | } | |
1456 | else | |
1457 | { | |
1458 | target_remove_breakpoint (next_pc, break_mem); | |
1459 | write_pc (next_pc); | |
1460 | } | |
c906108c SS |
1461 | } |
1462 | ||
dc129d82 | 1463 | \f |
dc129d82 JT |
1464 | /* Initialize the current architecture based on INFO. If possible, re-use an |
1465 | architecture from ARCHES, which is a list of architectures already created | |
1466 | during this debugging session. | |
1467 | ||
1468 | Called e.g. at program startup, when reading a core file, and when reading | |
1469 | a binary file. */ | |
1470 | ||
1471 | static struct gdbarch * | |
1472 | alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1473 | { | |
1474 | struct gdbarch_tdep *tdep; | |
1475 | struct gdbarch *gdbarch; | |
dc129d82 JT |
1476 | |
1477 | /* Try to determine the ABI of the object we are loading. */ | |
4be87837 | 1478 | if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) |
dc129d82 | 1479 | { |
4be87837 DJ |
1480 | /* If it's an ECOFF file, assume it's OSF/1. */ |
1481 | if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) | |
aff87235 | 1482 | info.osabi = GDB_OSABI_OSF1; |
dc129d82 JT |
1483 | } |
1484 | ||
1485 | /* Find a candidate among extant architectures. */ | |
4be87837 DJ |
1486 | arches = gdbarch_list_lookup_by_info (arches, &info); |
1487 | if (arches != NULL) | |
1488 | return arches->gdbarch; | |
dc129d82 JT |
1489 | |
1490 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1491 | gdbarch = gdbarch_alloc (&info, tdep); | |
1492 | ||
d2427a71 RH |
1493 | /* Lowest text address. This is used by heuristic_proc_start() |
1494 | to decide when to stop looking. */ | |
d9b023cc JT |
1495 | tdep->vm_min_address = (CORE_ADDR) 0x120000000; |
1496 | ||
36a6271d | 1497 | tdep->dynamic_sigtramp_offset = NULL; |
5868c862 | 1498 | tdep->sigcontext_addr = NULL; |
36a6271d | 1499 | |
accc6d1f JT |
1500 | tdep->jb_pc = -1; /* longjmp support not enabled by default */ |
1501 | ||
dc129d82 JT |
1502 | /* Type sizes */ |
1503 | set_gdbarch_short_bit (gdbarch, 16); | |
1504 | set_gdbarch_int_bit (gdbarch, 32); | |
1505 | set_gdbarch_long_bit (gdbarch, 64); | |
1506 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1507 | set_gdbarch_float_bit (gdbarch, 32); | |
1508 | set_gdbarch_double_bit (gdbarch, 64); | |
1509 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1510 | set_gdbarch_ptr_bit (gdbarch, 64); | |
1511 | ||
1512 | /* Register info */ | |
1513 | set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); | |
1514 | set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); | |
dc129d82 JT |
1515 | set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); |
1516 | set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); | |
1517 | ||
1518 | set_gdbarch_register_name (gdbarch, alpha_register_name); | |
dc129d82 JT |
1519 | set_gdbarch_register_byte (gdbarch, alpha_register_byte); |
1520 | set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size); | |
dc129d82 | 1521 | set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size); |
c483c494 | 1522 | set_gdbarch_register_type (gdbarch, alpha_register_type); |
dc129d82 JT |
1523 | |
1524 | set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); | |
1525 | set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); | |
1526 | ||
c483c494 RH |
1527 | set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); |
1528 | set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); | |
1529 | set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); | |
dc129d82 | 1530 | |
615967cb RH |
1531 | set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); |
1532 | ||
d2427a71 | 1533 | /* Prologue heuristics. */ |
dc129d82 JT |
1534 | set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); |
1535 | ||
5ef165c2 RH |
1536 | /* Disassembler. */ |
1537 | set_gdbarch_print_insn (gdbarch, print_insn_alpha); | |
1538 | ||
d2427a71 | 1539 | /* Call info. */ |
dc129d82 JT |
1540 | set_gdbarch_frameless_function_invocation (gdbarch, |
1541 | generic_frameless_function_invocation_not); | |
1542 | ||
dc129d82 | 1543 | set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention); |
5ec2bb99 RH |
1544 | set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value); |
1545 | set_gdbarch_store_return_value (gdbarch, alpha_store_return_value); | |
1546 | set_gdbarch_extract_struct_value_address (gdbarch, | |
dc129d82 JT |
1547 | alpha_extract_struct_value_address); |
1548 | ||
1549 | /* Settings for calling functions in the inferior. */ | |
c88e30c0 | 1550 | set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); |
d2427a71 RH |
1551 | |
1552 | /* Methods for saving / extracting a dummy frame's ID. */ | |
1553 | set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id); | |
1554 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); | |
1555 | ||
1556 | /* Return the unwound PC value. */ | |
1557 | set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); | |
dc129d82 JT |
1558 | |
1559 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
36a6271d | 1560 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
dc129d82 | 1561 | |
95b80706 | 1562 | set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); |
dc129d82 | 1563 | set_gdbarch_decr_pc_after_break (gdbarch, 4); |
95b80706 JT |
1564 | |
1565 | set_gdbarch_function_start_offset (gdbarch, 0); | |
dc129d82 JT |
1566 | set_gdbarch_frame_args_skip (gdbarch, 0); |
1567 | ||
44dffaac | 1568 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1569 | gdbarch_init_osabi (info, gdbarch); |
44dffaac | 1570 | |
accc6d1f JT |
1571 | /* Now that we have tuned the configuration, set a few final things |
1572 | based on what the OS ABI has told us. */ | |
1573 | ||
1574 | if (tdep->jb_pc >= 0) | |
1575 | set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); | |
1576 | ||
d2427a71 RH |
1577 | frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p); |
1578 | frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p); | |
dc129d82 | 1579 | |
d2427a71 | 1580 | frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); |
accc6d1f | 1581 | |
d2427a71 | 1582 | return gdbarch; |
dc129d82 JT |
1583 | } |
1584 | ||
baa490c4 RH |
1585 | void |
1586 | alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1587 | { | |
1588 | frame_unwind_append_predicate (gdbarch, dwarf2_frame_p); | |
1589 | frame_base_append_predicate (gdbarch, dwarf2_frame_base_p); | |
1590 | set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info); | |
1591 | } | |
1592 | ||
c906108c | 1593 | void |
fba45db2 | 1594 | _initialize_alpha_tdep (void) |
c906108c SS |
1595 | { |
1596 | struct cmd_list_element *c; | |
1597 | ||
d2427a71 | 1598 | gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); |
c906108c SS |
1599 | |
1600 | /* Let the user set the fence post for heuristic_proc_start. */ | |
1601 | ||
1602 | /* We really would like to have both "0" and "unlimited" work, but | |
1603 | command.c doesn't deal with that. So make it a var_zinteger | |
1604 | because the user can always use "999999" or some such for unlimited. */ | |
1605 | c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger, | |
1606 | (char *) &heuristic_fence_post, | |
1607 | "\ | |
1608 | Set the distance searched for the start of a function.\n\ | |
1609 | If you are debugging a stripped executable, GDB needs to search through the\n\ | |
1610 | program for the start of a function. This command sets the distance of the\n\ | |
1611 | search. The only need to set it is when debugging a stripped executable.", | |
1612 | &setlist); | |
1613 | /* We need to throw away the frame cache when we set this, since it | |
1614 | might change our ability to get backtraces. */ | |
9f60d481 | 1615 | set_cmd_sfunc (c, reinit_frame_cache_sfunc); |
c906108c SS |
1616 | add_show_from_set (c, &showlist); |
1617 | } |