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da8ca43d JT |
1 | /* Target-dependent code for NetBSD/Alpha. |
2 | Copyright 2002 Free Software Foundation, Inc. | |
3 | Contributed by Wasabi Systems, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "gdbcore.h" | |
8513dd2d | 24 | #include "regcache.h" |
da8ca43d | 25 | #include "value.h" |
da8ca43d JT |
26 | |
27 | #include "alpha-tdep.h" | |
8513dd2d | 28 | #include "alphabsd-tdep.h" |
ea5bc2a6 | 29 | #include "nbsd-tdep.h" |
8513dd2d JT |
30 | |
31 | static void | |
32 | fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which, | |
33 | CORE_ADDR ignore) | |
34 | { | |
35 | char *regs, *fpregs; | |
36 | int regno; | |
37 | ||
38 | /* Table to map a gdb register number to a trapframe register index. */ | |
39 | static const int regmap[] = | |
40 | { | |
41 | 0, 1, 2, 3, | |
42 | 4, 5, 6, 7, | |
43 | 8, 9, 10, 11, | |
44 | 12, 13, 14, 15, | |
45 | 30, 31, 32, 16, | |
46 | 17, 18, 19, 20, | |
47 | 21, 22, 23, 24, | |
48 | 25, 29, 26 | |
49 | }; | |
50 | #define SIZEOF_TRAPFRAME (33 * 8) | |
51 | ||
52 | /* We get everything from one section. */ | |
53 | if (which != 0) | |
54 | return; | |
55 | ||
56 | regs = core_reg_sect; | |
57 | fpregs = core_reg_sect + SIZEOF_TRAPFRAME; | |
58 | ||
59 | if (core_reg_size < (SIZEOF_TRAPFRAME + SIZEOF_STRUCT_FPREG)) | |
60 | { | |
61 | warning ("Wrong size register set in core file."); | |
62 | return; | |
63 | } | |
64 | ||
65 | /* Integer registers. */ | |
66 | for (regno = 0; regno < ALPHA_ZERO_REGNUM; regno++) | |
67 | supply_register (regno, regs + (regmap[regno] * 8)); | |
68 | supply_register (ALPHA_ZERO_REGNUM, NULL); | |
69 | supply_register (FP_REGNUM, NULL); | |
70 | supply_register (PC_REGNUM, regs + (28 * 8)); | |
71 | ||
72 | /* Floating point registers. */ | |
73 | alphabsd_supply_fpreg (fpregs, -1); | |
74 | } | |
75 | ||
76 | static void | |
77 | fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which, | |
78 | CORE_ADDR ignore) | |
79 | { | |
80 | switch (which) | |
81 | { | |
82 | case 0: /* Integer registers. */ | |
83 | if (core_reg_size != SIZEOF_STRUCT_REG) | |
84 | warning ("Wrong size register set in core file."); | |
85 | else | |
86 | alphabsd_supply_reg (core_reg_sect, -1); | |
87 | break; | |
88 | ||
89 | case 2: /* Floating point registers. */ | |
90 | if (core_reg_size != SIZEOF_STRUCT_FPREG) | |
91 | warning ("Wrong size FP register set in core file."); | |
92 | else | |
93 | alphabsd_supply_fpreg (core_reg_sect, -1); | |
94 | break; | |
95 | ||
96 | default: | |
97 | /* Don't know what kind of register request this is; just ignore it. */ | |
98 | break; | |
99 | } | |
100 | } | |
101 | ||
102 | static struct core_fns alphanbsd_core_fns = | |
103 | { | |
104 | bfd_target_unknown_flavour, /* core_flavour */ | |
105 | default_check_format, /* check_format */ | |
106 | default_core_sniffer, /* core_sniffer */ | |
107 | fetch_core_registers, /* core_read_registers */ | |
108 | NULL /* next */ | |
109 | }; | |
110 | ||
111 | static struct core_fns alphanbsd_elfcore_fns = | |
112 | { | |
113 | bfd_target_elf_flavour, /* core_flavour */ | |
114 | default_check_format, /* check_format */ | |
115 | default_core_sniffer, /* core_sniffer */ | |
116 | fetch_elfcore_registers, /* core_read_registers */ | |
117 | NULL /* next */ | |
118 | }; | |
da8ca43d | 119 | |
da8ca43d JT |
120 | /* Under NetBSD/alpha, signal handler invocations can be identified by the |
121 | designated code sequence that is used to return from a signal handler. | |
122 | In particular, the return address of a signal handler points to the | |
123 | following code sequence: | |
124 | ||
125 | ldq a0, 0(sp) | |
126 | lda sp, 16(sp) | |
127 | lda v0, 295(zero) # __sigreturn14 | |
128 | call_pal callsys | |
129 | ||
130 | Each instruction has a unique encoding, so we simply attempt to match | |
131 | the instruction the PC is pointing to with any of the above instructions. | |
132 | If there is a hit, we know the offset to the start of the designated | |
133 | sequence and can then check whether we really are executing in the | |
134 | signal trampoline. If not, -1 is returned, otherwise the offset from the | |
135 | start of the return sequence is returned. */ | |
136 | static const unsigned int sigtramp_retcode[] = | |
137 | { | |
138 | 0xa61e0000, /* ldq a0, 0(sp) */ | |
139 | 0x23de0010, /* lda sp, 16(sp) */ | |
140 | 0x201f0127, /* lda v0, 295(zero) */ | |
141 | 0x00000083, /* call_pal callsys */ | |
142 | }; | |
143 | #define RETCODE_NWORDS \ | |
144 | (sizeof (sigtramp_retcode) / sizeof (sigtramp_retcode[0])) | |
145 | ||
146 | LONGEST | |
147 | alphanbsd_sigtramp_offset (CORE_ADDR pc) | |
148 | { | |
149 | unsigned int ret[4], w; | |
150 | LONGEST off; | |
151 | int i; | |
152 | ||
153 | if (read_memory_nobpt (pc, (char *) &w, 4) != 0) | |
154 | return -1; | |
155 | ||
156 | for (i = 0; i < RETCODE_NWORDS; i++) | |
157 | { | |
158 | if (w == sigtramp_retcode[i]) | |
159 | break; | |
160 | } | |
161 | if (i == RETCODE_NWORDS) | |
162 | return (-1); | |
163 | ||
164 | off = i * 4; | |
165 | pc -= off; | |
166 | ||
167 | if (read_memory_nobpt (pc, (char *) ret, sizeof (ret)) != 0) | |
168 | return -1; | |
169 | ||
170 | if (memcmp (ret, sigtramp_retcode, sizeof (sigtramp_retcode)) == 0) | |
171 | return off; | |
172 | ||
173 | return -1; | |
174 | } | |
175 | ||
6c72f9f9 JT |
176 | static int |
177 | alphanbsd_pc_in_sigtramp (CORE_ADDR pc, char *func_name) | |
178 | { | |
179 | return (alphanbsd_sigtramp_offset (pc) >= 0); | |
180 | } | |
181 | ||
da8ca43d JT |
182 | static void |
183 | alphanbsd_init_abi (struct gdbarch_info info, | |
184 | struct gdbarch *gdbarch) | |
185 | { | |
186 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
187 | ||
6c72f9f9 JT |
188 | set_gdbarch_pc_in_sigtramp (gdbarch, alphanbsd_pc_in_sigtramp); |
189 | ||
da8ca43d JT |
190 | /* NetBSD/alpha does not provide single step support via ptrace(2); we |
191 | must use software single-stepping. */ | |
192 | set_gdbarch_software_single_step (gdbarch, alpha_software_single_step); | |
193 | ||
194 | set_solib_svr4_fetch_link_map_offsets (gdbarch, | |
ea5bc2a6 | 195 | nbsd_lp64_solib_svr4_fetch_link_map_offsets); |
da8ca43d JT |
196 | |
197 | tdep->dynamic_sigtramp_offset = alphanbsd_sigtramp_offset; | |
accc6d1f JT |
198 | |
199 | tdep->jb_pc = 2; | |
200 | tdep->jb_elt_size = 8; | |
da8ca43d JT |
201 | } |
202 | ||
203 | void | |
204 | _initialize_alphanbsd_tdep (void) | |
205 | { | |
206 | alpha_gdbarch_register_os_abi (ALPHA_ABI_NETBSD, alphanbsd_init_abi); | |
8513dd2d JT |
207 | |
208 | add_core_fns (&alphanbsd_core_fns); | |
209 | add_core_fns (&alphanbsd_elfcore_fns); | |
da8ca43d | 210 | } |