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cced5e27 MK |
1 | /* Native-dependent code for AMD64 BSD's. |
2 | ||
e2882c85 | 3 | Copyright (C) 2003-2018 Free Software Foundation, Inc. |
cced5e27 MK |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
cced5e27 MK |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
cced5e27 MK |
19 | |
20 | #include "defs.h" | |
21 | #include "inferior.h" | |
22 | #include "regcache.h" | |
6a5c78a3 | 23 | #include "target.h" |
cced5e27 MK |
24 | |
25 | /* We include <signal.h> to make sure `struct fxsave64' is defined on | |
26 | NetBSD, since NetBSD's <machine/reg.h> needs it. */ | |
cced5e27 MK |
27 | #include <signal.h> |
28 | #include <sys/types.h> | |
29 | #include <sys/ptrace.h> | |
30 | #include <machine/reg.h> | |
31 | ||
85be1ca6 | 32 | #include "amd64-tdep.h" |
cced5e27 | 33 | #include "amd64-nat.h" |
03b62bbb | 34 | #include "x86-bsd-nat.h" |
6a5c78a3 | 35 | #include "inf-ptrace.h" |
cced5e27 MK |
36 | \f |
37 | ||
38 | /* Fetch register REGNUM from the inferior. If REGNUM is -1, do this | |
39 | for all registers (including the floating-point registers). */ | |
40 | ||
f6ac5f3d PA |
41 | void |
42 | amd64bsd_fetch_inferior_registers (struct regcache *regcache, int regnum) | |
cced5e27 | 43 | { |
ac7936df | 44 | struct gdbarch *gdbarch = regcache->arch (); |
222312d3 | 45 | pid_t pid = get_ptrace_pid (regcache->ptid ()); |
f8028488 MD |
46 | |
47 | if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum)) | |
cced5e27 MK |
48 | { |
49 | struct reg regs; | |
50 | ||
49907934 | 51 | if (ptrace (PT_GETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1) |
edefbb7c | 52 | perror_with_name (_("Couldn't get registers")); |
cced5e27 | 53 | |
56be3814 | 54 | amd64_supply_native_gregset (regcache, ®s, -1); |
cced5e27 MK |
55 | if (regnum != -1) |
56 | return; | |
57 | } | |
58 | ||
0aa37b65 JB |
59 | #ifdef PT_GETFSBASE |
60 | if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM) | |
61 | { | |
62 | register_t base; | |
63 | ||
64 | if (ptrace (PT_GETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) | |
65 | perror_with_name (_("Couldn't get segment register fs_base")); | |
66 | ||
73e1c03f | 67 | regcache->raw_supply (AMD64_FSBASE_REGNUM, &base); |
0aa37b65 JB |
68 | if (regnum != -1) |
69 | return; | |
70 | } | |
71 | #endif | |
72 | #ifdef PT_GETGSBASE | |
73 | if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM) | |
74 | { | |
75 | register_t base; | |
76 | ||
77 | if (ptrace (PT_GETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) | |
78 | perror_with_name (_("Couldn't get segment register gs_base")); | |
79 | ||
73e1c03f | 80 | regcache->raw_supply (AMD64_GSBASE_REGNUM, &base); |
0aa37b65 JB |
81 | if (regnum != -1) |
82 | return; | |
83 | } | |
84 | #endif | |
85 | ||
f8028488 | 86 | if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum)) |
cced5e27 MK |
87 | { |
88 | struct fpreg fpregs; | |
97de3545 | 89 | #ifdef PT_GETXSTATE_INFO |
21002a63 | 90 | void *xstateregs; |
97de3545 | 91 | |
a3405d12 | 92 | if (x86bsd_xsave_len != 0) |
97de3545 | 93 | { |
a3405d12 | 94 | xstateregs = alloca (x86bsd_xsave_len); |
49907934 JB |
95 | if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) |
96 | == -1) | |
97de3545 JB |
97 | perror_with_name (_("Couldn't get extended state status")); |
98 | ||
99 | amd64_supply_xsave (regcache, -1, xstateregs); | |
100 | return; | |
101 | } | |
102 | #endif | |
cced5e27 | 103 | |
49907934 | 104 | if (ptrace (PT_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1) |
edefbb7c | 105 | perror_with_name (_("Couldn't get floating point status")); |
cced5e27 | 106 | |
56be3814 | 107 | amd64_supply_fxsave (regcache, -1, &fpregs); |
cced5e27 MK |
108 | } |
109 | } | |
110 | ||
111 | /* Store register REGNUM back into the inferior. If REGNUM is -1, do | |
112 | this for all registers (including the floating-point registers). */ | |
113 | ||
f6ac5f3d PA |
114 | void |
115 | amd64bsd_store_inferior_registers (struct regcache *regcache, int regnum) | |
cced5e27 | 116 | { |
ac7936df | 117 | struct gdbarch *gdbarch = regcache->arch (); |
222312d3 | 118 | pid_t pid = get_ptrace_pid (regcache->ptid ()); |
f8028488 MD |
119 | |
120 | if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum)) | |
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121 | { |
122 | struct reg regs; | |
123 | ||
49907934 | 124 | if (ptrace (PT_GETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1) |
edefbb7c | 125 | perror_with_name (_("Couldn't get registers")); |
cced5e27 | 126 | |
56be3814 | 127 | amd64_collect_native_gregset (regcache, ®s, regnum); |
cced5e27 | 128 | |
49907934 | 129 | if (ptrace (PT_SETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1) |
edefbb7c | 130 | perror_with_name (_("Couldn't write registers")); |
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131 | |
132 | if (regnum != -1) | |
133 | return; | |
134 | } | |
135 | ||
0aa37b65 JB |
136 | #ifdef PT_SETFSBASE |
137 | if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM) | |
138 | { | |
139 | register_t base; | |
140 | ||
34a79281 | 141 | regcache->raw_collect (AMD64_FSBASE_REGNUM, &base); |
0aa37b65 JB |
142 | |
143 | if (ptrace (PT_SETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) | |
144 | perror_with_name (_("Couldn't write segment register fs_base")); | |
145 | if (regnum != -1) | |
146 | return; | |
147 | } | |
148 | #endif | |
149 | #ifdef PT_SETGSBASE | |
150 | if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM) | |
151 | { | |
152 | register_t base; | |
153 | ||
34a79281 | 154 | regcache->raw_collect (AMD64_GSBASE_REGNUM, &base); |
0aa37b65 JB |
155 | |
156 | if (ptrace (PT_SETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) | |
157 | perror_with_name (_("Couldn't write segment register gs_base")); | |
158 | if (regnum != -1) | |
159 | return; | |
160 | } | |
161 | #endif | |
162 | ||
f8028488 | 163 | if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum)) |
cced5e27 MK |
164 | { |
165 | struct fpreg fpregs; | |
97de3545 | 166 | #ifdef PT_GETXSTATE_INFO |
21002a63 | 167 | void *xstateregs; |
97de3545 | 168 | |
a3405d12 | 169 | if (x86bsd_xsave_len != 0) |
97de3545 | 170 | { |
a3405d12 | 171 | xstateregs = alloca (x86bsd_xsave_len); |
49907934 JB |
172 | if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) |
173 | == -1) | |
97de3545 JB |
174 | perror_with_name (_("Couldn't get extended state status")); |
175 | ||
176 | amd64_collect_xsave (regcache, regnum, xstateregs, 0); | |
177 | ||
49907934 JB |
178 | if (ptrace (PT_SETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, |
179 | x86bsd_xsave_len) == -1) | |
97de3545 JB |
180 | perror_with_name (_("Couldn't write extended state status")); |
181 | return; | |
182 | } | |
183 | #endif | |
cced5e27 | 184 | |
49907934 | 185 | if (ptrace (PT_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1) |
edefbb7c | 186 | perror_with_name (_("Couldn't get floating point status")); |
cced5e27 | 187 | |
56be3814 | 188 | amd64_collect_fxsave (regcache, regnum, &fpregs); |
cced5e27 | 189 | |
49907934 | 190 | if (ptrace (PT_SETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1) |
edefbb7c | 191 | perror_with_name (_("Couldn't write floating point status")); |
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192 | } |
193 | } |