gold/
[deliverable/binutils-gdb.git] / gdb / amd64-nat.c
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1/* Native-dependent code for AMD64.
2
28e7fd62 3 Copyright (C) 2003-2013 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20#include "defs.h"
21#include "gdbarch.h"
22#include "regcache.h"
23
24#include "gdb_assert.h"
041bd74b 25#include "gdb_string.h"
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26
27#include "i386-tdep.h"
85be1ca6 28#include "amd64-tdep.h"
2c0b251b 29#include "amd64-nat.h"
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30
31/* The following bits of code help with implementing debugging 32-bit
32 code natively on AMD64. The idea is to define two mappings between
33 the register number as used by GDB and the register set used by the
34 host to represent the general-purpose registers; one for 32-bit
35 code and one for 64-bit code. The mappings are specified by the
36 follwing variables and consist of an array of offsets within the
37 register set indexed by register number, and the number of
38 registers supported by the mapping. We don't need mappings for the
39 floating-point and SSE registers, since the difference between
40 64-bit and 32-bit variants are negligable. The difference in the
41 number of SSE registers is already handled by the target code. */
42
43/* General-purpose register mapping for native 32-bit code. */
44int *amd64_native_gregset32_reg_offset;
45int amd64_native_gregset32_num_regs = I386_NUM_GREGS;
46
47/* General-purpose register mapping for native 64-bit code. */
48int *amd64_native_gregset64_reg_offset;
90f90721 49int amd64_native_gregset64_num_regs = AMD64_NUM_GREGS;
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50
51/* Return the offset of REGNUM within the appropriate native
52 general-purpose register set. */
53
54static int
f8028488 55amd64_native_gregset_reg_offset (struct gdbarch *gdbarch, int regnum)
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56{
57 int *reg_offset = amd64_native_gregset64_reg_offset;
58 int num_regs = amd64_native_gregset64_num_regs;
59
60 gdb_assert (regnum >= 0);
61
233dfcf0 62 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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63 {
64 reg_offset = amd64_native_gregset32_reg_offset;
65 num_regs = amd64_native_gregset32_num_regs;
66 }
67
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68 if (num_regs > gdbarch_num_regs (gdbarch))
69 num_regs = gdbarch_num_regs (gdbarch);
2a6d284d 70
f8028488 71 if (regnum < num_regs && regnum < gdbarch_num_regs (gdbarch))
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72 return reg_offset[regnum];
73
74 return -1;
75}
76
77/* Return whether the native general-purpose register set supplies
78 register REGNUM. */
79
80int
f8028488 81amd64_native_gregset_supplies_p (struct gdbarch *gdbarch, int regnum)
2a6d284d 82{
f8028488 83 return (amd64_native_gregset_reg_offset (gdbarch, regnum) != -1);
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84}
85
86
ecba89de 87/* Supply register REGNUM, whose contents are stored in GREGS, to
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88 REGCACHE. If REGNUM is -1, supply all appropriate registers. */
89
90void
91amd64_supply_native_gregset (struct regcache *regcache,
92 const void *gregs, int regnum)
93{
94 const char *regs = gregs;
b053aceb 95 struct gdbarch *gdbarch = get_regcache_arch (regcache);
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96 int num_regs = amd64_native_gregset64_num_regs;
97 int i;
98
233dfcf0 99 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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100 num_regs = amd64_native_gregset32_num_regs;
101
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102 if (num_regs > gdbarch_num_regs (gdbarch))
103 num_regs = gdbarch_num_regs (gdbarch);
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104
105 for (i = 0; i < num_regs; i++)
106 {
107 if (regnum == -1 || regnum == i)
108 {
f8028488 109 int offset = amd64_native_gregset_reg_offset (gdbarch, i);
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110
111 if (offset != -1)
b053aceb 112 regcache_raw_supply (regcache, i, regs + offset);
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113 }
114 }
115}
116
117/* Collect register REGNUM from REGCACHE and store its contents in
118 GREGS. If REGNUM is -1, collect and store all appropriate
119 registers. */
120
121void
122amd64_collect_native_gregset (const struct regcache *regcache,
123 void *gregs, int regnum)
124{
125 char *regs = gregs;
b053aceb 126 struct gdbarch *gdbarch = get_regcache_arch (regcache);
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127 int num_regs = amd64_native_gregset64_num_regs;
128 int i;
129
233dfcf0 130 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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131 {
132 num_regs = amd64_native_gregset32_num_regs;
133
134 /* Make sure %eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp and
135 %eip get zero-extended to 64 bits. */
136 for (i = 0; i <= I386_EIP_REGNUM; i++)
137 {
138 if (regnum == -1 || regnum == i)
f8028488 139 memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
041bd74b 140 }
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141 /* Ditto for %cs, %ss, %ds, %es, %fs, and %gs. */
142 for (i = I386_CS_REGNUM; i <= I386_GS_REGNUM; i++)
143 {
144 if (regnum == -1 || regnum == i)
f8028488 145 memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
e9ff708b 146 }
041bd74b 147 }
2a6d284d 148
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149 if (num_regs > gdbarch_num_regs (gdbarch))
150 num_regs = gdbarch_num_regs (gdbarch);
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151
152 for (i = 0; i < num_regs; i++)
153 {
154 if (regnum == -1 || regnum == i)
155 {
f8028488 156 int offset = amd64_native_gregset_reg_offset (gdbarch, i);
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157
158 if (offset != -1)
b053aceb 159 regcache_raw_collect (regcache, i, regs + offset);
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160 }
161 }
162}
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