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90f90721 | 1 | /* Target-dependent definitions for AMD64. |
c4f35dd8 | 2 | |
af233647 | 3 | Copyright 2001, 2003, 2004 Free Software Foundation, Inc. |
53e95fcf JS |
4 | Contributed by Jiri Smid, SuSE Labs. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
9c1488cb MK |
23 | #ifndef AMD64_TDEP_H |
24 | #define AMD64_TDEP_H | |
53e95fcf | 25 | |
da3331ec AC |
26 | struct gdbarch; |
27 | struct frame_info; | |
221c12ff | 28 | struct regcache; |
da3331ec | 29 | |
53e95fcf | 30 | #include "i386-tdep.h" |
53e95fcf | 31 | |
402ecd56 MK |
32 | /* Register numbers of various important registers. */ |
33 | ||
90f90721 MK |
34 | enum amd64_regnum |
35 | { | |
36 | AMD64_RAX_REGNUM, /* %rax */ | |
37 | AMD64_RBX_REGNUM, /* %rbx */ | |
38 | AMD64_RCX_REGNUM, /* %rcx */ | |
39 | AMD64_RDX_REGNUM, /* %rdx */ | |
40 | AMD64_RSI_REGNUM, /* %rsi */ | |
41 | AMD64_RDI_REGNUM, /* %rdi */ | |
42 | AMD64_RBP_REGNUM, /* %rbp */ | |
43 | AMD64_RSP_REGNUM, /* %rsp */ | |
44 | AMD64_R8_REGNUM = 8, /* %r8 */ | |
45 | AMD64_R15_REGNUM = 15, /* %r15 */ | |
46 | AMD64_RIP_REGNUM, /* %rip */ | |
47 | AMD64_EFLAGS_REGNUM, /* %eflags */ | |
296bc76f MK |
48 | AMD64_CS_REGNUM, /* %cs */ |
49 | AMD64_SS_REGNUM, /* %ss */ | |
50 | AMD64_DS_REGNUM, /* %ds */ | |
51 | AMD64_ES_REGNUM, /* %es */ | |
52 | AMD64_FS_REGNUM, /* %fs */ | |
53 | AMD64_GS_REGNUM, /* %gs */ | |
90f90721 MK |
54 | AMD64_ST0_REGNUM = 24, /* %st0 */ |
55 | AMD64_XMM0_REGNUM = 40, /* %xmm0 */ | |
56 | AMD64_XMM1_REGNUM /* %xmm1 */ | |
57 | }; | |
402ecd56 | 58 | |
c4f35dd8 | 59 | /* Number of general purpose registers. */ |
90f90721 | 60 | #define AMD64_NUM_GREGS 24 |
c4f35dd8 | 61 | |
90f90721 | 62 | extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch); |
53e95fcf | 63 | |
41d041d6 | 64 | /* Fill register REGNUM in REGCACHE with the appropriate |
0485f6ad MK |
65 | floating-point or SSE register value from *FXSAVE. If REGNUM is |
66 | -1, do this for all registers. This function masks off any of the | |
67 | reserved bits in *FXSAVE. */ | |
b64bbf8c | 68 | |
90f90721 MK |
69 | extern void amd64_supply_fxsave (struct regcache *regcache, int regnum, |
70 | const void *fxsave); | |
baed091b | 71 | |
3c017e40 MK |
72 | /* Fill register REGNUM (if it is a floating-point or SSE register) in |
73 | *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for | |
74 | all registers. This function doesn't touch any of the reserved | |
75 | bits in *FXSAVE. */ | |
76 | ||
77 | extern void amd64_collect_fxsave (const struct regcache *regcache, int regnum, | |
78 | void *fxsave); | |
b246147c MK |
79 | \f |
80 | ||
cced5e27 MK |
81 | /* Variables exported from amd64nbsd-tdep.c. */ |
82 | extern int amd64nbsd_r_reg_offset[]; | |
83 | ||
971218cd MK |
84 | /* Variables exported from amd64obsd-tdep.c. */ |
85 | extern int amd64obsd_r_reg_offset[]; | |
86 | ||
b246147c | 87 | /* Variables exported from amd64fbsd-tdep.c. */ |
10fc94a4 MK |
88 | extern CORE_ADDR amd64fbsd_sigtramp_start_addr; |
89 | extern CORE_ADDR amd64fbsd_sigtramp_end_addr; | |
b246147c | 90 | extern int amd64fbsd_sc_reg_offset[]; |
53e95fcf | 91 | |
9c1488cb | 92 | #endif /* amd64-tdep.h */ |