Add AVX512 registers support to GDB and GDBserver.
[deliverable/binutils-gdb.git] / gdb / amd64-tdep.h
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90f90721 1/* Target-dependent definitions for AMD64.
c4f35dd8 2
ecd75fc8 3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
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4 Contributed by Jiri Smid, SuSE Labs.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
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11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
53e95fcf 20
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21#ifndef AMD64_TDEP_H
22#define AMD64_TDEP_H
53e95fcf 23
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24struct gdbarch;
25struct frame_info;
221c12ff 26struct regcache;
da3331ec 27
53e95fcf 28#include "i386-tdep.h"
53e95fcf 29
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30/* Register numbers of various important registers. */
31
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32enum amd64_regnum
33{
34 AMD64_RAX_REGNUM, /* %rax */
35 AMD64_RBX_REGNUM, /* %rbx */
36 AMD64_RCX_REGNUM, /* %rcx */
37 AMD64_RDX_REGNUM, /* %rdx */
38 AMD64_RSI_REGNUM, /* %rsi */
39 AMD64_RDI_REGNUM, /* %rdi */
40 AMD64_RBP_REGNUM, /* %rbp */
41 AMD64_RSP_REGNUM, /* %rsp */
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42 AMD64_R8_REGNUM, /* %r8 */
43 AMD64_R9_REGNUM, /* %r9 */
44 AMD64_R10_REGNUM, /* %r10 */
45 AMD64_R11_REGNUM, /* %r11 */
46 AMD64_R12_REGNUM, /* %r12 */
47 AMD64_R13_REGNUM, /* %r13 */
48 AMD64_R14_REGNUM, /* %r14 */
49 AMD64_R15_REGNUM, /* %r15 */
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50 AMD64_RIP_REGNUM, /* %rip */
51 AMD64_EFLAGS_REGNUM, /* %eflags */
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52 AMD64_CS_REGNUM, /* %cs */
53 AMD64_SS_REGNUM, /* %ss */
54 AMD64_DS_REGNUM, /* %ds */
55 AMD64_ES_REGNUM, /* %es */
56 AMD64_FS_REGNUM, /* %fs */
57 AMD64_GS_REGNUM, /* %gs */
90f90721 58 AMD64_ST0_REGNUM = 24, /* %st0 */
7f7930dd 59 AMD64_ST1_REGNUM, /* %st1 */
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60 AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8,
61 AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9,
7f7930dd 62 AMD64_FTAG_REGNUM = AMD64_ST0_REGNUM + 10,
90f90721 63 AMD64_XMM0_REGNUM = 40, /* %xmm0 */
c6f4c129 64 AMD64_XMM1_REGNUM, /* %xmm1 */
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65 AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
66 AMD64_YMM0H_REGNUM, /* %ymm0h */
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67 AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15,
68 AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
69 AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
70 AMD64_BNDCFGU_REGNUM,
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71 AMD64_BNDSTATUS_REGNUM,
72 AMD64_XMM16_REGNUM,
73 AMD64_XMM31_REGNUM = AMD64_XMM16_REGNUM + 15,
74 AMD64_YMM16H_REGNUM,
75 AMD64_YMM31H_REGNUM = AMD64_YMM16H_REGNUM + 15,
76 AMD64_K0_REGNUM,
77 AMD64_K7_REGNUM = AMD64_K0_REGNUM + 7,
78 AMD64_ZMM0H_REGNUM,
79 AMD64_ZMM31H_REGNUM = AMD64_ZMM0H_REGNUM + 31
90f90721 80};
402ecd56 81
c4f35dd8 82/* Number of general purpose registers. */
90f90721 83#define AMD64_NUM_GREGS 24
c4f35dd8 84
01f9f808 85#define AMD64_NUM_REGS (AMD64_ZMM31H_REGNUM + 1)
a055a187 86
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87extern struct displaced_step_closure *amd64_displaced_step_copy_insn
88 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
89 struct regcache *regs);
90extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch,
91 struct displaced_step_closure *closure,
92 CORE_ADDR from, CORE_ADDR to,
93 struct regcache *regs);
94
90f90721 95extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch);
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96extern void amd64_x32_init_abi (struct gdbarch_info info,
97 struct gdbarch *gdbarch);
53e95fcf 98
41d041d6 99/* Fill register REGNUM in REGCACHE with the appropriate
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100 floating-point or SSE register value from *FXSAVE. If REGNUM is
101 -1, do this for all registers. This function masks off any of the
102 reserved bits in *FXSAVE. */
b64bbf8c 103
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104extern void amd64_supply_fxsave (struct regcache *regcache, int regnum,
105 const void *fxsave);
baed091b 106
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107/* Similar to amd64_supply_fxsave, but use XSAVE extended state. */
108extern void amd64_supply_xsave (struct regcache *regcache, int regnum,
109 const void *xsave);
110
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111/* Fill register REGNUM (if it is a floating-point or SSE register) in
112 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
113 all registers. This function doesn't touch any of the reserved
114 bits in *FXSAVE. */
115
116extern void amd64_collect_fxsave (const struct regcache *regcache, int regnum,
117 void *fxsave);
7a9dd1b2 118/* Similar to amd64_collect_fxsave, but use XSAVE extended state. */
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119extern void amd64_collect_xsave (const struct regcache *regcache,
120 int regnum, void *xsave, int gcore);
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121\f
122
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123/* Variables exported from amd64-linux-tdep.c. */
124extern int amd64_linux_gregset_reg_offset[];
125
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126/* Variables exported from amd64nbsd-tdep.c. */
127extern int amd64nbsd_r_reg_offset[];
128
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129/* Variables exported from amd64obsd-tdep.c. */
130extern int amd64obsd_r_reg_offset[];
131
b246147c 132/* Variables exported from amd64fbsd-tdep.c. */
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133extern CORE_ADDR amd64fbsd_sigtramp_start_addr;
134extern CORE_ADDR amd64fbsd_sigtramp_end_addr;
b246147c 135extern int amd64fbsd_sc_reg_offset[];
53e95fcf 136
9c1488cb 137#endif /* amd64-tdep.h */
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