gdb/doc/
[deliverable/binutils-gdb.git] / gdb / amd64-tdep.h
CommitLineData
90f90721 1/* Target-dependent definitions for AMD64.
c4f35dd8 2
4c38e0a4 3 Copyright (C) 2001, 2003, 2004, 2007, 2008, 2009, 2010
0fb0cc75 4 Free Software Foundation, Inc.
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5 Contributed by Jiri Smid, SuSE Labs.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
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12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
53e95fcf 21
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22#ifndef AMD64_TDEP_H
23#define AMD64_TDEP_H
53e95fcf 24
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25struct gdbarch;
26struct frame_info;
221c12ff 27struct regcache;
da3331ec 28
53e95fcf 29#include "i386-tdep.h"
53e95fcf 30
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31/* Register numbers of various important registers. */
32
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33enum amd64_regnum
34{
35 AMD64_RAX_REGNUM, /* %rax */
36 AMD64_RBX_REGNUM, /* %rbx */
37 AMD64_RCX_REGNUM, /* %rcx */
38 AMD64_RDX_REGNUM, /* %rdx */
39 AMD64_RSI_REGNUM, /* %rsi */
40 AMD64_RDI_REGNUM, /* %rdi */
41 AMD64_RBP_REGNUM, /* %rbp */
42 AMD64_RSP_REGNUM, /* %rsp */
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43 AMD64_R8_REGNUM, /* %r8 */
44 AMD64_R9_REGNUM, /* %r9 */
45 AMD64_R10_REGNUM, /* %r10 */
46 AMD64_R11_REGNUM, /* %r11 */
47 AMD64_R12_REGNUM, /* %r12 */
48 AMD64_R13_REGNUM, /* %r13 */
49 AMD64_R14_REGNUM, /* %r14 */
50 AMD64_R15_REGNUM, /* %r15 */
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51 AMD64_RIP_REGNUM, /* %rip */
52 AMD64_EFLAGS_REGNUM, /* %eflags */
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53 AMD64_CS_REGNUM, /* %cs */
54 AMD64_SS_REGNUM, /* %ss */
55 AMD64_DS_REGNUM, /* %ds */
56 AMD64_ES_REGNUM, /* %es */
57 AMD64_FS_REGNUM, /* %fs */
58 AMD64_GS_REGNUM, /* %gs */
90f90721 59 AMD64_ST0_REGNUM = 24, /* %st0 */
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60 AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8,
61 AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9,
90f90721 62 AMD64_XMM0_REGNUM = 40, /* %xmm0 */
c6f4c129 63 AMD64_XMM1_REGNUM, /* %xmm1 */
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64 AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
65 AMD64_YMM0H_REGNUM, /* %ymm0h */
66 AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15
90f90721 67};
402ecd56 68
c4f35dd8 69/* Number of general purpose registers. */
90f90721 70#define AMD64_NUM_GREGS 24
c4f35dd8 71
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72#define AMD64_NUM_REGS (AMD64_YMM15H_REGNUM + 1)
73
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74extern struct displaced_step_closure *amd64_displaced_step_copy_insn
75 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
76 struct regcache *regs);
77extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch,
78 struct displaced_step_closure *closure,
79 CORE_ADDR from, CORE_ADDR to,
80 struct regcache *regs);
81
90f90721 82extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch);
53e95fcf 83
41d041d6 84/* Fill register REGNUM in REGCACHE with the appropriate
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85 floating-point or SSE register value from *FXSAVE. If REGNUM is
86 -1, do this for all registers. This function masks off any of the
87 reserved bits in *FXSAVE. */
b64bbf8c 88
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89extern void amd64_supply_fxsave (struct regcache *regcache, int regnum,
90 const void *fxsave);
baed091b 91
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92/* Similar to amd64_supply_fxsave, but use XSAVE extended state. */
93extern void amd64_supply_xsave (struct regcache *regcache, int regnum,
94 const void *xsave);
95
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96/* Fill register REGNUM (if it is a floating-point or SSE register) in
97 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
98 all registers. This function doesn't touch any of the reserved
99 bits in *FXSAVE. */
100
101extern void amd64_collect_fxsave (const struct regcache *regcache, int regnum,
102 void *fxsave);
ba581dc1 103
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104/* Similar to amd64_collect_fxsave, but but use XSAVE extended state. */
105extern void amd64_collect_xsave (const struct regcache *regcache,
106 int regnum, void *xsave, int gcore);
107
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108void amd64_classify (struct type *type, enum amd64_reg_class class[2]);
109
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110\f
111
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112/* Variables exported from amd64nbsd-tdep.c. */
113extern int amd64nbsd_r_reg_offset[];
114
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115/* Variables exported from amd64obsd-tdep.c. */
116extern int amd64obsd_r_reg_offset[];
117
b246147c 118/* Variables exported from amd64fbsd-tdep.c. */
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119extern CORE_ADDR amd64fbsd_sigtramp_start_addr;
120extern CORE_ADDR amd64fbsd_sigtramp_end_addr;
b246147c 121extern int amd64fbsd_sc_reg_offset[];
53e95fcf 122
9c1488cb 123#endif /* amd64-tdep.h */
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