Add SVE register defines
[deliverable/binutils-gdb.git] / gdb / arch / aarch64.h
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1/* Common target-dependent functionality for AArch64.
2
e2882c85 3 Copyright (C) 2017-2018 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#ifndef ARCH_AARCH64_H
21#define ARCH_AARCH64_H
22
0c305b61 23#include "common/tdesc.h"
da434ccb 24
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25/* Create the aarch64 target description. A non zero VQ value indicates both
26 the presence of SVE and the Vector Quotient - the number of 128bit chunks in
27 an SVE Z register. */
28
29target_desc *aarch64_create_target_description (long vq);
da434ccb 30
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31/* Register numbers of various important registers.
32 Note that on SVE, the Z registers reuse the V register numbers and the V
33 registers become pseudo registers. */
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34enum aarch64_regnum
35{
36 AARCH64_X0_REGNUM, /* First integer register. */
37 AARCH64_FP_REGNUM = AARCH64_X0_REGNUM + 29, /* Frame register, if used. */
38 AARCH64_LR_REGNUM = AARCH64_X0_REGNUM + 30, /* Return address. */
39 AARCH64_SP_REGNUM, /* Stack pointer. */
40 AARCH64_PC_REGNUM, /* Program counter. */
41 AARCH64_CPSR_REGNUM, /* Current Program Status Register. */
42 AARCH64_V0_REGNUM, /* First fp/vec register. */
43 AARCH64_V31_REGNUM = AARCH64_V0_REGNUM + 31, /* Last fp/vec register. */
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44 AARCH64_SVE_Z0_REGNUM = AARCH64_V0_REGNUM, /* First SVE Z register. */
45 AARCH64_SVE_Z31_REGNUM = AARCH64_V31_REGNUM, /* Last SVE Z register. */
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46 AARCH64_FPSR_REGNUM, /* Floating Point Status Register. */
47 AARCH64_FPCR_REGNUM, /* Floating Point Control Register. */
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48 AARCH64_SVE_P0_REGNUM, /* First SVE predicate register. */
49 AARCH64_SVE_P15_REGNUM = AARCH64_SVE_P0_REGNUM + 15, /* Last SVE predicate
50 register. */
51 AARCH64_SVE_FFR_REGNUM, /* SVE First Fault Register. */
52 AARCH64_SVE_VG_REGNUM, /* SVE Vector Gradient. */
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53
54 /* Other useful registers. */
55 AARCH64_LAST_X_ARG_REGNUM = AARCH64_X0_REGNUM + 7,
56 AARCH64_STRUCT_RETURN_REGNUM = AARCH64_X0_REGNUM + 8,
57 AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
58};
59
60#define AARCH64_X_REGS_NUM 31
61#define AARCH64_V_REGS_NUM 32
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62#define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM
63#define AARCH64_SVE_P_REGS_NUM 16
cc628f3d 64#define AARCH64_NUM_REGS AARCH64_FPCR_REGNUM + 1
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65#define AARCH64_SVE_NUM_REGS AARCH64_SVE_VG_REGNUM + 1
66
cc628f3d 67
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68/* There are a number of ways of expressing the current SVE vector size:
69
70 VL : Vector Length.
71 The number of bytes in an SVE Z register.
72 VQ : Vector Quotient.
73 The number of 128bit chunks in an SVE Z register.
74 VG : Vector Gradient.
75 The number of 64bit chunks in an SVE Z register. */
76
77#define sve_vg_from_vl(vl) ((vl) / 8)
78#define sve_vl_from_vg(vg) ((vg) * 8)
79#define sve_vq_from_vl(vl) ((vl) / 0x10)
80#define sve_vl_from_vq(vq) ((vq) * 0x10)
81#define sve_vq_from_vg(vg) (sve_vq_from_vl (sve_vl_from_vg (vg)))
82#define sve_vg_from_vq(vq) (sve_vg_from_vl (sve_vl_from_vq (vq)))
83
84
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85/* Maximum supported VQ value. Increase if required. */
86#define AARCH64_MAX_SVE_VQ 16
87
cc628f3d 88#endif /* ARCH_AARCH64_H */
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