Implement SystemTap SDT probe support for AArch64
[deliverable/binutils-gdb.git] / gdb / arm-linux-tdep.c
CommitLineData
faf5f7ad 1/* GNU/Linux on ARM target support.
0fd88904 2
28e7fd62 3 Copyright (C) 1999-2013 Free Software Foundation, Inc.
faf5f7ad
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
faf5f7ad
SB
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
faf5f7ad
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19
20#include "defs.h"
c20f6dea
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21#include "target.h"
22#include "value.h"
faf5f7ad 23#include "gdbtypes.h"
134e61c4 24#include "floatformat.h"
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25#include "gdbcore.h"
26#include "frame.h"
4e052eda 27#include "regcache.h"
d16aafd8 28#include "doublest.h"
7aa1783e 29#include "solib-svr4.h"
4be87837 30#include "osabi.h"
cb587d83 31#include "regset.h"
8e9d1a24
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32#include "trad-frame.h"
33#include "tramp-frame.h"
daddc3c1 34#include "breakpoint.h"
ef7e8358 35#include "auxv.h"
9f948660 36#include "xml-syscall.h"
faf5f7ad 37
34e8f22d 38#include "arm-tdep.h"
cb587d83 39#include "arm-linux-tdep.h"
4aa995e1 40#include "linux-tdep.h"
0670c0aa 41#include "glibc-tdep.h"
cca44b1b
JB
42#include "arch-utils.h"
43#include "inferior.h"
44#include "gdbthread.h"
45#include "symfile.h"
a52e6aac 46
55aa24fb
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47#include "cli/cli-utils.h"
48#include "stap-probe.h"
49#include "parser-defs.h"
50#include "user-regs.h"
51#include <ctype.h>
04a83fee 52#include "elf/common.h"
0e9f083f 53#include <string.h>
8e9d1a24 54
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55extern int arm_apcs_32;
56
fdf39c9a
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57/* Under ARM GNU/Linux the traditional way of performing a breakpoint
58 is to execute a particular software interrupt, rather than use a
59 particular undefined instruction to provoke a trap. Upon exection
60 of the software interrupt the kernel stops the inferior with a
498b1f87 61 SIGTRAP, and wakes the debugger. */
66e810cd 62
948f8e3d 63static const gdb_byte arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
2ef47cd0 64
948f8e3d 65static const gdb_byte arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
66e810cd 66
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DJ
67/* However, the EABI syscall interface (new in Nov. 2005) does not look at
68 the operand of the swi if old-ABI compatibility is disabled. Therefore,
69 use an undefined instruction instead. This is supported as of kernel
70 version 2.5.70 (May 2003), so should be a safe assumption for EABI
71 binaries. */
72
948f8e3d 73static const gdb_byte eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 };
c75a2cc8 74
948f8e3d 75static const gdb_byte eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 };
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76
77/* All the kernels which support Thumb support using a specific undefined
78 instruction for the Thumb breakpoint. */
79
948f8e3d 80static const gdb_byte arm_linux_thumb_be_breakpoint[] = {0xde, 0x01};
498b1f87 81
948f8e3d 82static const gdb_byte arm_linux_thumb_le_breakpoint[] = {0x01, 0xde};
498b1f87 83
177321bd
DJ
84/* Because the 16-bit Thumb breakpoint is affected by Thumb-2 IT blocks,
85 we must use a length-appropriate breakpoint for 32-bit Thumb
86 instructions. See also thumb_get_next_pc. */
87
948f8e3d 88static const gdb_byte arm_linux_thumb2_be_breakpoint[] = { 0xf7, 0xf0, 0xa0, 0x00 };
177321bd 89
948f8e3d 90static const gdb_byte arm_linux_thumb2_le_breakpoint[] = { 0xf0, 0xf7, 0x00, 0xa0 };
177321bd 91
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92/* Description of the longjmp buffer. The buffer is treated as an array of
93 elements of size ARM_LINUX_JB_ELEMENT_SIZE.
94
95 The location of saved registers in this buffer (in particular the PC
96 to use after longjmp is called) varies depending on the ABI (in
97 particular the FP model) and also (possibly) the C Library.
98
99 For glibc, eglibc, and uclibc the following holds: If the FP model is
100 SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the
101 buffer. This is also true for the SoftFPA model. However, for the FPA
102 model the PC is at offset 21 in the buffer. */
7a5ea0d4 103#define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
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104#define ARM_LINUX_JB_PC_FPA 21
105#define ARM_LINUX_JB_PC_EABI 9
faf5f7ad 106
f38e884d 107/*
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108 Dynamic Linking on ARM GNU/Linux
109 --------------------------------
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110
111 Note: PLT = procedure linkage table
112 GOT = global offset table
113
114 As much as possible, ELF dynamic linking defers the resolution of
0963b4bd 115 jump/call addresses until the last minute. The technique used is
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116 inspired by the i386 ELF design, and is based on the following
117 constraints.
118
119 1) The calling technique should not force a change in the assembly
120 code produced for apps; it MAY cause changes in the way assembly
121 code is produced for position independent code (i.e. shared
122 libraries).
123
124 2) The technique must be such that all executable areas must not be
125 modified; and any modified areas must not be executed.
126
127 To do this, there are three steps involved in a typical jump:
128
129 1) in the code
130 2) through the PLT
131 3) using a pointer from the GOT
132
133 When the executable or library is first loaded, each GOT entry is
134 initialized to point to the code which implements dynamic name
135 resolution and code finding. This is normally a function in the
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136 program interpreter (on ARM GNU/Linux this is usually
137 ld-linux.so.2, but it does not have to be). On the first
138 invocation, the function is located and the GOT entry is replaced
139 with the real function address. Subsequent calls go through steps
140 1, 2 and 3 and end up calling the real code.
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141
142 1) In the code:
143
144 b function_call
145 bl function_call
146
147 This is typical ARM code using the 26 bit relative branch or branch
148 and link instructions. The target of the instruction
149 (function_call is usually the address of the function to be called.
150 In position independent code, the target of the instruction is
151 actually an entry in the PLT when calling functions in a shared
152 library. Note that this call is identical to a normal function
153 call, only the target differs.
154
155 2) In the PLT:
156
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157 The PLT is a synthetic area, created by the linker. It exists in
158 both executables and libraries. It is an array of stubs, one per
159 imported function call. It looks like this:
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160
161 PLT[0]:
162 str lr, [sp, #-4]! @push the return address (lr)
163 ldr lr, [pc, #16] @load from 6 words ahead
164 add lr, pc, lr @form an address for GOT[0]
165 ldr pc, [lr, #8]! @jump to the contents of that addr
166
167 The return address (lr) is pushed on the stack and used for
168 calculations. The load on the second line loads the lr with
169 &GOT[3] - . - 20. The addition on the third leaves:
170
171 lr = (&GOT[3] - . - 20) + (. + 8)
172 lr = (&GOT[3] - 12)
173 lr = &GOT[0]
174
175 On the fourth line, the pc and lr are both updated, so that:
176
177 pc = GOT[2]
178 lr = &GOT[0] + 8
179 = &GOT[2]
180
0963b4bd 181 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
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182 "tight", but allows us to keep all the PLT entries the same size.
183
184 PLT[n+1]:
185 ldr ip, [pc, #4] @load offset from gotoff
186 add ip, pc, ip @add the offset to the pc
187 ldr pc, [ip] @jump to that address
188 gotoff: .word GOT[n+3] - .
189
190 The load on the first line, gets an offset from the fourth word of
191 the PLT entry. The add on the second line makes ip = &GOT[n+3],
192 which contains either a pointer to PLT[0] (the fixup trampoline) or
193 a pointer to the actual code.
194
195 3) In the GOT:
196
197 The GOT contains helper pointers for both code (PLT) fixups and
0963b4bd 198 data fixups. The first 3 entries of the GOT are special. The next
f38e884d 199 M entries (where M is the number of entries in the PLT) belong to
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200 the PLT fixups. The next D (all remaining) entries belong to
201 various data fixups. The actual size of the GOT is 3 + M + D.
f38e884d 202
0963b4bd 203 The GOT is also a synthetic area, created by the linker. It exists
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204 in both executables and libraries. When the GOT is first
205 initialized , all the GOT entries relating to PLT fixups are
206 pointing to code back at PLT[0].
207
208 The special entries in the GOT are:
209
210 GOT[0] = linked list pointer used by the dynamic loader
211 GOT[1] = pointer to the reloc table for this module
212 GOT[2] = pointer to the fixup/resolver code
213
214 The first invocation of function call comes through and uses the
215 fixup/resolver code. On the entry to the fixup/resolver code:
216
217 ip = &GOT[n+3]
218 lr = &GOT[2]
219 stack[0] = return address (lr) of the function call
220 [r0, r1, r2, r3] are still the arguments to the function call
221
222 This is enough information for the fixup/resolver code to work
223 with. Before the fixup/resolver code returns, it actually calls
224 the requested function and repairs &GOT[n+3]. */
225
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226/* The constants below were determined by examining the following files
227 in the linux kernel sources:
228
229 arch/arm/kernel/signal.c
230 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
231 include/asm-arm/unistd.h
232 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
233
234#define ARM_LINUX_SIGRETURN_INSTR 0xef900077
235#define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
236
edfb1a26
DJ
237/* For ARM EABI, the syscall number is not in the SWI instruction
238 (instead it is loaded into r7). We recognize the pattern that
239 glibc uses... alternatively, we could arrange to do this by
240 function name, but they are not always exported. */
8e9d1a24
DJ
241#define ARM_SET_R7_SIGRETURN 0xe3a07077
242#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad
243#define ARM_EABI_SYSCALL 0xef000000
2a451106 244
f1973203
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245/* OABI syscall restart trampoline, used for EABI executables too
246 whenever OABI support has been enabled in the kernel. */
247#define ARM_OABI_SYSCALL_RESTART_SYSCALL 0xef900000
248#define ARM_LDR_PC_SP_12 0xe49df00c
478fd957 249#define ARM_LDR_PC_SP_4 0xe49df004
f1973203 250
8e9d1a24 251static void
a262aec2 252arm_linux_sigtramp_cache (struct frame_info *this_frame,
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253 struct trad_frame_cache *this_cache,
254 CORE_ADDR func, int regs_offset)
2a451106 255{
a262aec2 256 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
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257 CORE_ADDR base = sp + regs_offset;
258 int i;
2a451106 259
8e9d1a24
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260 for (i = 0; i < 16; i++)
261 trad_frame_set_reg_addr (this_cache, i, base + i * 4);
2a451106 262
8e9d1a24 263 trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4);
2a451106 264
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265 /* The VFP or iWMMXt registers may be saved on the stack, but there's
266 no reliable way to restore them (yet). */
2a451106 267
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268 /* Save a frame ID. */
269 trad_frame_set_id (this_cache, frame_id_build (sp, func));
270}
2a451106 271
edfb1a26
DJ
272/* There are a couple of different possible stack layouts that
273 we need to support.
274
275 Before version 2.6.18, the kernel used completely independent
276 layouts for non-RT and RT signals. For non-RT signals the stack
277 began directly with a struct sigcontext. For RT signals the stack
278 began with two redundant pointers (to the siginfo and ucontext),
279 and then the siginfo and ucontext.
280
281 As of version 2.6.18, the non-RT signal frame layout starts with
282 a ucontext and the RT signal frame starts with a siginfo and then
283 a ucontext. Also, the ucontext now has a designated save area
284 for coprocessor registers.
285
286 For RT signals, it's easy to tell the difference: we look for
287 pinfo, the pointer to the siginfo. If it has the expected
288 value, we have an old layout. If it doesn't, we have the new
289 layout.
290
291 For non-RT signals, it's a bit harder. We need something in one
292 layout or the other with a recognizable offset and value. We can't
293 use the return trampoline, because ARM usually uses SA_RESTORER,
294 in which case the stack return trampoline is not filled in.
295 We can't use the saved stack pointer, because sigaltstack might
296 be in use. So for now we guess the new layout... */
297
298/* There are three words (trap_no, error_code, oldmask) in
299 struct sigcontext before r0. */
300#define ARM_SIGCONTEXT_R0 0xc
301
302/* There are five words (uc_flags, uc_link, and three for uc_stack)
303 in the ucontext_t before the sigcontext. */
304#define ARM_UCONTEXT_SIGCONTEXT 0x14
305
306/* There are three elements in an rt_sigframe before the ucontext:
307 pinfo, puc, and info. The first two are pointers and the third
308 is a struct siginfo, with size 128 bytes. We could follow puc
309 to the ucontext, but it's simpler to skip the whole thing. */
310#define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8
311#define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88
312
313#define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80
314
315#define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a
316
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317static void
318arm_linux_sigreturn_init (const struct tramp_frame *self,
a262aec2 319 struct frame_info *this_frame,
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320 struct trad_frame_cache *this_cache,
321 CORE_ADDR func)
2a451106 322{
e17a4113
UW
323 struct gdbarch *gdbarch = get_frame_arch (this_frame);
324 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a262aec2 325 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
e17a4113 326 ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order);
edfb1a26
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327
328 if (uc_flags == ARM_NEW_SIGFRAME_MAGIC)
a262aec2 329 arm_linux_sigtramp_cache (this_frame, this_cache, func,
edfb1a26
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330 ARM_UCONTEXT_SIGCONTEXT
331 + ARM_SIGCONTEXT_R0);
332 else
a262aec2 333 arm_linux_sigtramp_cache (this_frame, this_cache, func,
edfb1a26 334 ARM_SIGCONTEXT_R0);
8e9d1a24 335}
2a451106 336
8e9d1a24
DJ
337static void
338arm_linux_rt_sigreturn_init (const struct tramp_frame *self,
a262aec2 339 struct frame_info *this_frame,
8e9d1a24
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340 struct trad_frame_cache *this_cache,
341 CORE_ADDR func)
342{
e17a4113
UW
343 struct gdbarch *gdbarch = get_frame_arch (this_frame);
344 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a262aec2 345 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
e17a4113 346 ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order);
edfb1a26
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347
348 if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO)
a262aec2 349 arm_linux_sigtramp_cache (this_frame, this_cache, func,
edfb1a26
DJ
350 ARM_OLD_RT_SIGFRAME_UCONTEXT
351 + ARM_UCONTEXT_SIGCONTEXT
352 + ARM_SIGCONTEXT_R0);
353 else
a262aec2 354 arm_linux_sigtramp_cache (this_frame, this_cache, func,
edfb1a26
DJ
355 ARM_NEW_RT_SIGFRAME_UCONTEXT
356 + ARM_UCONTEXT_SIGCONTEXT
357 + ARM_SIGCONTEXT_R0);
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358}
359
f1973203
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360static void
361arm_linux_restart_syscall_init (const struct tramp_frame *self,
362 struct frame_info *this_frame,
363 struct trad_frame_cache *this_cache,
364 CORE_ADDR func)
365{
478fd957 366 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f1973203 367 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
478fd957
UW
368 CORE_ADDR pc = get_frame_memory_unsigned (this_frame, sp, 4);
369 CORE_ADDR cpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM);
370 ULONGEST t_bit = arm_psr_thumb_bit (gdbarch);
371 int sp_offset;
372
373 /* There are two variants of this trampoline; with older kernels, the
374 stub is placed on the stack, while newer kernels use the stub from
375 the vector page. They are identical except that the older version
376 increments SP by 12 (to skip stored PC and the stub itself), while
377 the newer version increments SP only by 4 (just the stored PC). */
378 if (self->insn[1].bytes == ARM_LDR_PC_SP_4)
379 sp_offset = 4;
380 else
381 sp_offset = 12;
382
383 /* Update Thumb bit in CPSR. */
384 if (pc & 1)
385 cpsr |= t_bit;
386 else
387 cpsr &= ~t_bit;
f1973203 388
478fd957
UW
389 /* Remove Thumb bit from PC. */
390 pc = gdbarch_addr_bits_remove (gdbarch, pc);
391
392 /* Save previous register values. */
393 trad_frame_set_reg_value (this_cache, ARM_SP_REGNUM, sp + sp_offset);
394 trad_frame_set_reg_value (this_cache, ARM_PC_REGNUM, pc);
395 trad_frame_set_reg_value (this_cache, ARM_PS_REGNUM, cpsr);
f1973203
MR
396
397 /* Save a frame ID. */
398 trad_frame_set_id (this_cache, frame_id_build (sp, func));
399}
400
8e9d1a24
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401static struct tramp_frame arm_linux_sigreturn_tramp_frame = {
402 SIGTRAMP_FRAME,
403 4,
404 {
405 { ARM_LINUX_SIGRETURN_INSTR, -1 },
406 { TRAMP_SENTINEL_INSN }
407 },
408 arm_linux_sigreturn_init
409};
410
411static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = {
412 SIGTRAMP_FRAME,
413 4,
414 {
415 { ARM_LINUX_RT_SIGRETURN_INSTR, -1 },
416 { TRAMP_SENTINEL_INSN }
417 },
418 arm_linux_rt_sigreturn_init
419};
420
421static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = {
422 SIGTRAMP_FRAME,
423 4,
424 {
425 { ARM_SET_R7_SIGRETURN, -1 },
426 { ARM_EABI_SYSCALL, -1 },
427 { TRAMP_SENTINEL_INSN }
428 },
429 arm_linux_sigreturn_init
430};
431
432static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = {
433 SIGTRAMP_FRAME,
434 4,
435 {
436 { ARM_SET_R7_RT_SIGRETURN, -1 },
437 { ARM_EABI_SYSCALL, -1 },
438 { TRAMP_SENTINEL_INSN }
439 },
440 arm_linux_rt_sigreturn_init
441};
442
f1973203
MR
443static struct tramp_frame arm_linux_restart_syscall_tramp_frame = {
444 NORMAL_FRAME,
445 4,
446 {
447 { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 },
448 { ARM_LDR_PC_SP_12, -1 },
449 { TRAMP_SENTINEL_INSN }
450 },
451 arm_linux_restart_syscall_init
452};
453
478fd957
UW
454static struct tramp_frame arm_kernel_linux_restart_syscall_tramp_frame = {
455 NORMAL_FRAME,
456 4,
457 {
458 { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 },
459 { ARM_LDR_PC_SP_4, -1 },
460 { TRAMP_SENTINEL_INSN }
461 },
462 arm_linux_restart_syscall_init
463};
464
cb587d83
DJ
465/* Core file and register set support. */
466
467#define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE)
468
469void
470arm_linux_supply_gregset (const struct regset *regset,
471 struct regcache *regcache,
472 int regnum, const void *gregs_buf, size_t len)
473{
e17a4113
UW
474 struct gdbarch *gdbarch = get_regcache_arch (regcache);
475 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
cb587d83
DJ
476 const gdb_byte *gregs = gregs_buf;
477 int regno;
478 CORE_ADDR reg_pc;
479 gdb_byte pc_buf[INT_REGISTER_SIZE];
480
481 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
482 if (regnum == -1 || regnum == regno)
483 regcache_raw_supply (regcache, regno,
484 gregs + INT_REGISTER_SIZE * regno);
485
486 if (regnum == ARM_PS_REGNUM || regnum == -1)
487 {
488 if (arm_apcs_32)
489 regcache_raw_supply (regcache, ARM_PS_REGNUM,
17c12639 490 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
cb587d83
DJ
491 else
492 regcache_raw_supply (regcache, ARM_PS_REGNUM,
493 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
494 }
495
496 if (regnum == ARM_PC_REGNUM || regnum == -1)
497 {
498 reg_pc = extract_unsigned_integer (gregs
499 + INT_REGISTER_SIZE * ARM_PC_REGNUM,
e17a4113
UW
500 INT_REGISTER_SIZE, byte_order);
501 reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
502 store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc);
cb587d83
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503 regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf);
504 }
505}
506
507void
508arm_linux_collect_gregset (const struct regset *regset,
509 const struct regcache *regcache,
510 int regnum, void *gregs_buf, size_t len)
511{
512 gdb_byte *gregs = gregs_buf;
513 int regno;
514
515 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
516 if (regnum == -1 || regnum == regno)
517 regcache_raw_collect (regcache, regno,
518 gregs + INT_REGISTER_SIZE * regno);
519
520 if (regnum == ARM_PS_REGNUM || regnum == -1)
521 {
522 if (arm_apcs_32)
523 regcache_raw_collect (regcache, ARM_PS_REGNUM,
17c12639 524 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
cb587d83
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525 else
526 regcache_raw_collect (regcache, ARM_PS_REGNUM,
527 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
528 }
529
530 if (regnum == ARM_PC_REGNUM || regnum == -1)
531 regcache_raw_collect (regcache, ARM_PC_REGNUM,
532 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
533}
534
535/* Support for register format used by the NWFPE FPA emulator. */
536
537#define typeNone 0x00
538#define typeSingle 0x01
539#define typeDouble 0x02
540#define typeExtended 0x03
541
542void
543supply_nwfpe_register (struct regcache *regcache, int regno,
544 const gdb_byte *regs)
545{
546 const gdb_byte *reg_data;
547 gdb_byte reg_tag;
548 gdb_byte buf[FP_REGISTER_SIZE];
549
550 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
551 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
552 memset (buf, 0, FP_REGISTER_SIZE);
553
554 switch (reg_tag)
555 {
556 case typeSingle:
557 memcpy (buf, reg_data, 4);
558 break;
559 case typeDouble:
560 memcpy (buf, reg_data + 4, 4);
561 memcpy (buf + 4, reg_data, 4);
562 break;
563 case typeExtended:
564 /* We want sign and exponent, then least significant bits,
565 then most significant. NWFPE does sign, most, least. */
566 memcpy (buf, reg_data, 4);
567 memcpy (buf + 4, reg_data + 8, 4);
568 memcpy (buf + 8, reg_data + 4, 4);
569 break;
570 default:
571 break;
572 }
573
574 regcache_raw_supply (regcache, regno, buf);
575}
576
577void
578collect_nwfpe_register (const struct regcache *regcache, int regno,
579 gdb_byte *regs)
580{
581 gdb_byte *reg_data;
582 gdb_byte reg_tag;
583 gdb_byte buf[FP_REGISTER_SIZE];
584
585 regcache_raw_collect (regcache, regno, buf);
586
587 /* NOTE drow/2006-06-07: This code uses the tag already in the
588 register buffer. I've preserved that when moving the code
589 from the native file to the target file. But this doesn't
590 always make sense. */
591
592 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
593 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
594
595 switch (reg_tag)
596 {
597 case typeSingle:
598 memcpy (reg_data, buf, 4);
599 break;
600 case typeDouble:
601 memcpy (reg_data, buf + 4, 4);
602 memcpy (reg_data + 4, buf, 4);
603 break;
604 case typeExtended:
605 memcpy (reg_data, buf, 4);
606 memcpy (reg_data + 4, buf + 8, 4);
607 memcpy (reg_data + 8, buf + 4, 4);
608 break;
609 default:
610 break;
611 }
612}
613
614void
615arm_linux_supply_nwfpe (const struct regset *regset,
616 struct regcache *regcache,
617 int regnum, const void *regs_buf, size_t len)
618{
619 const gdb_byte *regs = regs_buf;
620 int regno;
621
622 if (regnum == ARM_FPS_REGNUM || regnum == -1)
623 regcache_raw_supply (regcache, ARM_FPS_REGNUM,
624 regs + NWFPE_FPSR_OFFSET);
625
626 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
627 if (regnum == -1 || regnum == regno)
628 supply_nwfpe_register (regcache, regno, regs);
629}
630
631void
632arm_linux_collect_nwfpe (const struct regset *regset,
633 const struct regcache *regcache,
634 int regnum, void *regs_buf, size_t len)
635{
636 gdb_byte *regs = regs_buf;
637 int regno;
638
639 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
640 if (regnum == -1 || regnum == regno)
641 collect_nwfpe_register (regcache, regno, regs);
642
643 if (regnum == ARM_FPS_REGNUM || regnum == -1)
644 regcache_raw_collect (regcache, ARM_FPS_REGNUM,
645 regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM);
646}
647
ef7e8358
UW
648/* Support VFP register format. */
649
650#define ARM_LINUX_SIZEOF_VFP (32 * 8 + 4)
651
652static void
653arm_linux_supply_vfp (const struct regset *regset,
654 struct regcache *regcache,
655 int regnum, const void *regs_buf, size_t len)
656{
657 const gdb_byte *regs = regs_buf;
658 int regno;
659
660 if (regnum == ARM_FPSCR_REGNUM || regnum == -1)
661 regcache_raw_supply (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8);
662
663 for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++)
664 if (regnum == -1 || regnum == regno)
665 regcache_raw_supply (regcache, regno,
666 regs + (regno - ARM_D0_REGNUM) * 8);
667}
668
669static void
670arm_linux_collect_vfp (const struct regset *regset,
671 const struct regcache *regcache,
672 int regnum, void *regs_buf, size_t len)
673{
674 gdb_byte *regs = regs_buf;
675 int regno;
676
677 if (regnum == ARM_FPSCR_REGNUM || regnum == -1)
678 regcache_raw_collect (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8);
679
680 for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++)
681 if (regnum == -1 || regnum == regno)
682 regcache_raw_collect (regcache, regno,
683 regs + (regno - ARM_D0_REGNUM) * 8);
684}
685
cb587d83
DJ
686/* Return the appropriate register set for the core section identified
687 by SECT_NAME and SECT_SIZE. */
688
689static const struct regset *
690arm_linux_regset_from_core_section (struct gdbarch *gdbarch,
691 const char *sect_name, size_t sect_size)
692{
693 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
694
695 if (strcmp (sect_name, ".reg") == 0
696 && sect_size == ARM_LINUX_SIZEOF_GREGSET)
697 {
698 if (tdep->gregset == NULL)
699 tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset,
700 arm_linux_collect_gregset);
701 return tdep->gregset;
702 }
703
704 if (strcmp (sect_name, ".reg2") == 0
705 && sect_size == ARM_LINUX_SIZEOF_NWFPE)
706 {
707 if (tdep->fpregset == NULL)
708 tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe,
709 arm_linux_collect_nwfpe);
710 return tdep->fpregset;
711 }
712
ef7e8358
UW
713 if (strcmp (sect_name, ".reg-arm-vfp") == 0
714 && sect_size == ARM_LINUX_SIZEOF_VFP)
715 {
716 if (tdep->vfpregset == NULL)
717 tdep->vfpregset = regset_alloc (gdbarch, arm_linux_supply_vfp,
718 arm_linux_collect_vfp);
719 return tdep->vfpregset;
720 }
721
722 return NULL;
723}
724
725/* Core file register set sections. */
726
727static struct core_regset_section arm_linux_fpa_regset_sections[] =
728{
729 { ".reg", ARM_LINUX_SIZEOF_GREGSET, "general-purpose" },
730 { ".reg2", ARM_LINUX_SIZEOF_NWFPE, "FPA floating-point" },
731 { NULL, 0}
732};
733
734static struct core_regset_section arm_linux_vfp_regset_sections[] =
735{
736 { ".reg", ARM_LINUX_SIZEOF_GREGSET, "general-purpose" },
737 { ".reg-arm-vfp", ARM_LINUX_SIZEOF_VFP, "VFP floating-point" },
738 { NULL, 0}
739};
740
741/* Determine target description from core file. */
742
743static const struct target_desc *
744arm_linux_core_read_description (struct gdbarch *gdbarch,
745 struct target_ops *target,
746 bfd *abfd)
747{
748 CORE_ADDR arm_hwcap = 0;
749
750 if (target_auxv_search (target, AT_HWCAP, &arm_hwcap) != 1)
751 return NULL;
752
753 if (arm_hwcap & HWCAP_VFP)
754 {
755 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
756 Neon with VFPv3-D32. */
757 if (arm_hwcap & HWCAP_NEON)
758 return tdesc_arm_with_neon;
759 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
760 return tdesc_arm_with_vfpv3;
761 else
762 return tdesc_arm_with_vfpv2;
763 }
764
cb587d83
DJ
765 return NULL;
766}
767
ef7e8358 768
25b41d01 769/* Copy the value of next pc of sigreturn and rt_sigrturn into PC,
18819fa6
UW
770 return 1. In addition, set IS_THUMB depending on whether we
771 will return to ARM or Thumb code. Return 0 if it is not a
772 rt_sigreturn/sigreturn syscall. */
25b41d01
YQ
773static int
774arm_linux_sigreturn_return_addr (struct frame_info *frame,
775 unsigned long svc_number,
18819fa6 776 CORE_ADDR *pc, int *is_thumb)
25b41d01
YQ
777{
778 /* Is this a sigreturn or rt_sigreturn syscall? */
779 if (svc_number == 119 || svc_number == 173)
780 {
781 if (get_frame_type (frame) == SIGTRAMP_FRAME)
782 {
18819fa6
UW
783 ULONGEST t_bit = arm_psr_thumb_bit (frame_unwind_arch (frame));
784 CORE_ADDR cpsr
785 = frame_unwind_register_unsigned (frame, ARM_PS_REGNUM);
786
787 *is_thumb = (cpsr & t_bit) != 0;
25b41d01
YQ
788 *pc = frame_unwind_caller_pc (frame);
789 return 1;
790 }
791 }
792 return 0;
793}
794
9f948660
SDJ
795/* At a ptrace syscall-stop, return the syscall number. This either
796 comes from the SWI instruction (OABI) or from r7 (EABI).
797
798 When the function fails, it should return -1. */
799
800static LONGEST
801arm_linux_get_syscall_number (struct gdbarch *gdbarch,
802 ptid_t ptid)
803{
804 struct regcache *regs = get_thread_regcache (ptid);
805 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
806
807 ULONGEST pc;
808 ULONGEST cpsr;
809 ULONGEST t_bit = arm_psr_thumb_bit (gdbarch);
810 int is_thumb;
811 ULONGEST svc_number = -1;
812
813 regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &pc);
814 regcache_cooked_read_unsigned (regs, ARM_PS_REGNUM, &cpsr);
815 is_thumb = (cpsr & t_bit) != 0;
816
817 if (is_thumb)
818 {
819 regcache_cooked_read_unsigned (regs, 7, &svc_number);
820 }
821 else
822 {
823 enum bfd_endian byte_order_for_code =
824 gdbarch_byte_order_for_code (gdbarch);
825
826 /* PC gets incremented before the syscall-stop, so read the
827 previous instruction. */
828 unsigned long this_instr =
829 read_memory_unsigned_integer (pc - 4, 4, byte_order_for_code);
830
831 unsigned long svc_operand = (0x00ffffff & this_instr);
832
833 if (svc_operand)
834 {
835 /* OABI */
836 svc_number = svc_operand - 0x900000;
837 }
838 else
839 {
840 /* EABI */
841 regcache_cooked_read_unsigned (regs, 7, &svc_number);
842 }
843 }
844
845 return svc_number;
846}
847
25b41d01
YQ
848/* When FRAME is at a syscall instruction, return the PC of the next
849 instruction to be executed. */
850
851static CORE_ADDR
852arm_linux_syscall_next_pc (struct frame_info *frame)
853{
854 CORE_ADDR pc = get_frame_pc (frame);
855 CORE_ADDR return_addr = 0;
856 int is_thumb = arm_frame_is_thumb (frame);
857 ULONGEST svc_number = 0;
25b41d01
YQ
858
859 if (is_thumb)
860 {
861 svc_number = get_frame_register_unsigned (frame, 7);
18819fa6 862 return_addr = pc + 2;
25b41d01
YQ
863 }
864 else
865 {
866 struct gdbarch *gdbarch = get_frame_arch (frame);
867 enum bfd_endian byte_order_for_code =
868 gdbarch_byte_order_for_code (gdbarch);
869 unsigned long this_instr =
870 read_memory_unsigned_integer (pc, 4, byte_order_for_code);
871
872 unsigned long svc_operand = (0x00ffffff & this_instr);
873 if (svc_operand) /* OABI. */
874 {
875 svc_number = svc_operand - 0x900000;
876 }
877 else /* EABI. */
878 {
879 svc_number = get_frame_register_unsigned (frame, 7);
880 }
18819fa6
UW
881
882 return_addr = pc + 4;
25b41d01
YQ
883 }
884
18819fa6 885 arm_linux_sigreturn_return_addr (frame, svc_number, &return_addr, &is_thumb);
25b41d01 886
18819fa6 887 /* Addresses for calling Thumb functions have the bit 0 set. */
25b41d01 888 if (is_thumb)
18819fa6 889 return_addr |= 1;
25b41d01
YQ
890
891 return return_addr;
892}
893
894
daddc3c1
DJ
895/* Insert a single step breakpoint at the next executed instruction. */
896
63807e1d 897static int
daddc3c1
DJ
898arm_linux_software_single_step (struct frame_info *frame)
899{
a6d9a66e 900 struct gdbarch *gdbarch = get_frame_arch (frame);
6c95b8df 901 struct address_space *aspace = get_frame_address_space (frame);
35f73cfc
UW
902 CORE_ADDR next_pc;
903
904 if (arm_deal_with_atomic_sequence (frame))
905 return 1;
906
907 next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
daddc3c1
DJ
908
909 /* The Linux kernel offers some user-mode helpers in a high page. We can
910 not read this page (as of 2.6.23), and even if we could then we couldn't
911 set breakpoints in it, and even if we could then the atomic operations
912 would fail when interrupted. They are all called as functions and return
913 to the address in LR, so step to there instead. */
914 if (next_pc > 0xffff0000)
915 next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM);
916
18819fa6 917 arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc);
daddc3c1
DJ
918
919 return 1;
920}
921
cca44b1b
JB
922/* Support for displaced stepping of Linux SVC instructions. */
923
924static void
6e39997a 925arm_linux_cleanup_svc (struct gdbarch *gdbarch,
cca44b1b
JB
926 struct regcache *regs,
927 struct displaced_step_closure *dsc)
928{
929 CORE_ADDR from = dsc->insn_addr;
930 ULONGEST apparent_pc;
931 int within_scratch;
932
933 regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc);
934
935 within_scratch = (apparent_pc >= dsc->scratch_base
936 && apparent_pc < (dsc->scratch_base
937 + DISPLACED_MODIFIED_INSNS * 4 + 4));
938
939 if (debug_displaced)
940 {
941 fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after "
942 "SVC step ", (unsigned long) apparent_pc);
943 if (within_scratch)
944 fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n");
945 else
946 fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n");
947 }
948
949 if (within_scratch)
950 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC);
951}
952
953static int
bd18283a
YQ
954arm_linux_copy_svc (struct gdbarch *gdbarch, struct regcache *regs,
955 struct displaced_step_closure *dsc)
cca44b1b 956{
25b41d01
YQ
957 CORE_ADDR return_to = 0;
958
cca44b1b 959 struct frame_info *frame;
36073a92 960 unsigned int svc_number = displaced_read_reg (regs, dsc, 7);
25b41d01 961 int is_sigreturn = 0;
18819fa6 962 int is_thumb;
cca44b1b 963
cca44b1b
JB
964 frame = get_current_frame ();
965
25b41d01 966 is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number,
18819fa6 967 &return_to, &is_thumb);
25b41d01 968 if (is_sigreturn)
cca44b1b 969 {
cca44b1b
JB
970 struct symtab_and_line sal;
971
972 if (debug_displaced)
973 fprintf_unfiltered (gdb_stdlog, "displaced: found "
0963b4bd 974 "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n",
cca44b1b
JB
975 (unsigned long) get_frame_pc (frame));
976
cca44b1b 977 if (debug_displaced)
0963b4bd 978 fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. "
cca44b1b
JB
979 "Setting momentary breakpoint.\n", (unsigned long) return_to);
980
8358c15c
JK
981 gdb_assert (inferior_thread ()->control.step_resume_breakpoint
982 == NULL);
cca44b1b
JB
983
984 sal = find_pc_line (return_to, 0);
985 sal.pc = return_to;
986 sal.section = find_pc_overlay (return_to);
987 sal.explicit_pc = 1;
988
989 frame = get_prev_frame (frame);
990
991 if (frame)
992 {
8358c15c 993 inferior_thread ()->control.step_resume_breakpoint
cca44b1b
JB
994 = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame),
995 bp_step_resume);
996
c70a6932
JK
997 /* set_momentary_breakpoint invalidates FRAME. */
998 frame = NULL;
999
cca44b1b
JB
1000 /* We need to make sure we actually insert the momentary
1001 breakpoint set above. */
1002 insert_breakpoints ();
1003 }
1004 else if (debug_displaced)
1005 fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous "
1006 "frame to set momentary breakpoint for "
1007 "sigreturn/rt_sigreturn\n");
1008 }
1009 else if (debug_displaced)
1010 fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn "
1011 "SVC call not in signal trampoline frame\n");
25b41d01 1012
cca44b1b
JB
1013
1014 /* Preparation: If we detect sigreturn, set momentary breakpoint at resume
1015 location, else nothing.
1016 Insn: unmodified svc.
1017 Cleanup: if pc lands in scratch space, pc <- insn_addr + 4
1018 else leave pc alone. */
1019
cca44b1b
JB
1020
1021 dsc->cleanup = &arm_linux_cleanup_svc;
1022 /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next
1023 instruction. */
1024 dsc->wrote_to_pc = 1;
1025
1026 return 0;
1027}
1028
1029
1030/* The following two functions implement single-stepping over calls to Linux
1031 kernel helper routines, which perform e.g. atomic operations on architecture
1032 variants which don't support them natively.
1033
1034 When this function is called, the PC will be pointing at the kernel helper
1035 (at an address inaccessible to GDB), and r14 will point to the return
1036 address. Displaced stepping always executes code in the copy area:
1037 so, make the copy-area instruction branch back to the kernel helper (the
1038 "from" address), and make r14 point to the breakpoint in the copy area. In
1039 that way, we regain control once the kernel helper returns, and can clean
1040 up appropriately (as if we had just returned from the kernel helper as it
1041 would have been called from the non-displaced location). */
1042
1043static void
6e39997a 1044cleanup_kernel_helper_return (struct gdbarch *gdbarch,
cca44b1b
JB
1045 struct regcache *regs,
1046 struct displaced_step_closure *dsc)
1047{
1048 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC);
1049 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC);
1050}
1051
1052static void
1053arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from,
1054 CORE_ADDR to, struct regcache *regs,
1055 struct displaced_step_closure *dsc)
1056{
1057 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1058
1059 dsc->numinsns = 1;
1060 dsc->insn_addr = from;
1061 dsc->cleanup = &cleanup_kernel_helper_return;
1062 /* Say we wrote to the PC, else cleanup will set PC to the next
1063 instruction in the helper, which isn't helpful. */
1064 dsc->wrote_to_pc = 1;
1065
1066 /* Preparation: tmp[0] <- r14
1067 r14 <- <scratch space>+4
1068 *(<scratch space>+8) <- from
1069 Insn: ldr pc, [r14, #4]
1070 Cleanup: r14 <- tmp[0], pc <- tmp[0]. */
1071
36073a92 1072 dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM);
cca44b1b
JB
1073 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4,
1074 CANNOT_WRITE_PC);
1075 write_memory_unsigned_integer (to + 8, 4, byte_order, from);
1076
1077 dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */
1078}
1079
1080/* Linux-specific displaced step instruction copying function. Detects when
1081 the program has stepped into a Linux kernel helper routine (which must be
1082 handled as a special case), falling back to arm_displaced_step_copy_insn()
1083 if it hasn't. */
1084
1085static struct displaced_step_closure *
1086arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch,
1087 CORE_ADDR from, CORE_ADDR to,
1088 struct regcache *regs)
1089{
1090 struct displaced_step_closure *dsc
1091 = xmalloc (sizeof (struct displaced_step_closure));
1092
1093 /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and
1094 stop at the return location. */
1095 if (from > 0xffff0000)
1096 {
1097 if (debug_displaced)
1098 fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper "
1099 "at %.8lx\n", (unsigned long) from);
1100
1101 arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc);
1102 }
1103 else
1104 {
cca44b1b
JB
1105 /* Override the default handling of SVC instructions. */
1106 dsc->u.svc.copy_svc_os = arm_linux_copy_svc;
1107
b434a28f 1108 arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
cca44b1b
JB
1109 }
1110
1111 arm_displaced_init_closure (gdbarch, from, to, dsc);
1112
1113 return dsc;
1114}
1115
55aa24fb
SDJ
1116static int
1117arm_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
1118{
1119 return (*s == '#' /* Literal number. */
1120 || *s == '[' /* Register indirection or
1121 displacement. */
1122 || isalpha (*s)); /* Register value. */
1123}
1124
1125/* This routine is used to parse a special token in ARM's assembly.
1126
1127 The special tokens parsed by it are:
1128
1129 - Register displacement (e.g, [fp, #-8])
1130
1131 It returns one if the special token has been parsed successfully,
1132 or zero if the current token is not considered special. */
1133
1134static int
1135arm_stap_parse_special_token (struct gdbarch *gdbarch,
1136 struct stap_parse_info *p)
1137{
1138 if (*p->arg == '[')
1139 {
1140 /* Temporary holder for lookahead. */
1141 const char *tmp = p->arg;
a0bcdaa7 1142 char *endp;
55aa24fb
SDJ
1143 /* Used to save the register name. */
1144 const char *start;
1145 char *regname;
1146 int len, offset;
1147 int got_minus = 0;
1148 long displacement;
1149 struct stoken str;
1150
1151 ++tmp;
1152 start = tmp;
1153
1154 /* Register name. */
1155 while (isalnum (*tmp))
1156 ++tmp;
1157
1158 if (*tmp != ',')
1159 return 0;
1160
1161 len = tmp - start;
1162 regname = alloca (len + 2);
1163
1164 offset = 0;
1165 if (isdigit (*start))
1166 {
1167 /* If we are dealing with a register whose name begins with a
1168 digit, it means we should prefix the name with the letter
1169 `r', because GDB expects this name pattern. Otherwise (e.g.,
1170 we are dealing with the register `fp'), we don't need to
1171 add such a prefix. */
1172 regname[0] = 'r';
1173 offset = 1;
1174 }
1175
1176 strncpy (regname + offset, start, len);
1177 len += offset;
1178 regname[len] = '\0';
1179
1180 if (user_reg_map_name_to_regnum (gdbarch, regname, len) == -1)
1181 error (_("Invalid register name `%s' on expression `%s'."),
1182 regname, p->saved_arg);
1183
1184 ++tmp;
1185 tmp = skip_spaces_const (tmp);
1186 if (*tmp++ != '#')
1187 return 0;
1188
1189 if (*tmp == '-')
1190 {
1191 ++tmp;
1192 got_minus = 1;
1193 }
1194
a0bcdaa7
PA
1195 displacement = strtol (tmp, &endp, 10);
1196 tmp = endp;
55aa24fb
SDJ
1197
1198 /* Skipping last `]'. */
1199 if (*tmp++ != ']')
1200 return 0;
1201
1202 /* The displacement. */
1203 write_exp_elt_opcode (OP_LONG);
1204 write_exp_elt_type (builtin_type (gdbarch)->builtin_long);
1205 write_exp_elt_longcst (displacement);
1206 write_exp_elt_opcode (OP_LONG);
1207 if (got_minus)
1208 write_exp_elt_opcode (UNOP_NEG);
1209
1210 /* The register name. */
1211 write_exp_elt_opcode (OP_REGISTER);
1212 str.ptr = regname;
1213 str.length = len;
1214 write_exp_string (str);
1215 write_exp_elt_opcode (OP_REGISTER);
1216
1217 write_exp_elt_opcode (BINOP_ADD);
1218
1219 /* Casting to the expected type. */
1220 write_exp_elt_opcode (UNOP_CAST);
1221 write_exp_elt_type (lookup_pointer_type (p->arg_type));
1222 write_exp_elt_opcode (UNOP_CAST);
1223
1224 write_exp_elt_opcode (UNOP_IND);
1225
1226 p->arg = tmp;
1227 }
1228 else
1229 return 0;
1230
1231 return 1;
1232}
1233
97e03143
RE
1234static void
1235arm_linux_init_abi (struct gdbarch_info info,
1236 struct gdbarch *gdbarch)
1237{
05c0465e
SDJ
1238 static const char *const stap_integer_prefixes[] = { "#", NULL };
1239 static const char *const stap_register_prefixes[] = { "r", NULL };
1240 static const char *const stap_register_indirection_prefixes[] = { "[",
1241 NULL };
1242 static const char *const stap_register_indirection_suffixes[] = { "]",
1243 NULL };
97e03143
RE
1244 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1245
a5ee0f0c
PA
1246 linux_init_abi (info, gdbarch);
1247
97e03143 1248 tdep->lowest_pc = 0x8000;
2ef47cd0 1249 if (info.byte_order == BFD_ENDIAN_BIG)
498b1f87 1250 {
c75a2cc8
DJ
1251 if (tdep->arm_abi == ARM_ABI_AAPCS)
1252 tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint;
1253 else
1254 tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
498b1f87 1255 tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint;
177321bd 1256 tdep->thumb2_breakpoint = arm_linux_thumb2_be_breakpoint;
498b1f87 1257 }
2ef47cd0 1258 else
498b1f87 1259 {
c75a2cc8
DJ
1260 if (tdep->arm_abi == ARM_ABI_AAPCS)
1261 tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint;
1262 else
1263 tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
498b1f87 1264 tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint;
177321bd 1265 tdep->thumb2_breakpoint = arm_linux_thumb2_le_breakpoint;
498b1f87 1266 }
66e810cd 1267 tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
498b1f87 1268 tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint);
177321bd 1269 tdep->thumb2_breakpoint_size = sizeof (arm_linux_thumb2_le_breakpoint);
9df628e0 1270
28e97307
DJ
1271 if (tdep->fp_model == ARM_FLOAT_AUTO)
1272 tdep->fp_model = ARM_FLOAT_FPA;
fd50bc42 1273
f8624c62
MGD
1274 switch (tdep->fp_model)
1275 {
1276 case ARM_FLOAT_FPA:
1277 tdep->jb_pc = ARM_LINUX_JB_PC_FPA;
1278 break;
1279 case ARM_FLOAT_SOFT_FPA:
1280 case ARM_FLOAT_SOFT_VFP:
1281 case ARM_FLOAT_VFP:
1282 tdep->jb_pc = ARM_LINUX_JB_PC_EABI;
1283 break;
1284 default:
1285 internal_error
1286 (__FILE__, __LINE__,
1287 _("arm_linux_init_abi: Floating point model not supported"));
1288 break;
1289 }
a6cdd8c5 1290 tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
19d3fc80 1291
7aa1783e 1292 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1293 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
7aa1783e 1294
190dce09 1295 /* Single stepping. */
daddc3c1 1296 set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step);
190dce09 1297
0e18d038 1298 /* Shared library handling. */
0e18d038 1299 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
bb41a796 1300 set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
b2756930
KB
1301
1302 /* Enable TLS support. */
1303 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1304 svr4_fetch_objfile_link_map);
8e9d1a24
DJ
1305
1306 tramp_frame_prepend_unwinder (gdbarch,
1307 &arm_linux_sigreturn_tramp_frame);
1308 tramp_frame_prepend_unwinder (gdbarch,
1309 &arm_linux_rt_sigreturn_tramp_frame);
1310 tramp_frame_prepend_unwinder (gdbarch,
1311 &arm_eabi_linux_sigreturn_tramp_frame);
1312 tramp_frame_prepend_unwinder (gdbarch,
1313 &arm_eabi_linux_rt_sigreturn_tramp_frame);
f1973203
MR
1314 tramp_frame_prepend_unwinder (gdbarch,
1315 &arm_linux_restart_syscall_tramp_frame);
478fd957
UW
1316 tramp_frame_prepend_unwinder (gdbarch,
1317 &arm_kernel_linux_restart_syscall_tramp_frame);
cb587d83
DJ
1318
1319 /* Core file support. */
1320 set_gdbarch_regset_from_core_section (gdbarch,
1321 arm_linux_regset_from_core_section);
ef7e8358
UW
1322 set_gdbarch_core_read_description (gdbarch, arm_linux_core_read_description);
1323
1324 if (tdep->have_vfp_registers)
1325 set_gdbarch_core_regset_sections (gdbarch, arm_linux_vfp_regset_sections);
1326 else if (tdep->have_fpa_registers)
1327 set_gdbarch_core_regset_sections (gdbarch, arm_linux_fpa_regset_sections);
4aa995e1
PA
1328
1329 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
cca44b1b
JB
1330
1331 /* Displaced stepping. */
1332 set_gdbarch_displaced_step_copy_insn (gdbarch,
1333 arm_linux_displaced_step_copy_insn);
1334 set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup);
1335 set_gdbarch_displaced_step_free_closure (gdbarch,
1336 simple_displaced_step_free_closure);
1337 set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point);
25b41d01 1338
72508ac0
PO
1339 /* Reversible debugging, process record. */
1340 set_gdbarch_process_record (gdbarch, arm_process_record);
25b41d01 1341
55aa24fb 1342 /* SystemTap functions. */
05c0465e
SDJ
1343 set_gdbarch_stap_integer_prefixes (gdbarch, stap_integer_prefixes);
1344 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
1345 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
1346 stap_register_indirection_prefixes);
1347 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
1348 stap_register_indirection_suffixes);
55aa24fb
SDJ
1349 set_gdbarch_stap_gdb_register_prefix (gdbarch, "r");
1350 set_gdbarch_stap_is_single_operand (gdbarch, arm_stap_is_single_operand);
1351 set_gdbarch_stap_parse_special_token (gdbarch,
1352 arm_stap_parse_special_token);
1353
25b41d01 1354 tdep->syscall_next_pc = arm_linux_syscall_next_pc;
72508ac0 1355
9f948660
SDJ
1356 /* `catch syscall' */
1357 set_xml_syscall_file_name ("syscalls/arm-linux.xml");
1358 set_gdbarch_get_syscall_number (gdbarch, arm_linux_get_syscall_number);
1359
72508ac0
PO
1360 /* Syscall record. */
1361 tdep->arm_swi_record = NULL;
97e03143
RE
1362}
1363
63807e1d
PA
1364/* Provide a prototype to silence -Wmissing-prototypes. */
1365extern initialize_file_ftype _initialize_arm_linux_tdep;
1366
faf5f7ad
SB
1367void
1368_initialize_arm_linux_tdep (void)
1369{
05816f70
MK
1370 gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
1371 arm_linux_init_abi);
faf5f7ad 1372}
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