Add support for backtracing through signal handlers on Linux/ARM. Also,
[deliverable/binutils-gdb.git] / gdb / arm-linux-tdep.c
CommitLineData
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1/* GNU/Linux on ARM target support.
2 Copyright 1999, 2000 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include "defs.h"
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22#include "target.h"
23#include "value.h"
faf5f7ad 24#include "gdbtypes.h"
134e61c4 25#include "floatformat.h"
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26#include "gdbcore.h"
27#include "frame.h"
faf5f7ad 28
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29/* For arm_linux_skip_solib_resolver. */
30#include "symtab.h"
31#include "symfile.h"
32#include "objfiles.h"
33
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34/* FIXME: Put in common header file shared between arm-tdep.c and
35 arm-linux-tdep.c */
36int arm_pc_is_thumb (CORE_ADDR memaddr);
37
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38#ifdef GET_LONGJMP_TARGET
39
40/* Figure out where the longjmp will land. We expect that we have
41 just entered longjmp and haven't yet altered r0, r1, so the
42 arguments are still in the registers. (A1_REGNUM) points at the
43 jmp_buf structure from which we extract the pc (JB_PC) that we will
44 land at. The pc is copied into ADDR. This routine returns true on
45 success. */
46
47#define LONGJMP_TARGET_SIZE sizeof(int)
48#define JB_ELEMENT_SIZE sizeof(int)
49#define JB_SL 18
50#define JB_FP 19
51#define JB_SP 20
52#define JB_PC 21
53
54int
55arm_get_longjmp_target (CORE_ADDR * pc)
56{
57 CORE_ADDR jb_addr;
58 char buf[LONGJMP_TARGET_SIZE];
59
60 jb_addr = read_register (A1_REGNUM);
61
62 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
63 LONGJMP_TARGET_SIZE))
64 return 0;
65
66 *pc = extract_address (buf, LONGJMP_TARGET_SIZE);
67 return 1;
68}
69
70#endif /* GET_LONGJMP_TARGET */
71
72/* Extract from an array REGBUF containing the (raw) register state
73 a function return value of type TYPE, and copy that, in virtual format,
74 into VALBUF. */
75
76void
77arm_linux_extract_return_value (struct type *type,
78 char regbuf[REGISTER_BYTES],
79 char *valbuf)
80{
81 /* ScottB: This needs to be looked at to handle the different
82 floating point emulators on ARM Linux. Right now the code
83 assumes that fetch inferior registers does the right thing for
84 GDB. I suspect this won't handle NWFPE registers correctly, nor
85 will the default ARM version (arm_extract_return_value()). */
86
87 int regnum = (TYPE_CODE_FLT == TYPE_CODE (type)) ? F0_REGNUM : A1_REGNUM;
88 memcpy (valbuf, &regbuf[REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
89}
90
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91/* Note: ScottB
92
93 This function does not support passing parameters using the FPA
94 variant of the APCS. It passes any floating point arguments in the
95 general registers and/or on the stack.
96
97 FIXME: This and arm_push_arguments should be merged. However this
98 function breaks on a little endian host, big endian target
99 using the COFF file format. ELF is ok.
100
101 ScottB. */
102
103/* Addresses for calling Thumb functions have the bit 0 set.
104 Here are some macros to test, set, or clear bit 0 of addresses. */
105#define IS_THUMB_ADDR(addr) ((addr) & 1)
106#define MAKE_THUMB_ADDR(addr) ((addr) | 1)
107#define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
108
109CORE_ADDR
110arm_linux_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp,
111 int struct_return, CORE_ADDR struct_addr)
112{
113 char *fp;
114 int argnum, argreg, nstack_size;
115
116 /* Walk through the list of args and determine how large a temporary
117 stack is required. Need to take care here as structs may be
118 passed on the stack, and we have to to push them. */
119 nstack_size = -4 * REGISTER_SIZE; /* Some arguments go into A1-A4. */
120
121 if (struct_return) /* The struct address goes in A1. */
122 nstack_size += REGISTER_SIZE;
123
124 /* Walk through the arguments and add their size to nstack_size. */
125 for (argnum = 0; argnum < nargs; argnum++)
126 {
127 int len;
128 struct type *arg_type;
129
130 arg_type = check_typedef (VALUE_TYPE (args[argnum]));
131 len = TYPE_LENGTH (arg_type);
132
133 /* ANSI C code passes float arguments as integers, K&R code
134 passes float arguments as doubles. Correct for this here. */
135 if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && REGISTER_SIZE == len)
136 nstack_size += FP_REGISTER_VIRTUAL_SIZE;
137 else
138 nstack_size += len;
139 }
140
141 /* Allocate room on the stack, and initialize our stack frame
142 pointer. */
143 fp = NULL;
144 if (nstack_size > 0)
145 {
146 sp -= nstack_size;
147 fp = (char *) sp;
148 }
149
150 /* Initialize the integer argument register pointer. */
151 argreg = A1_REGNUM;
152
153 /* The struct_return pointer occupies the first parameter passing
154 register. */
155 if (struct_return)
156 write_register (argreg++, struct_addr);
157
158 /* Process arguments from left to right. Store as many as allowed
159 in the parameter passing registers (A1-A4), and save the rest on
160 the temporary stack. */
161 for (argnum = 0; argnum < nargs; argnum++)
162 {
163 int len;
164 char *val;
165 double dbl_arg;
166 CORE_ADDR regval;
167 enum type_code typecode;
168 struct type *arg_type, *target_type;
169
170 arg_type = check_typedef (VALUE_TYPE (args[argnum]));
171 target_type = TYPE_TARGET_TYPE (arg_type);
172 len = TYPE_LENGTH (arg_type);
173 typecode = TYPE_CODE (arg_type);
174 val = (char *) VALUE_CONTENTS (args[argnum]);
175
176 /* ANSI C code passes float arguments as integers, K&R code
177 passes float arguments as doubles. The .stabs record for
178 for ANSI prototype floating point arguments records the
179 type as FP_INTEGER, while a K&R style (no prototype)
180 .stabs records the type as FP_FLOAT. In this latter case
181 the compiler converts the float arguments to double before
182 calling the function. */
183 if (TYPE_CODE_FLT == typecode && REGISTER_SIZE == len)
184 {
185 /* Float argument in buffer is in host format. Read it and
186 convert to DOUBLEST, and store it in target double. */
187 DOUBLEST dblval;
188
189 len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
190 floatformat_to_doublest (HOST_FLOAT_FORMAT, val, &dblval);
191 store_floating (&dbl_arg, len, dblval);
192 val = (char *) &dbl_arg;
193 }
194
195 /* If the argument is a pointer to a function, and it is a Thumb
196 function, set the low bit of the pointer. */
197 if (TYPE_CODE_PTR == typecode
198 && NULL != target_type
199 && TYPE_CODE_FUNC == TYPE_CODE (target_type))
200 {
201 CORE_ADDR regval = extract_address (val, len);
202 if (arm_pc_is_thumb (regval))
203 store_address (val, len, MAKE_THUMB_ADDR (regval));
204 }
205
206 /* Copy the argument to general registers or the stack in
207 register-sized pieces. Large arguments are split between
208 registers and stack. */
209 while (len > 0)
210 {
211 int partial_len = len < REGISTER_SIZE ? len : REGISTER_SIZE;
212
213 if (argreg <= ARM_LAST_ARG_REGNUM)
214 {
215 /* It's an argument being passed in a general register. */
216 regval = extract_address (val, partial_len);
217 write_register (argreg++, regval);
218 }
219 else
220 {
221 /* Push the arguments onto the stack. */
222 write_memory ((CORE_ADDR) fp, val, REGISTER_SIZE);
223 fp += REGISTER_SIZE;
224 }
225
226 len -= partial_len;
227 val += partial_len;
228 }
229 }
230
231 /* Return adjusted stack pointer. */
232 return sp;
233}
234
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235/*
236 Dynamic Linking on ARM Linux
237 ----------------------------
238
239 Note: PLT = procedure linkage table
240 GOT = global offset table
241
242 As much as possible, ELF dynamic linking defers the resolution of
243 jump/call addresses until the last minute. The technique used is
244 inspired by the i386 ELF design, and is based on the following
245 constraints.
246
247 1) The calling technique should not force a change in the assembly
248 code produced for apps; it MAY cause changes in the way assembly
249 code is produced for position independent code (i.e. shared
250 libraries).
251
252 2) The technique must be such that all executable areas must not be
253 modified; and any modified areas must not be executed.
254
255 To do this, there are three steps involved in a typical jump:
256
257 1) in the code
258 2) through the PLT
259 3) using a pointer from the GOT
260
261 When the executable or library is first loaded, each GOT entry is
262 initialized to point to the code which implements dynamic name
263 resolution and code finding. This is normally a function in the
264 program interpreter (on ARM Linux this is usually ld-linux.so.2,
265 but it does not have to be). On the first invocation, the function
266 is located and the GOT entry is replaced with the real function
267 address. Subsequent calls go through steps 1, 2 and 3 and end up
268 calling the real code.
269
270 1) In the code:
271
272 b function_call
273 bl function_call
274
275 This is typical ARM code using the 26 bit relative branch or branch
276 and link instructions. The target of the instruction
277 (function_call is usually the address of the function to be called.
278 In position independent code, the target of the instruction is
279 actually an entry in the PLT when calling functions in a shared
280 library. Note that this call is identical to a normal function
281 call, only the target differs.
282
283 2) In the PLT:
284
285 The PLT is a synthetic area, created by the linker. It exists in
286 both executables and libraries. It is an array of stubs, one per
287 imported function call. It looks like this:
288
289 PLT[0]:
290 str lr, [sp, #-4]! @push the return address (lr)
291 ldr lr, [pc, #16] @load from 6 words ahead
292 add lr, pc, lr @form an address for GOT[0]
293 ldr pc, [lr, #8]! @jump to the contents of that addr
294
295 The return address (lr) is pushed on the stack and used for
296 calculations. The load on the second line loads the lr with
297 &GOT[3] - . - 20. The addition on the third leaves:
298
299 lr = (&GOT[3] - . - 20) + (. + 8)
300 lr = (&GOT[3] - 12)
301 lr = &GOT[0]
302
303 On the fourth line, the pc and lr are both updated, so that:
304
305 pc = GOT[2]
306 lr = &GOT[0] + 8
307 = &GOT[2]
308
309 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
310 "tight", but allows us to keep all the PLT entries the same size.
311
312 PLT[n+1]:
313 ldr ip, [pc, #4] @load offset from gotoff
314 add ip, pc, ip @add the offset to the pc
315 ldr pc, [ip] @jump to that address
316 gotoff: .word GOT[n+3] - .
317
318 The load on the first line, gets an offset from the fourth word of
319 the PLT entry. The add on the second line makes ip = &GOT[n+3],
320 which contains either a pointer to PLT[0] (the fixup trampoline) or
321 a pointer to the actual code.
322
323 3) In the GOT:
324
325 The GOT contains helper pointers for both code (PLT) fixups and
326 data fixups. The first 3 entries of the GOT are special. The next
327 M entries (where M is the number of entries in the PLT) belong to
328 the PLT fixups. The next D (all remaining) entries belong to
329 various data fixups. The actual size of the GOT is 3 + M + D.
330
331 The GOT is also a synthetic area, created by the linker. It exists
332 in both executables and libraries. When the GOT is first
333 initialized , all the GOT entries relating to PLT fixups are
334 pointing to code back at PLT[0].
335
336 The special entries in the GOT are:
337
338 GOT[0] = linked list pointer used by the dynamic loader
339 GOT[1] = pointer to the reloc table for this module
340 GOT[2] = pointer to the fixup/resolver code
341
342 The first invocation of function call comes through and uses the
343 fixup/resolver code. On the entry to the fixup/resolver code:
344
345 ip = &GOT[n+3]
346 lr = &GOT[2]
347 stack[0] = return address (lr) of the function call
348 [r0, r1, r2, r3] are still the arguments to the function call
349
350 This is enough information for the fixup/resolver code to work
351 with. Before the fixup/resolver code returns, it actually calls
352 the requested function and repairs &GOT[n+3]. */
353
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354/* Find the minimal symbol named NAME, and return both the minsym
355 struct and its objfile. This probably ought to be in minsym.c, but
356 everything there is trying to deal with things like C++ and
357 SOFUN_ADDRESS_MAYBE_TURQUOISE, ... Since this is so simple, it may
358 be considered too special-purpose for general consumption. */
359
360static struct minimal_symbol *
361find_minsym_and_objfile (char *name, struct objfile **objfile_p)
362{
363 struct objfile *objfile;
364
365 ALL_OBJFILES (objfile)
366 {
367 struct minimal_symbol *msym;
368
369 ALL_OBJFILE_MSYMBOLS (objfile, msym)
370 {
371 if (SYMBOL_NAME (msym)
372 && STREQ (SYMBOL_NAME (msym), name))
373 {
374 *objfile_p = objfile;
375 return msym;
376 }
377 }
378 }
379
380 return 0;
381}
382
383
384static CORE_ADDR
385skip_hurd_resolver (CORE_ADDR pc)
386{
387 /* The HURD dynamic linker is part of the GNU C library, so many
388 GNU/Linux distributions use it. (All ELF versions, as far as I
389 know.) An unresolved PLT entry points to "_dl_runtime_resolve",
390 which calls "fixup" to patch the PLT, and then passes control to
391 the function.
392
393 We look for the symbol `_dl_runtime_resolve', and find `fixup' in
394 the same objfile. If we are at the entry point of `fixup', then
395 we set a breakpoint at the return address (at the top of the
396 stack), and continue.
397
398 It's kind of gross to do all these checks every time we're
399 called, since they don't change once the executable has gotten
400 started. But this is only a temporary hack --- upcoming versions
401 of Linux will provide a portable, efficient interface for
402 debugging programs that use shared libraries. */
403
404 struct objfile *objfile;
405 struct minimal_symbol *resolver
406 = find_minsym_and_objfile ("_dl_runtime_resolve", &objfile);
407
408 if (resolver)
409 {
410 struct minimal_symbol *fixup
411 = lookup_minimal_symbol ("fixup", 0, objfile);
412
413 if (fixup && SYMBOL_VALUE_ADDRESS (fixup) == pc)
414 return (SAVED_PC_AFTER_CALL (get_current_frame ()));
415 }
416
417 return 0;
418}
419
420/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c.
421 This function:
422 1) decides whether a PLT has sent us into the linker to resolve
423 a function reference, and
424 2) if so, tells us where to set a temporary breakpoint that will
425 trigger when the dynamic linker is done. */
426
f38e884d 427CORE_ADDR
a52e6aac 428arm_linux_skip_solib_resolver (CORE_ADDR pc)
f38e884d 429{
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430 CORE_ADDR result;
431
432 /* Plug in functions for other kinds of resolvers here. */
433 result = skip_hurd_resolver (pc);
2a451106 434 printf ("Result = 0x%08lx\n", result);
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435 if (result)
436 return result;
437
438
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439 return 0;
440}
441
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442/* The constants below were determined by examining the following files
443 in the linux kernel sources:
444
445 arch/arm/kernel/signal.c
446 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
447 include/asm-arm/unistd.h
448 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
449
450#define ARM_LINUX_SIGRETURN_INSTR 0xef900077
451#define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
452
453/* arm_linux_in_sigtramp determines if PC points at one of the
454 instructions which cause control to return to the Linux kernel upon
455 return from a signal handler. FUNC_NAME is unused. */
456
457int
458arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
459{
460 unsigned long inst;
461
462 inst = read_memory_integer (pc, 4);
463
464 return (inst == ARM_LINUX_SIGRETURN_INSTR
465 || inst == ARM_LINUX_RT_SIGRETURN_INSTR);
466
467}
468
469/* arm_linux_sigcontext_register_address returns the address in the
470 sigcontext of register REGNO given a stack pointer value SP and
471 program counter value PC. The value 0 is returned if PC is not
472 pointing at one of the signal return instructions or if REGNO is
473 not saved in the sigcontext struct. */
474
475CORE_ADDR
476arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno)
477{
478 unsigned long inst;
479 CORE_ADDR reg_addr = 0;
480
481 inst = read_memory_integer (pc, 4);
482
483 if (inst == ARM_LINUX_SIGRETURN_INSTR || inst == ARM_LINUX_RT_SIGRETURN_INSTR)
484 {
485 CORE_ADDR sigcontext_addr;
486
487 /* The sigcontext structure is at different places for the two
488 signal return instructions. For ARM_LINUX_SIGRETURN_INSTR,
489 it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR,
490 it is at SP+8. For the latter instruction, it may also be
491 the case that the address of this structure may be determined
492 by reading the 4 bytes at SP, but I'm not convinced this is
493 reliable.
494
495 In any event, these magic constants (0 and 8) may be
496 determined by examining struct sigframe and struct
497 rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel
498 sources. */
499
500 if (inst == ARM_LINUX_RT_SIGRETURN_INSTR)
501 sigcontext_addr = sp + 8;
502 else /* inst == ARM_LINUX_SIGRETURN_INSTR */
503 sigcontext_addr = sp + 0;
504
505 /* The layout of the sigcontext structure for ARM GNU/Linux is
506 in include/asm-arm/sigcontext.h in the Linux kernel sources.
507
508 There are three 4-byte fields which precede the saved r0
509 field. (This accounts for the 12 in the code below.) The
510 sixteen registers (4 bytes per field) follow in order. The
511 PSR value follows the sixteen registers which accounts for
512 the constant 19 below. */
513
514 if (0 <= regno && regno <= PC_REGNUM)
515 reg_addr = sigcontext_addr + 12 + (4 * regno);
516 else if (regno == PS_REGNUM)
517 reg_addr = sigcontext_addr + 19 * 4;
518 }
519
520 return reg_addr;
521}
522
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523void
524_initialize_arm_linux_tdep (void)
525{
526}
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