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faf5f7ad | 1 | /* GNU/Linux on ARM target support. |
0fd88904 | 2 | |
32d0add0 | 3 | Copyright (C) 1999-2015 Free Software Foundation, Inc. |
faf5f7ad SB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
faf5f7ad SB |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
faf5f7ad SB |
19 | |
20 | #include "defs.h" | |
c20f6dea SB |
21 | #include "target.h" |
22 | #include "value.h" | |
faf5f7ad | 23 | #include "gdbtypes.h" |
134e61c4 | 24 | #include "floatformat.h" |
2a451106 KB |
25 | #include "gdbcore.h" |
26 | #include "frame.h" | |
4e052eda | 27 | #include "regcache.h" |
d16aafd8 | 28 | #include "doublest.h" |
7aa1783e | 29 | #include "solib-svr4.h" |
4be87837 | 30 | #include "osabi.h" |
cb587d83 | 31 | #include "regset.h" |
8e9d1a24 DJ |
32 | #include "trad-frame.h" |
33 | #include "tramp-frame.h" | |
daddc3c1 | 34 | #include "breakpoint.h" |
ef7e8358 | 35 | #include "auxv.h" |
9f948660 | 36 | #include "xml-syscall.h" |
faf5f7ad | 37 | |
34e8f22d | 38 | #include "arm-tdep.h" |
cb587d83 | 39 | #include "arm-linux-tdep.h" |
4aa995e1 | 40 | #include "linux-tdep.h" |
0670c0aa | 41 | #include "glibc-tdep.h" |
cca44b1b JB |
42 | #include "arch-utils.h" |
43 | #include "inferior.h" | |
45741a9c | 44 | #include "infrun.h" |
cca44b1b JB |
45 | #include "gdbthread.h" |
46 | #include "symfile.h" | |
a52e6aac | 47 | |
97dfe206 OJ |
48 | #include "record-full.h" |
49 | #include "linux-record.h" | |
50 | ||
55aa24fb SDJ |
51 | #include "cli/cli-utils.h" |
52 | #include "stap-probe.h" | |
53 | #include "parser-defs.h" | |
54 | #include "user-regs.h" | |
55 | #include <ctype.h> | |
04a83fee | 56 | #include "elf/common.h" |
cb587d83 DJ |
57 | extern int arm_apcs_32; |
58 | ||
fdf39c9a RE |
59 | /* Under ARM GNU/Linux the traditional way of performing a breakpoint |
60 | is to execute a particular software interrupt, rather than use a | |
61 | particular undefined instruction to provoke a trap. Upon exection | |
62 | of the software interrupt the kernel stops the inferior with a | |
498b1f87 | 63 | SIGTRAP, and wakes the debugger. */ |
66e810cd | 64 | |
948f8e3d | 65 | static const gdb_byte arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef }; |
2ef47cd0 | 66 | |
948f8e3d | 67 | static const gdb_byte arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 }; |
66e810cd | 68 | |
c75a2cc8 DJ |
69 | /* However, the EABI syscall interface (new in Nov. 2005) does not look at |
70 | the operand of the swi if old-ABI compatibility is disabled. Therefore, | |
71 | use an undefined instruction instead. This is supported as of kernel | |
72 | version 2.5.70 (May 2003), so should be a safe assumption for EABI | |
73 | binaries. */ | |
74 | ||
948f8e3d | 75 | static const gdb_byte eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 }; |
c75a2cc8 | 76 | |
948f8e3d | 77 | static const gdb_byte eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 }; |
c75a2cc8 DJ |
78 | |
79 | /* All the kernels which support Thumb support using a specific undefined | |
80 | instruction for the Thumb breakpoint. */ | |
81 | ||
948f8e3d | 82 | static const gdb_byte arm_linux_thumb_be_breakpoint[] = {0xde, 0x01}; |
498b1f87 | 83 | |
948f8e3d | 84 | static const gdb_byte arm_linux_thumb_le_breakpoint[] = {0x01, 0xde}; |
498b1f87 | 85 | |
177321bd DJ |
86 | /* Because the 16-bit Thumb breakpoint is affected by Thumb-2 IT blocks, |
87 | we must use a length-appropriate breakpoint for 32-bit Thumb | |
88 | instructions. See also thumb_get_next_pc. */ | |
89 | ||
948f8e3d | 90 | static const gdb_byte arm_linux_thumb2_be_breakpoint[] = { 0xf7, 0xf0, 0xa0, 0x00 }; |
177321bd | 91 | |
948f8e3d | 92 | static const gdb_byte arm_linux_thumb2_le_breakpoint[] = { 0xf0, 0xf7, 0x00, 0xa0 }; |
177321bd | 93 | |
f8624c62 MGD |
94 | /* Description of the longjmp buffer. The buffer is treated as an array of |
95 | elements of size ARM_LINUX_JB_ELEMENT_SIZE. | |
96 | ||
97 | The location of saved registers in this buffer (in particular the PC | |
98 | to use after longjmp is called) varies depending on the ABI (in | |
99 | particular the FP model) and also (possibly) the C Library. | |
100 | ||
101 | For glibc, eglibc, and uclibc the following holds: If the FP model is | |
102 | SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the | |
103 | buffer. This is also true for the SoftFPA model. However, for the FPA | |
104 | model the PC is at offset 21 in the buffer. */ | |
7a5ea0d4 | 105 | #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE |
f8624c62 MGD |
106 | #define ARM_LINUX_JB_PC_FPA 21 |
107 | #define ARM_LINUX_JB_PC_EABI 9 | |
faf5f7ad | 108 | |
f38e884d | 109 | /* |
fdf39c9a RE |
110 | Dynamic Linking on ARM GNU/Linux |
111 | -------------------------------- | |
f38e884d SB |
112 | |
113 | Note: PLT = procedure linkage table | |
114 | GOT = global offset table | |
115 | ||
116 | As much as possible, ELF dynamic linking defers the resolution of | |
0963b4bd | 117 | jump/call addresses until the last minute. The technique used is |
f38e884d SB |
118 | inspired by the i386 ELF design, and is based on the following |
119 | constraints. | |
120 | ||
121 | 1) The calling technique should not force a change in the assembly | |
122 | code produced for apps; it MAY cause changes in the way assembly | |
123 | code is produced for position independent code (i.e. shared | |
124 | libraries). | |
125 | ||
126 | 2) The technique must be such that all executable areas must not be | |
127 | modified; and any modified areas must not be executed. | |
128 | ||
129 | To do this, there are three steps involved in a typical jump: | |
130 | ||
131 | 1) in the code | |
132 | 2) through the PLT | |
133 | 3) using a pointer from the GOT | |
134 | ||
135 | When the executable or library is first loaded, each GOT entry is | |
136 | initialized to point to the code which implements dynamic name | |
137 | resolution and code finding. This is normally a function in the | |
fdf39c9a RE |
138 | program interpreter (on ARM GNU/Linux this is usually |
139 | ld-linux.so.2, but it does not have to be). On the first | |
140 | invocation, the function is located and the GOT entry is replaced | |
141 | with the real function address. Subsequent calls go through steps | |
142 | 1, 2 and 3 and end up calling the real code. | |
f38e884d SB |
143 | |
144 | 1) In the code: | |
145 | ||
146 | b function_call | |
147 | bl function_call | |
148 | ||
149 | This is typical ARM code using the 26 bit relative branch or branch | |
150 | and link instructions. The target of the instruction | |
151 | (function_call is usually the address of the function to be called. | |
152 | In position independent code, the target of the instruction is | |
153 | actually an entry in the PLT when calling functions in a shared | |
154 | library. Note that this call is identical to a normal function | |
155 | call, only the target differs. | |
156 | ||
157 | 2) In the PLT: | |
158 | ||
0963b4bd MS |
159 | The PLT is a synthetic area, created by the linker. It exists in |
160 | both executables and libraries. It is an array of stubs, one per | |
161 | imported function call. It looks like this: | |
f38e884d SB |
162 | |
163 | PLT[0]: | |
164 | str lr, [sp, #-4]! @push the return address (lr) | |
165 | ldr lr, [pc, #16] @load from 6 words ahead | |
166 | add lr, pc, lr @form an address for GOT[0] | |
167 | ldr pc, [lr, #8]! @jump to the contents of that addr | |
168 | ||
169 | The return address (lr) is pushed on the stack and used for | |
170 | calculations. The load on the second line loads the lr with | |
171 | &GOT[3] - . - 20. The addition on the third leaves: | |
172 | ||
173 | lr = (&GOT[3] - . - 20) + (. + 8) | |
174 | lr = (&GOT[3] - 12) | |
175 | lr = &GOT[0] | |
176 | ||
177 | On the fourth line, the pc and lr are both updated, so that: | |
178 | ||
179 | pc = GOT[2] | |
180 | lr = &GOT[0] + 8 | |
181 | = &GOT[2] | |
182 | ||
0963b4bd | 183 | NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little |
f38e884d SB |
184 | "tight", but allows us to keep all the PLT entries the same size. |
185 | ||
186 | PLT[n+1]: | |
187 | ldr ip, [pc, #4] @load offset from gotoff | |
188 | add ip, pc, ip @add the offset to the pc | |
189 | ldr pc, [ip] @jump to that address | |
190 | gotoff: .word GOT[n+3] - . | |
191 | ||
192 | The load on the first line, gets an offset from the fourth word of | |
193 | the PLT entry. The add on the second line makes ip = &GOT[n+3], | |
194 | which contains either a pointer to PLT[0] (the fixup trampoline) or | |
195 | a pointer to the actual code. | |
196 | ||
197 | 3) In the GOT: | |
198 | ||
199 | The GOT contains helper pointers for both code (PLT) fixups and | |
0963b4bd | 200 | data fixups. The first 3 entries of the GOT are special. The next |
f38e884d | 201 | M entries (where M is the number of entries in the PLT) belong to |
0963b4bd MS |
202 | the PLT fixups. The next D (all remaining) entries belong to |
203 | various data fixups. The actual size of the GOT is 3 + M + D. | |
f38e884d | 204 | |
0963b4bd | 205 | The GOT is also a synthetic area, created by the linker. It exists |
f38e884d SB |
206 | in both executables and libraries. When the GOT is first |
207 | initialized , all the GOT entries relating to PLT fixups are | |
208 | pointing to code back at PLT[0]. | |
209 | ||
210 | The special entries in the GOT are: | |
211 | ||
212 | GOT[0] = linked list pointer used by the dynamic loader | |
213 | GOT[1] = pointer to the reloc table for this module | |
214 | GOT[2] = pointer to the fixup/resolver code | |
215 | ||
216 | The first invocation of function call comes through and uses the | |
217 | fixup/resolver code. On the entry to the fixup/resolver code: | |
218 | ||
219 | ip = &GOT[n+3] | |
220 | lr = &GOT[2] | |
221 | stack[0] = return address (lr) of the function call | |
222 | [r0, r1, r2, r3] are still the arguments to the function call | |
223 | ||
224 | This is enough information for the fixup/resolver code to work | |
225 | with. Before the fixup/resolver code returns, it actually calls | |
226 | the requested function and repairs &GOT[n+3]. */ | |
227 | ||
2a451106 KB |
228 | /* The constants below were determined by examining the following files |
229 | in the linux kernel sources: | |
230 | ||
231 | arch/arm/kernel/signal.c | |
232 | - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN | |
233 | include/asm-arm/unistd.h | |
234 | - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */ | |
235 | ||
236 | #define ARM_LINUX_SIGRETURN_INSTR 0xef900077 | |
237 | #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad | |
238 | ||
edfb1a26 DJ |
239 | /* For ARM EABI, the syscall number is not in the SWI instruction |
240 | (instead it is loaded into r7). We recognize the pattern that | |
241 | glibc uses... alternatively, we could arrange to do this by | |
242 | function name, but they are not always exported. */ | |
8e9d1a24 DJ |
243 | #define ARM_SET_R7_SIGRETURN 0xe3a07077 |
244 | #define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad | |
245 | #define ARM_EABI_SYSCALL 0xef000000 | |
2a451106 | 246 | |
f347ffc9 WN |
247 | /* Equivalent patterns for Thumb2. */ |
248 | #define THUMB2_SET_R7_SIGRETURN1 0xf04f | |
249 | #define THUMB2_SET_R7_SIGRETURN2 0x0777 | |
250 | #define THUMB2_SET_R7_RT_SIGRETURN1 0xf04f | |
251 | #define THUMB2_SET_R7_RT_SIGRETURN2 0x07ad | |
252 | #define THUMB2_EABI_SYSCALL 0xdf00 | |
253 | ||
f1973203 MR |
254 | /* OABI syscall restart trampoline, used for EABI executables too |
255 | whenever OABI support has been enabled in the kernel. */ | |
256 | #define ARM_OABI_SYSCALL_RESTART_SYSCALL 0xef900000 | |
257 | #define ARM_LDR_PC_SP_12 0xe49df00c | |
478fd957 | 258 | #define ARM_LDR_PC_SP_4 0xe49df004 |
f1973203 | 259 | |
d0e59a68 AT |
260 | /* Syscall number for sigreturn. */ |
261 | #define ARM_SIGRETURN 119 | |
262 | /* Syscall number for rt_sigreturn. */ | |
263 | #define ARM_RT_SIGRETURN 173 | |
264 | ||
8e9d1a24 | 265 | static void |
a262aec2 | 266 | arm_linux_sigtramp_cache (struct frame_info *this_frame, |
8e9d1a24 DJ |
267 | struct trad_frame_cache *this_cache, |
268 | CORE_ADDR func, int regs_offset) | |
2a451106 | 269 | { |
a262aec2 | 270 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
8e9d1a24 DJ |
271 | CORE_ADDR base = sp + regs_offset; |
272 | int i; | |
2a451106 | 273 | |
8e9d1a24 DJ |
274 | for (i = 0; i < 16; i++) |
275 | trad_frame_set_reg_addr (this_cache, i, base + i * 4); | |
2a451106 | 276 | |
8e9d1a24 | 277 | trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4); |
2a451106 | 278 | |
8e9d1a24 DJ |
279 | /* The VFP or iWMMXt registers may be saved on the stack, but there's |
280 | no reliable way to restore them (yet). */ | |
2a451106 | 281 | |
8e9d1a24 DJ |
282 | /* Save a frame ID. */ |
283 | trad_frame_set_id (this_cache, frame_id_build (sp, func)); | |
284 | } | |
2a451106 | 285 | |
edfb1a26 DJ |
286 | /* There are a couple of different possible stack layouts that |
287 | we need to support. | |
288 | ||
289 | Before version 2.6.18, the kernel used completely independent | |
290 | layouts for non-RT and RT signals. For non-RT signals the stack | |
291 | began directly with a struct sigcontext. For RT signals the stack | |
292 | began with two redundant pointers (to the siginfo and ucontext), | |
293 | and then the siginfo and ucontext. | |
294 | ||
295 | As of version 2.6.18, the non-RT signal frame layout starts with | |
296 | a ucontext and the RT signal frame starts with a siginfo and then | |
297 | a ucontext. Also, the ucontext now has a designated save area | |
298 | for coprocessor registers. | |
299 | ||
300 | For RT signals, it's easy to tell the difference: we look for | |
301 | pinfo, the pointer to the siginfo. If it has the expected | |
302 | value, we have an old layout. If it doesn't, we have the new | |
303 | layout. | |
304 | ||
305 | For non-RT signals, it's a bit harder. We need something in one | |
306 | layout or the other with a recognizable offset and value. We can't | |
307 | use the return trampoline, because ARM usually uses SA_RESTORER, | |
308 | in which case the stack return trampoline is not filled in. | |
309 | We can't use the saved stack pointer, because sigaltstack might | |
310 | be in use. So for now we guess the new layout... */ | |
311 | ||
312 | /* There are three words (trap_no, error_code, oldmask) in | |
313 | struct sigcontext before r0. */ | |
314 | #define ARM_SIGCONTEXT_R0 0xc | |
315 | ||
316 | /* There are five words (uc_flags, uc_link, and three for uc_stack) | |
317 | in the ucontext_t before the sigcontext. */ | |
318 | #define ARM_UCONTEXT_SIGCONTEXT 0x14 | |
319 | ||
320 | /* There are three elements in an rt_sigframe before the ucontext: | |
321 | pinfo, puc, and info. The first two are pointers and the third | |
322 | is a struct siginfo, with size 128 bytes. We could follow puc | |
323 | to the ucontext, but it's simpler to skip the whole thing. */ | |
324 | #define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8 | |
325 | #define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88 | |
326 | ||
327 | #define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80 | |
328 | ||
329 | #define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a | |
330 | ||
8e9d1a24 DJ |
331 | static void |
332 | arm_linux_sigreturn_init (const struct tramp_frame *self, | |
a262aec2 | 333 | struct frame_info *this_frame, |
8e9d1a24 DJ |
334 | struct trad_frame_cache *this_cache, |
335 | CORE_ADDR func) | |
2a451106 | 336 | { |
e17a4113 UW |
337 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
338 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
a262aec2 | 339 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
e17a4113 | 340 | ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order); |
edfb1a26 DJ |
341 | |
342 | if (uc_flags == ARM_NEW_SIGFRAME_MAGIC) | |
a262aec2 | 343 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 DJ |
344 | ARM_UCONTEXT_SIGCONTEXT |
345 | + ARM_SIGCONTEXT_R0); | |
346 | else | |
a262aec2 | 347 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 | 348 | ARM_SIGCONTEXT_R0); |
8e9d1a24 | 349 | } |
2a451106 | 350 | |
8e9d1a24 DJ |
351 | static void |
352 | arm_linux_rt_sigreturn_init (const struct tramp_frame *self, | |
a262aec2 | 353 | struct frame_info *this_frame, |
8e9d1a24 DJ |
354 | struct trad_frame_cache *this_cache, |
355 | CORE_ADDR func) | |
356 | { | |
e17a4113 UW |
357 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
358 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
a262aec2 | 359 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
e17a4113 | 360 | ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order); |
edfb1a26 DJ |
361 | |
362 | if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO) | |
a262aec2 | 363 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 DJ |
364 | ARM_OLD_RT_SIGFRAME_UCONTEXT |
365 | + ARM_UCONTEXT_SIGCONTEXT | |
366 | + ARM_SIGCONTEXT_R0); | |
367 | else | |
a262aec2 | 368 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 DJ |
369 | ARM_NEW_RT_SIGFRAME_UCONTEXT |
370 | + ARM_UCONTEXT_SIGCONTEXT | |
371 | + ARM_SIGCONTEXT_R0); | |
2a451106 KB |
372 | } |
373 | ||
f1973203 MR |
374 | static void |
375 | arm_linux_restart_syscall_init (const struct tramp_frame *self, | |
376 | struct frame_info *this_frame, | |
377 | struct trad_frame_cache *this_cache, | |
378 | CORE_ADDR func) | |
379 | { | |
478fd957 | 380 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
f1973203 | 381 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
478fd957 UW |
382 | CORE_ADDR pc = get_frame_memory_unsigned (this_frame, sp, 4); |
383 | CORE_ADDR cpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM); | |
384 | ULONGEST t_bit = arm_psr_thumb_bit (gdbarch); | |
385 | int sp_offset; | |
386 | ||
387 | /* There are two variants of this trampoline; with older kernels, the | |
388 | stub is placed on the stack, while newer kernels use the stub from | |
389 | the vector page. They are identical except that the older version | |
390 | increments SP by 12 (to skip stored PC and the stub itself), while | |
391 | the newer version increments SP only by 4 (just the stored PC). */ | |
392 | if (self->insn[1].bytes == ARM_LDR_PC_SP_4) | |
393 | sp_offset = 4; | |
394 | else | |
395 | sp_offset = 12; | |
396 | ||
397 | /* Update Thumb bit in CPSR. */ | |
398 | if (pc & 1) | |
399 | cpsr |= t_bit; | |
400 | else | |
401 | cpsr &= ~t_bit; | |
f1973203 | 402 | |
478fd957 UW |
403 | /* Remove Thumb bit from PC. */ |
404 | pc = gdbarch_addr_bits_remove (gdbarch, pc); | |
405 | ||
406 | /* Save previous register values. */ | |
407 | trad_frame_set_reg_value (this_cache, ARM_SP_REGNUM, sp + sp_offset); | |
408 | trad_frame_set_reg_value (this_cache, ARM_PC_REGNUM, pc); | |
409 | trad_frame_set_reg_value (this_cache, ARM_PS_REGNUM, cpsr); | |
f1973203 MR |
410 | |
411 | /* Save a frame ID. */ | |
412 | trad_frame_set_id (this_cache, frame_id_build (sp, func)); | |
413 | } | |
414 | ||
8e9d1a24 DJ |
415 | static struct tramp_frame arm_linux_sigreturn_tramp_frame = { |
416 | SIGTRAMP_FRAME, | |
417 | 4, | |
418 | { | |
419 | { ARM_LINUX_SIGRETURN_INSTR, -1 }, | |
420 | { TRAMP_SENTINEL_INSN } | |
421 | }, | |
422 | arm_linux_sigreturn_init | |
423 | }; | |
424 | ||
425 | static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = { | |
426 | SIGTRAMP_FRAME, | |
427 | 4, | |
428 | { | |
429 | { ARM_LINUX_RT_SIGRETURN_INSTR, -1 }, | |
430 | { TRAMP_SENTINEL_INSN } | |
431 | }, | |
432 | arm_linux_rt_sigreturn_init | |
433 | }; | |
434 | ||
435 | static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = { | |
436 | SIGTRAMP_FRAME, | |
437 | 4, | |
438 | { | |
439 | { ARM_SET_R7_SIGRETURN, -1 }, | |
440 | { ARM_EABI_SYSCALL, -1 }, | |
441 | { TRAMP_SENTINEL_INSN } | |
442 | }, | |
443 | arm_linux_sigreturn_init | |
444 | }; | |
445 | ||
446 | static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = { | |
447 | SIGTRAMP_FRAME, | |
448 | 4, | |
449 | { | |
450 | { ARM_SET_R7_RT_SIGRETURN, -1 }, | |
451 | { ARM_EABI_SYSCALL, -1 }, | |
452 | { TRAMP_SENTINEL_INSN } | |
453 | }, | |
454 | arm_linux_rt_sigreturn_init | |
455 | }; | |
456 | ||
f347ffc9 WN |
457 | static struct tramp_frame thumb2_eabi_linux_sigreturn_tramp_frame = { |
458 | SIGTRAMP_FRAME, | |
459 | 2, | |
460 | { | |
461 | { THUMB2_SET_R7_SIGRETURN1, -1 }, | |
462 | { THUMB2_SET_R7_SIGRETURN2, -1 }, | |
463 | { THUMB2_EABI_SYSCALL, -1 }, | |
464 | { TRAMP_SENTINEL_INSN } | |
465 | }, | |
466 | arm_linux_sigreturn_init | |
467 | }; | |
468 | ||
469 | static struct tramp_frame thumb2_eabi_linux_rt_sigreturn_tramp_frame = { | |
470 | SIGTRAMP_FRAME, | |
471 | 2, | |
472 | { | |
473 | { THUMB2_SET_R7_RT_SIGRETURN1, -1 }, | |
474 | { THUMB2_SET_R7_RT_SIGRETURN2, -1 }, | |
475 | { THUMB2_EABI_SYSCALL, -1 }, | |
476 | { TRAMP_SENTINEL_INSN } | |
477 | }, | |
478 | arm_linux_rt_sigreturn_init | |
479 | }; | |
480 | ||
f1973203 MR |
481 | static struct tramp_frame arm_linux_restart_syscall_tramp_frame = { |
482 | NORMAL_FRAME, | |
483 | 4, | |
484 | { | |
485 | { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 }, | |
486 | { ARM_LDR_PC_SP_12, -1 }, | |
487 | { TRAMP_SENTINEL_INSN } | |
488 | }, | |
489 | arm_linux_restart_syscall_init | |
490 | }; | |
491 | ||
478fd957 UW |
492 | static struct tramp_frame arm_kernel_linux_restart_syscall_tramp_frame = { |
493 | NORMAL_FRAME, | |
494 | 4, | |
495 | { | |
496 | { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 }, | |
497 | { ARM_LDR_PC_SP_4, -1 }, | |
498 | { TRAMP_SENTINEL_INSN } | |
499 | }, | |
500 | arm_linux_restart_syscall_init | |
501 | }; | |
502 | ||
cb587d83 DJ |
503 | /* Core file and register set support. */ |
504 | ||
505 | #define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE) | |
506 | ||
507 | void | |
508 | arm_linux_supply_gregset (const struct regset *regset, | |
509 | struct regcache *regcache, | |
510 | int regnum, const void *gregs_buf, size_t len) | |
511 | { | |
e17a4113 UW |
512 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
513 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
9a3c8263 | 514 | const gdb_byte *gregs = (const gdb_byte *) gregs_buf; |
cb587d83 DJ |
515 | int regno; |
516 | CORE_ADDR reg_pc; | |
517 | gdb_byte pc_buf[INT_REGISTER_SIZE]; | |
518 | ||
519 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) | |
520 | if (regnum == -1 || regnum == regno) | |
521 | regcache_raw_supply (regcache, regno, | |
522 | gregs + INT_REGISTER_SIZE * regno); | |
523 | ||
524 | if (regnum == ARM_PS_REGNUM || regnum == -1) | |
525 | { | |
526 | if (arm_apcs_32) | |
527 | regcache_raw_supply (regcache, ARM_PS_REGNUM, | |
17c12639 | 528 | gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM); |
cb587d83 DJ |
529 | else |
530 | regcache_raw_supply (regcache, ARM_PS_REGNUM, | |
531 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); | |
532 | } | |
533 | ||
534 | if (regnum == ARM_PC_REGNUM || regnum == -1) | |
535 | { | |
536 | reg_pc = extract_unsigned_integer (gregs | |
537 | + INT_REGISTER_SIZE * ARM_PC_REGNUM, | |
e17a4113 UW |
538 | INT_REGISTER_SIZE, byte_order); |
539 | reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc); | |
540 | store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc); | |
cb587d83 DJ |
541 | regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf); |
542 | } | |
543 | } | |
544 | ||
545 | void | |
546 | arm_linux_collect_gregset (const struct regset *regset, | |
547 | const struct regcache *regcache, | |
548 | int regnum, void *gregs_buf, size_t len) | |
549 | { | |
9a3c8263 | 550 | gdb_byte *gregs = (gdb_byte *) gregs_buf; |
cb587d83 DJ |
551 | int regno; |
552 | ||
553 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) | |
554 | if (regnum == -1 || regnum == regno) | |
555 | regcache_raw_collect (regcache, regno, | |
556 | gregs + INT_REGISTER_SIZE * regno); | |
557 | ||
558 | if (regnum == ARM_PS_REGNUM || regnum == -1) | |
559 | { | |
560 | if (arm_apcs_32) | |
561 | regcache_raw_collect (regcache, ARM_PS_REGNUM, | |
17c12639 | 562 | gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM); |
cb587d83 DJ |
563 | else |
564 | regcache_raw_collect (regcache, ARM_PS_REGNUM, | |
565 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); | |
566 | } | |
567 | ||
568 | if (regnum == ARM_PC_REGNUM || regnum == -1) | |
569 | regcache_raw_collect (regcache, ARM_PC_REGNUM, | |
570 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); | |
571 | } | |
572 | ||
573 | /* Support for register format used by the NWFPE FPA emulator. */ | |
574 | ||
575 | #define typeNone 0x00 | |
576 | #define typeSingle 0x01 | |
577 | #define typeDouble 0x02 | |
578 | #define typeExtended 0x03 | |
579 | ||
580 | void | |
581 | supply_nwfpe_register (struct regcache *regcache, int regno, | |
582 | const gdb_byte *regs) | |
583 | { | |
584 | const gdb_byte *reg_data; | |
585 | gdb_byte reg_tag; | |
586 | gdb_byte buf[FP_REGISTER_SIZE]; | |
587 | ||
588 | reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE; | |
589 | reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET]; | |
590 | memset (buf, 0, FP_REGISTER_SIZE); | |
591 | ||
592 | switch (reg_tag) | |
593 | { | |
594 | case typeSingle: | |
595 | memcpy (buf, reg_data, 4); | |
596 | break; | |
597 | case typeDouble: | |
598 | memcpy (buf, reg_data + 4, 4); | |
599 | memcpy (buf + 4, reg_data, 4); | |
600 | break; | |
601 | case typeExtended: | |
602 | /* We want sign and exponent, then least significant bits, | |
603 | then most significant. NWFPE does sign, most, least. */ | |
604 | memcpy (buf, reg_data, 4); | |
605 | memcpy (buf + 4, reg_data + 8, 4); | |
606 | memcpy (buf + 8, reg_data + 4, 4); | |
607 | break; | |
608 | default: | |
609 | break; | |
610 | } | |
611 | ||
612 | regcache_raw_supply (regcache, regno, buf); | |
613 | } | |
614 | ||
615 | void | |
616 | collect_nwfpe_register (const struct regcache *regcache, int regno, | |
617 | gdb_byte *regs) | |
618 | { | |
619 | gdb_byte *reg_data; | |
620 | gdb_byte reg_tag; | |
621 | gdb_byte buf[FP_REGISTER_SIZE]; | |
622 | ||
623 | regcache_raw_collect (regcache, regno, buf); | |
624 | ||
625 | /* NOTE drow/2006-06-07: This code uses the tag already in the | |
626 | register buffer. I've preserved that when moving the code | |
627 | from the native file to the target file. But this doesn't | |
628 | always make sense. */ | |
629 | ||
630 | reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE; | |
631 | reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET]; | |
632 | ||
633 | switch (reg_tag) | |
634 | { | |
635 | case typeSingle: | |
636 | memcpy (reg_data, buf, 4); | |
637 | break; | |
638 | case typeDouble: | |
639 | memcpy (reg_data, buf + 4, 4); | |
640 | memcpy (reg_data + 4, buf, 4); | |
641 | break; | |
642 | case typeExtended: | |
643 | memcpy (reg_data, buf, 4); | |
644 | memcpy (reg_data + 4, buf + 8, 4); | |
645 | memcpy (reg_data + 8, buf + 4, 4); | |
646 | break; | |
647 | default: | |
648 | break; | |
649 | } | |
650 | } | |
651 | ||
652 | void | |
653 | arm_linux_supply_nwfpe (const struct regset *regset, | |
654 | struct regcache *regcache, | |
655 | int regnum, const void *regs_buf, size_t len) | |
656 | { | |
9a3c8263 | 657 | const gdb_byte *regs = (const gdb_byte *) regs_buf; |
cb587d83 DJ |
658 | int regno; |
659 | ||
660 | if (regnum == ARM_FPS_REGNUM || regnum == -1) | |
661 | regcache_raw_supply (regcache, ARM_FPS_REGNUM, | |
662 | regs + NWFPE_FPSR_OFFSET); | |
663 | ||
664 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) | |
665 | if (regnum == -1 || regnum == regno) | |
666 | supply_nwfpe_register (regcache, regno, regs); | |
667 | } | |
668 | ||
669 | void | |
670 | arm_linux_collect_nwfpe (const struct regset *regset, | |
671 | const struct regcache *regcache, | |
672 | int regnum, void *regs_buf, size_t len) | |
673 | { | |
9a3c8263 | 674 | gdb_byte *regs = (gdb_byte *) regs_buf; |
cb587d83 DJ |
675 | int regno; |
676 | ||
677 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) | |
678 | if (regnum == -1 || regnum == regno) | |
679 | collect_nwfpe_register (regcache, regno, regs); | |
680 | ||
681 | if (regnum == ARM_FPS_REGNUM || regnum == -1) | |
682 | regcache_raw_collect (regcache, ARM_FPS_REGNUM, | |
683 | regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM); | |
684 | } | |
685 | ||
ef7e8358 UW |
686 | /* Support VFP register format. */ |
687 | ||
688 | #define ARM_LINUX_SIZEOF_VFP (32 * 8 + 4) | |
689 | ||
690 | static void | |
691 | arm_linux_supply_vfp (const struct regset *regset, | |
692 | struct regcache *regcache, | |
693 | int regnum, const void *regs_buf, size_t len) | |
694 | { | |
9a3c8263 | 695 | const gdb_byte *regs = (const gdb_byte *) regs_buf; |
ef7e8358 UW |
696 | int regno; |
697 | ||
698 | if (regnum == ARM_FPSCR_REGNUM || regnum == -1) | |
699 | regcache_raw_supply (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8); | |
700 | ||
701 | for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) | |
702 | if (regnum == -1 || regnum == regno) | |
703 | regcache_raw_supply (regcache, regno, | |
704 | regs + (regno - ARM_D0_REGNUM) * 8); | |
705 | } | |
706 | ||
707 | static void | |
708 | arm_linux_collect_vfp (const struct regset *regset, | |
709 | const struct regcache *regcache, | |
710 | int regnum, void *regs_buf, size_t len) | |
711 | { | |
9a3c8263 | 712 | gdb_byte *regs = (gdb_byte *) regs_buf; |
ef7e8358 UW |
713 | int regno; |
714 | ||
715 | if (regnum == ARM_FPSCR_REGNUM || regnum == -1) | |
716 | regcache_raw_collect (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8); | |
717 | ||
718 | for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) | |
719 | if (regnum == -1 || regnum == regno) | |
720 | regcache_raw_collect (regcache, regno, | |
721 | regs + (regno - ARM_D0_REGNUM) * 8); | |
722 | } | |
723 | ||
b7611c43 AA |
724 | static const struct regset arm_linux_gregset = |
725 | { | |
726 | NULL, arm_linux_supply_gregset, arm_linux_collect_gregset | |
727 | }; | |
728 | ||
729 | static const struct regset arm_linux_fpregset = | |
730 | { | |
731 | NULL, arm_linux_supply_nwfpe, arm_linux_collect_nwfpe | |
732 | }; | |
733 | ||
734 | static const struct regset arm_linux_vfpregset = | |
735 | { | |
736 | NULL, arm_linux_supply_vfp, arm_linux_collect_vfp | |
737 | }; | |
738 | ||
5aa82d05 | 739 | /* Iterate over core file register note sections. */ |
ef7e8358 | 740 | |
5aa82d05 AA |
741 | static void |
742 | arm_linux_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
743 | iterate_over_regset_sections_cb *cb, | |
744 | void *cb_data, | |
745 | const struct regcache *regcache) | |
ef7e8358 | 746 | { |
5aa82d05 | 747 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
ef7e8358 | 748 | |
8f0435f7 | 749 | cb (".reg", ARM_LINUX_SIZEOF_GREGSET, &arm_linux_gregset, NULL, cb_data); |
5aa82d05 | 750 | |
330c6ca9 | 751 | if (tdep->vfp_register_count > 0) |
8f0435f7 AA |
752 | cb (".reg-arm-vfp", ARM_LINUX_SIZEOF_VFP, &arm_linux_vfpregset, |
753 | "VFP floating-point", cb_data); | |
5aa82d05 | 754 | else if (tdep->have_fpa_registers) |
8f0435f7 AA |
755 | cb (".reg2", ARM_LINUX_SIZEOF_NWFPE, &arm_linux_fpregset, |
756 | "FPA floating-point", cb_data); | |
5aa82d05 | 757 | } |
ef7e8358 UW |
758 | |
759 | /* Determine target description from core file. */ | |
760 | ||
761 | static const struct target_desc * | |
762 | arm_linux_core_read_description (struct gdbarch *gdbarch, | |
763 | struct target_ops *target, | |
764 | bfd *abfd) | |
765 | { | |
766 | CORE_ADDR arm_hwcap = 0; | |
767 | ||
768 | if (target_auxv_search (target, AT_HWCAP, &arm_hwcap) != 1) | |
769 | return NULL; | |
770 | ||
771 | if (arm_hwcap & HWCAP_VFP) | |
772 | { | |
773 | /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support | |
774 | Neon with VFPv3-D32. */ | |
775 | if (arm_hwcap & HWCAP_NEON) | |
776 | return tdesc_arm_with_neon; | |
777 | else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) | |
778 | return tdesc_arm_with_vfpv3; | |
779 | else | |
780 | return tdesc_arm_with_vfpv2; | |
781 | } | |
782 | ||
cb587d83 DJ |
783 | return NULL; |
784 | } | |
785 | ||
ef7e8358 | 786 | |
25b41d01 | 787 | /* Copy the value of next pc of sigreturn and rt_sigrturn into PC, |
18819fa6 UW |
788 | return 1. In addition, set IS_THUMB depending on whether we |
789 | will return to ARM or Thumb code. Return 0 if it is not a | |
790 | rt_sigreturn/sigreturn syscall. */ | |
25b41d01 YQ |
791 | static int |
792 | arm_linux_sigreturn_return_addr (struct frame_info *frame, | |
793 | unsigned long svc_number, | |
18819fa6 | 794 | CORE_ADDR *pc, int *is_thumb) |
25b41d01 YQ |
795 | { |
796 | /* Is this a sigreturn or rt_sigreturn syscall? */ | |
797 | if (svc_number == 119 || svc_number == 173) | |
798 | { | |
799 | if (get_frame_type (frame) == SIGTRAMP_FRAME) | |
800 | { | |
18819fa6 UW |
801 | ULONGEST t_bit = arm_psr_thumb_bit (frame_unwind_arch (frame)); |
802 | CORE_ADDR cpsr | |
803 | = frame_unwind_register_unsigned (frame, ARM_PS_REGNUM); | |
804 | ||
805 | *is_thumb = (cpsr & t_bit) != 0; | |
25b41d01 YQ |
806 | *pc = frame_unwind_caller_pc (frame); |
807 | return 1; | |
808 | } | |
809 | } | |
810 | return 0; | |
811 | } | |
812 | ||
d0e59a68 AT |
813 | /* Calculate the offset from stack pointer of the pc register on the stack |
814 | in the case of a sigreturn or sigreturn_rt syscall. */ | |
815 | static int | |
816 | arm_linux_sigreturn_next_pc_offset (unsigned long sp, | |
817 | unsigned long sp_data, | |
818 | unsigned long svc_number, | |
819 | int is_sigreturn) | |
820 | { | |
821 | /* Offset of R0 register. */ | |
822 | int r0_offset = 0; | |
823 | /* Offset of PC register. */ | |
824 | int pc_offset = 0; | |
825 | ||
826 | if (is_sigreturn) | |
827 | { | |
828 | if (sp_data == ARM_NEW_SIGFRAME_MAGIC) | |
829 | r0_offset = ARM_UCONTEXT_SIGCONTEXT + ARM_SIGCONTEXT_R0; | |
830 | else | |
831 | r0_offset = ARM_SIGCONTEXT_R0; | |
832 | } | |
833 | else | |
834 | { | |
835 | if (sp_data == sp + ARM_OLD_RT_SIGFRAME_SIGINFO) | |
836 | r0_offset = ARM_OLD_RT_SIGFRAME_UCONTEXT; | |
837 | else | |
838 | r0_offset = ARM_NEW_RT_SIGFRAME_UCONTEXT; | |
839 | ||
840 | r0_offset += ARM_UCONTEXT_SIGCONTEXT + ARM_SIGCONTEXT_R0; | |
841 | } | |
842 | ||
843 | pc_offset = r0_offset + INT_REGISTER_SIZE * ARM_PC_REGNUM; | |
844 | ||
845 | return pc_offset; | |
846 | } | |
847 | ||
848 | /* Find the value of the next PC after a sigreturn or rt_sigreturn syscall | |
849 | based on current processor state. */ | |
850 | static CORE_ADDR | |
851 | arm_linux_sigreturn_next_pc (struct regcache *regcache, | |
852 | unsigned long svc_number) | |
853 | { | |
854 | ULONGEST sp; | |
855 | unsigned long sp_data; | |
856 | CORE_ADDR next_pc = 0; | |
857 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
858 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
859 | int pc_offset = 0; | |
860 | int is_sigreturn = 0; | |
861 | ||
862 | gdb_assert (svc_number == ARM_SIGRETURN | |
863 | || svc_number == ARM_RT_SIGRETURN); | |
864 | ||
865 | is_sigreturn = (svc_number == ARM_SIGRETURN); | |
866 | regcache_cooked_read_unsigned (regcache, ARM_SP_REGNUM, &sp); | |
867 | sp_data = read_memory_unsigned_integer (sp, 4, byte_order); | |
868 | ||
869 | pc_offset = arm_linux_sigreturn_next_pc_offset (sp, sp_data, svc_number, | |
870 | is_sigreturn); | |
871 | ||
872 | next_pc = read_memory_unsigned_integer (sp + pc_offset, 4, byte_order); | |
873 | ||
874 | return next_pc; | |
875 | } | |
876 | ||
9f948660 SDJ |
877 | /* At a ptrace syscall-stop, return the syscall number. This either |
878 | comes from the SWI instruction (OABI) or from r7 (EABI). | |
879 | ||
880 | When the function fails, it should return -1. */ | |
881 | ||
882 | static LONGEST | |
883 | arm_linux_get_syscall_number (struct gdbarch *gdbarch, | |
884 | ptid_t ptid) | |
885 | { | |
886 | struct regcache *regs = get_thread_regcache (ptid); | |
887 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
888 | ||
889 | ULONGEST pc; | |
890 | ULONGEST cpsr; | |
891 | ULONGEST t_bit = arm_psr_thumb_bit (gdbarch); | |
892 | int is_thumb; | |
893 | ULONGEST svc_number = -1; | |
894 | ||
895 | regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &pc); | |
896 | regcache_cooked_read_unsigned (regs, ARM_PS_REGNUM, &cpsr); | |
897 | is_thumb = (cpsr & t_bit) != 0; | |
898 | ||
899 | if (is_thumb) | |
900 | { | |
901 | regcache_cooked_read_unsigned (regs, 7, &svc_number); | |
902 | } | |
903 | else | |
904 | { | |
905 | enum bfd_endian byte_order_for_code = | |
906 | gdbarch_byte_order_for_code (gdbarch); | |
907 | ||
908 | /* PC gets incremented before the syscall-stop, so read the | |
909 | previous instruction. */ | |
910 | unsigned long this_instr = | |
911 | read_memory_unsigned_integer (pc - 4, 4, byte_order_for_code); | |
912 | ||
913 | unsigned long svc_operand = (0x00ffffff & this_instr); | |
914 | ||
915 | if (svc_operand) | |
916 | { | |
917 | /* OABI */ | |
918 | svc_number = svc_operand - 0x900000; | |
919 | } | |
920 | else | |
921 | { | |
922 | /* EABI */ | |
923 | regcache_cooked_read_unsigned (regs, 7, &svc_number); | |
924 | } | |
925 | } | |
926 | ||
927 | return svc_number; | |
928 | } | |
929 | ||
d0e59a68 AT |
930 | /* When the processor is at a syscall instruction, return the PC of the |
931 | next instruction to be executed. */ | |
25b41d01 YQ |
932 | |
933 | static CORE_ADDR | |
d0e59a68 | 934 | arm_linux_syscall_next_pc (struct regcache *regcache) |
25b41d01 | 935 | { |
d0e59a68 AT |
936 | CORE_ADDR pc = regcache_read_pc (regcache); |
937 | CORE_ADDR next_pc = 0; | |
938 | int is_thumb = arm_is_thumb (regcache); | |
25b41d01 | 939 | ULONGEST svc_number = 0; |
d0e59a68 | 940 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
25b41d01 YQ |
941 | |
942 | if (is_thumb) | |
943 | { | |
d0e59a68 AT |
944 | svc_number = regcache_raw_get_unsigned (regcache, 7); |
945 | next_pc = pc + 2; | |
25b41d01 YQ |
946 | } |
947 | else | |
948 | { | |
d0e59a68 | 949 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
25b41d01 YQ |
950 | enum bfd_endian byte_order_for_code = |
951 | gdbarch_byte_order_for_code (gdbarch); | |
952 | unsigned long this_instr = | |
953 | read_memory_unsigned_integer (pc, 4, byte_order_for_code); | |
954 | ||
955 | unsigned long svc_operand = (0x00ffffff & this_instr); | |
956 | if (svc_operand) /* OABI. */ | |
957 | { | |
958 | svc_number = svc_operand - 0x900000; | |
959 | } | |
960 | else /* EABI. */ | |
961 | { | |
d0e59a68 | 962 | svc_number = regcache_raw_get_unsigned (regcache, 7); |
25b41d01 | 963 | } |
18819fa6 | 964 | |
d0e59a68 | 965 | next_pc = pc + 4; |
25b41d01 YQ |
966 | } |
967 | ||
d0e59a68 AT |
968 | if (svc_number == ARM_SIGRETURN || svc_number == ARM_RT_SIGRETURN) |
969 | next_pc = arm_linux_sigreturn_next_pc (regcache, svc_number); | |
25b41d01 | 970 | |
18819fa6 | 971 | /* Addresses for calling Thumb functions have the bit 0 set. */ |
25b41d01 | 972 | if (is_thumb) |
d0e59a68 | 973 | next_pc = MAKE_THUMB_ADDR (next_pc); |
25b41d01 | 974 | |
d0e59a68 | 975 | return next_pc; |
25b41d01 YQ |
976 | } |
977 | ||
978 | ||
daddc3c1 DJ |
979 | /* Insert a single step breakpoint at the next executed instruction. */ |
980 | ||
63807e1d | 981 | static int |
daddc3c1 DJ |
982 | arm_linux_software_single_step (struct frame_info *frame) |
983 | { | |
d0e59a68 AT |
984 | struct regcache *regcache = get_current_regcache (); |
985 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
986 | struct address_space *aspace = get_regcache_aspace (regcache); | |
987 | ||
35f73cfc UW |
988 | CORE_ADDR next_pc; |
989 | ||
d0e59a68 | 990 | if (arm_deal_with_atomic_sequence (regcache)) |
35f73cfc UW |
991 | return 1; |
992 | ||
750ce8d1 YQ |
993 | /* If the target does have hardware single step, GDB doesn't have |
994 | to bother software single step. */ | |
995 | if (target_can_do_single_step () == 1) | |
996 | return 0; | |
997 | ||
d0e59a68 | 998 | next_pc = arm_get_next_pc (regcache, regcache_read_pc (regcache)); |
daddc3c1 DJ |
999 | |
1000 | /* The Linux kernel offers some user-mode helpers in a high page. We can | |
1001 | not read this page (as of 2.6.23), and even if we could then we couldn't | |
1002 | set breakpoints in it, and even if we could then the atomic operations | |
1003 | would fail when interrupted. They are all called as functions and return | |
1004 | to the address in LR, so step to there instead. */ | |
1005 | if (next_pc > 0xffff0000) | |
1006 | next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM); | |
1007 | ||
18819fa6 | 1008 | arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc); |
daddc3c1 DJ |
1009 | |
1010 | return 1; | |
1011 | } | |
1012 | ||
cca44b1b JB |
1013 | /* Support for displaced stepping of Linux SVC instructions. */ |
1014 | ||
1015 | static void | |
6e39997a | 1016 | arm_linux_cleanup_svc (struct gdbarch *gdbarch, |
cca44b1b JB |
1017 | struct regcache *regs, |
1018 | struct displaced_step_closure *dsc) | |
1019 | { | |
cca44b1b JB |
1020 | ULONGEST apparent_pc; |
1021 | int within_scratch; | |
1022 | ||
1023 | regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc); | |
1024 | ||
1025 | within_scratch = (apparent_pc >= dsc->scratch_base | |
1026 | && apparent_pc < (dsc->scratch_base | |
1027 | + DISPLACED_MODIFIED_INSNS * 4 + 4)); | |
1028 | ||
1029 | if (debug_displaced) | |
1030 | { | |
1031 | fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after " | |
1032 | "SVC step ", (unsigned long) apparent_pc); | |
1033 | if (within_scratch) | |
1034 | fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n"); | |
1035 | else | |
1036 | fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n"); | |
1037 | } | |
1038 | ||
1039 | if (within_scratch) | |
41f071ef YQ |
1040 | displaced_write_reg (regs, dsc, ARM_PC_REGNUM, |
1041 | dsc->insn_addr + dsc->insn_size, BRANCH_WRITE_PC); | |
cca44b1b JB |
1042 | } |
1043 | ||
1044 | static int | |
bd18283a YQ |
1045 | arm_linux_copy_svc (struct gdbarch *gdbarch, struct regcache *regs, |
1046 | struct displaced_step_closure *dsc) | |
cca44b1b | 1047 | { |
25b41d01 YQ |
1048 | CORE_ADDR return_to = 0; |
1049 | ||
cca44b1b | 1050 | struct frame_info *frame; |
36073a92 | 1051 | unsigned int svc_number = displaced_read_reg (regs, dsc, 7); |
25b41d01 | 1052 | int is_sigreturn = 0; |
18819fa6 | 1053 | int is_thumb; |
cca44b1b | 1054 | |
cca44b1b JB |
1055 | frame = get_current_frame (); |
1056 | ||
25b41d01 | 1057 | is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number, |
18819fa6 | 1058 | &return_to, &is_thumb); |
25b41d01 | 1059 | if (is_sigreturn) |
cca44b1b | 1060 | { |
2bb2dcab YQ |
1061 | struct symtab_and_line sal; |
1062 | ||
1063 | if (debug_displaced) | |
1064 | fprintf_unfiltered (gdb_stdlog, "displaced: found " | |
1065 | "sigreturn/rt_sigreturn SVC call. PC in " | |
1066 | "frame = %lx\n", | |
1067 | (unsigned long) get_frame_pc (frame)); | |
1068 | ||
1069 | if (debug_displaced) | |
1070 | fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. " | |
1071 | "Setting momentary breakpoint.\n", | |
1072 | (unsigned long) return_to); | |
1073 | ||
1074 | gdb_assert (inferior_thread ()->control.step_resume_breakpoint | |
1075 | == NULL); | |
1076 | ||
1077 | sal = find_pc_line (return_to, 0); | |
1078 | sal.pc = return_to; | |
1079 | sal.section = find_pc_overlay (return_to); | |
1080 | sal.explicit_pc = 1; | |
1081 | ||
1082 | frame = get_prev_frame (frame); | |
1083 | ||
1084 | if (frame) | |
1085 | { | |
1086 | inferior_thread ()->control.step_resume_breakpoint | |
1087 | = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame), | |
1088 | bp_step_resume); | |
1089 | ||
1090 | /* set_momentary_breakpoint invalidates FRAME. */ | |
1091 | frame = NULL; | |
1092 | ||
1093 | /* We need to make sure we actually insert the momentary | |
1094 | breakpoint set above. */ | |
1095 | insert_breakpoints (); | |
cca44b1b JB |
1096 | } |
1097 | else if (debug_displaced) | |
2bb2dcab YQ |
1098 | fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous " |
1099 | "frame to set momentary breakpoint for " | |
1100 | "sigreturn/rt_sigreturn\n"); | |
1101 | } | |
1102 | else if (debug_displaced) | |
6bbbba9b | 1103 | fprintf_unfiltered (gdb_stdlog, "displaced: found SVC call\n"); |
cca44b1b JB |
1104 | |
1105 | /* Preparation: If we detect sigreturn, set momentary breakpoint at resume | |
1106 | location, else nothing. | |
1107 | Insn: unmodified svc. | |
41f071ef | 1108 | Cleanup: if pc lands in scratch space, pc <- insn_addr + insn_size |
cca44b1b JB |
1109 | else leave pc alone. */ |
1110 | ||
cca44b1b JB |
1111 | |
1112 | dsc->cleanup = &arm_linux_cleanup_svc; | |
1113 | /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next | |
1114 | instruction. */ | |
1115 | dsc->wrote_to_pc = 1; | |
1116 | ||
1117 | return 0; | |
1118 | } | |
1119 | ||
1120 | ||
1121 | /* The following two functions implement single-stepping over calls to Linux | |
1122 | kernel helper routines, which perform e.g. atomic operations on architecture | |
1123 | variants which don't support them natively. | |
1124 | ||
1125 | When this function is called, the PC will be pointing at the kernel helper | |
1126 | (at an address inaccessible to GDB), and r14 will point to the return | |
1127 | address. Displaced stepping always executes code in the copy area: | |
1128 | so, make the copy-area instruction branch back to the kernel helper (the | |
1129 | "from" address), and make r14 point to the breakpoint in the copy area. In | |
1130 | that way, we regain control once the kernel helper returns, and can clean | |
1131 | up appropriately (as if we had just returned from the kernel helper as it | |
1132 | would have been called from the non-displaced location). */ | |
1133 | ||
1134 | static void | |
6e39997a | 1135 | cleanup_kernel_helper_return (struct gdbarch *gdbarch, |
cca44b1b JB |
1136 | struct regcache *regs, |
1137 | struct displaced_step_closure *dsc) | |
1138 | { | |
1139 | displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC); | |
1140 | displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC); | |
1141 | } | |
1142 | ||
1143 | static void | |
1144 | arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from, | |
1145 | CORE_ADDR to, struct regcache *regs, | |
1146 | struct displaced_step_closure *dsc) | |
1147 | { | |
1148 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1149 | ||
1150 | dsc->numinsns = 1; | |
1151 | dsc->insn_addr = from; | |
1152 | dsc->cleanup = &cleanup_kernel_helper_return; | |
1153 | /* Say we wrote to the PC, else cleanup will set PC to the next | |
1154 | instruction in the helper, which isn't helpful. */ | |
1155 | dsc->wrote_to_pc = 1; | |
1156 | ||
1157 | /* Preparation: tmp[0] <- r14 | |
1158 | r14 <- <scratch space>+4 | |
1159 | *(<scratch space>+8) <- from | |
1160 | Insn: ldr pc, [r14, #4] | |
1161 | Cleanup: r14 <- tmp[0], pc <- tmp[0]. */ | |
1162 | ||
36073a92 | 1163 | dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM); |
cca44b1b JB |
1164 | displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4, |
1165 | CANNOT_WRITE_PC); | |
1166 | write_memory_unsigned_integer (to + 8, 4, byte_order, from); | |
1167 | ||
1168 | dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */ | |
1169 | } | |
1170 | ||
1171 | /* Linux-specific displaced step instruction copying function. Detects when | |
1172 | the program has stepped into a Linux kernel helper routine (which must be | |
1173 | handled as a special case), falling back to arm_displaced_step_copy_insn() | |
1174 | if it hasn't. */ | |
1175 | ||
1176 | static struct displaced_step_closure * | |
1177 | arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch, | |
1178 | CORE_ADDR from, CORE_ADDR to, | |
1179 | struct regcache *regs) | |
1180 | { | |
8d749320 | 1181 | struct displaced_step_closure *dsc = XNEW (struct displaced_step_closure); |
cca44b1b JB |
1182 | |
1183 | /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and | |
1184 | stop at the return location. */ | |
1185 | if (from > 0xffff0000) | |
1186 | { | |
1187 | if (debug_displaced) | |
1188 | fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper " | |
1189 | "at %.8lx\n", (unsigned long) from); | |
1190 | ||
1191 | arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc); | |
1192 | } | |
1193 | else | |
1194 | { | |
cca44b1b JB |
1195 | /* Override the default handling of SVC instructions. */ |
1196 | dsc->u.svc.copy_svc_os = arm_linux_copy_svc; | |
1197 | ||
b434a28f | 1198 | arm_process_displaced_insn (gdbarch, from, to, regs, dsc); |
cca44b1b JB |
1199 | } |
1200 | ||
1201 | arm_displaced_init_closure (gdbarch, from, to, dsc); | |
1202 | ||
1203 | return dsc; | |
1204 | } | |
1205 | ||
c248fc1d SDJ |
1206 | /* Implementation of `gdbarch_stap_is_single_operand', as defined in |
1207 | gdbarch.h. */ | |
1208 | ||
55aa24fb SDJ |
1209 | static int |
1210 | arm_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) | |
1211 | { | |
8d85bacb | 1212 | return (*s == '#' || *s == '$' || isdigit (*s) /* Literal number. */ |
55aa24fb SDJ |
1213 | || *s == '[' /* Register indirection or |
1214 | displacement. */ | |
1215 | || isalpha (*s)); /* Register value. */ | |
1216 | } | |
1217 | ||
1218 | /* This routine is used to parse a special token in ARM's assembly. | |
1219 | ||
1220 | The special tokens parsed by it are: | |
1221 | ||
1222 | - Register displacement (e.g, [fp, #-8]) | |
1223 | ||
1224 | It returns one if the special token has been parsed successfully, | |
1225 | or zero if the current token is not considered special. */ | |
1226 | ||
1227 | static int | |
1228 | arm_stap_parse_special_token (struct gdbarch *gdbarch, | |
1229 | struct stap_parse_info *p) | |
1230 | { | |
1231 | if (*p->arg == '[') | |
1232 | { | |
1233 | /* Temporary holder for lookahead. */ | |
1234 | const char *tmp = p->arg; | |
a0bcdaa7 | 1235 | char *endp; |
55aa24fb SDJ |
1236 | /* Used to save the register name. */ |
1237 | const char *start; | |
1238 | char *regname; | |
1239 | int len, offset; | |
1240 | int got_minus = 0; | |
1241 | long displacement; | |
1242 | struct stoken str; | |
1243 | ||
1244 | ++tmp; | |
1245 | start = tmp; | |
1246 | ||
1247 | /* Register name. */ | |
1248 | while (isalnum (*tmp)) | |
1249 | ++tmp; | |
1250 | ||
1251 | if (*tmp != ',') | |
1252 | return 0; | |
1253 | ||
1254 | len = tmp - start; | |
224c3ddb | 1255 | regname = (char *) alloca (len + 2); |
55aa24fb SDJ |
1256 | |
1257 | offset = 0; | |
1258 | if (isdigit (*start)) | |
1259 | { | |
1260 | /* If we are dealing with a register whose name begins with a | |
1261 | digit, it means we should prefix the name with the letter | |
1262 | `r', because GDB expects this name pattern. Otherwise (e.g., | |
1263 | we are dealing with the register `fp'), we don't need to | |
1264 | add such a prefix. */ | |
1265 | regname[0] = 'r'; | |
1266 | offset = 1; | |
1267 | } | |
1268 | ||
1269 | strncpy (regname + offset, start, len); | |
1270 | len += offset; | |
1271 | regname[len] = '\0'; | |
1272 | ||
1273 | if (user_reg_map_name_to_regnum (gdbarch, regname, len) == -1) | |
1274 | error (_("Invalid register name `%s' on expression `%s'."), | |
1275 | regname, p->saved_arg); | |
1276 | ||
1277 | ++tmp; | |
1278 | tmp = skip_spaces_const (tmp); | |
8d85bacb SDJ |
1279 | if (*tmp == '#' || *tmp == '$') |
1280 | ++tmp; | |
55aa24fb SDJ |
1281 | |
1282 | if (*tmp == '-') | |
1283 | { | |
1284 | ++tmp; | |
1285 | got_minus = 1; | |
1286 | } | |
1287 | ||
a0bcdaa7 PA |
1288 | displacement = strtol (tmp, &endp, 10); |
1289 | tmp = endp; | |
55aa24fb SDJ |
1290 | |
1291 | /* Skipping last `]'. */ | |
1292 | if (*tmp++ != ']') | |
1293 | return 0; | |
1294 | ||
1295 | /* The displacement. */ | |
410a0ff2 SDJ |
1296 | write_exp_elt_opcode (&p->pstate, OP_LONG); |
1297 | write_exp_elt_type (&p->pstate, builtin_type (gdbarch)->builtin_long); | |
1298 | write_exp_elt_longcst (&p->pstate, displacement); | |
1299 | write_exp_elt_opcode (&p->pstate, OP_LONG); | |
55aa24fb | 1300 | if (got_minus) |
410a0ff2 | 1301 | write_exp_elt_opcode (&p->pstate, UNOP_NEG); |
55aa24fb SDJ |
1302 | |
1303 | /* The register name. */ | |
410a0ff2 | 1304 | write_exp_elt_opcode (&p->pstate, OP_REGISTER); |
55aa24fb SDJ |
1305 | str.ptr = regname; |
1306 | str.length = len; | |
410a0ff2 SDJ |
1307 | write_exp_string (&p->pstate, str); |
1308 | write_exp_elt_opcode (&p->pstate, OP_REGISTER); | |
55aa24fb | 1309 | |
410a0ff2 | 1310 | write_exp_elt_opcode (&p->pstate, BINOP_ADD); |
55aa24fb SDJ |
1311 | |
1312 | /* Casting to the expected type. */ | |
410a0ff2 SDJ |
1313 | write_exp_elt_opcode (&p->pstate, UNOP_CAST); |
1314 | write_exp_elt_type (&p->pstate, lookup_pointer_type (p->arg_type)); | |
1315 | write_exp_elt_opcode (&p->pstate, UNOP_CAST); | |
55aa24fb | 1316 | |
410a0ff2 | 1317 | write_exp_elt_opcode (&p->pstate, UNOP_IND); |
55aa24fb SDJ |
1318 | |
1319 | p->arg = tmp; | |
1320 | } | |
1321 | else | |
1322 | return 0; | |
1323 | ||
1324 | return 1; | |
1325 | } | |
1326 | ||
97dfe206 OJ |
1327 | /* ARM process record-replay constructs: syscall, signal etc. */ |
1328 | ||
1329 | struct linux_record_tdep arm_linux_record_tdep; | |
1330 | ||
1331 | /* arm_canonicalize_syscall maps from the native arm Linux set | |
1332 | of syscall ids into a canonical set of syscall ids used by | |
1333 | process record. */ | |
1334 | ||
1335 | static enum gdb_syscall | |
1336 | arm_canonicalize_syscall (int syscall) | |
1337 | { | |
1338 | enum { sys_process_vm_writev = 377 }; | |
1339 | ||
1340 | if (syscall <= gdb_sys_sched_getaffinity) | |
f9fa37b3 | 1341 | return (enum gdb_syscall) syscall; |
97dfe206 | 1342 | else if (syscall >= 243 && syscall <= 247) |
f9fa37b3 | 1343 | return (enum gdb_syscall) (syscall + 2); |
97dfe206 | 1344 | else if (syscall >= 248 && syscall <= 253) |
f9fa37b3 | 1345 | return (enum gdb_syscall) (syscall + 4); |
97dfe206 | 1346 | |
f486487f | 1347 | return gdb_sys_no_syscall; |
97dfe206 OJ |
1348 | } |
1349 | ||
1350 | /* Record all registers but PC register for process-record. */ | |
1351 | ||
1352 | static int | |
1353 | arm_all_but_pc_registers_record (struct regcache *regcache) | |
1354 | { | |
1355 | int i; | |
1356 | ||
1357 | for (i = 0; i < ARM_PC_REGNUM; i++) | |
1358 | { | |
1359 | if (record_full_arch_list_add_reg (regcache, ARM_A1_REGNUM + i)) | |
1360 | return -1; | |
1361 | } | |
1362 | ||
1363 | if (record_full_arch_list_add_reg (regcache, ARM_PS_REGNUM)) | |
1364 | return -1; | |
1365 | ||
1366 | return 0; | |
1367 | } | |
1368 | ||
1369 | /* Handler for arm system call instruction recording. */ | |
1370 | ||
1371 | static int | |
1372 | arm_linux_syscall_record (struct regcache *regcache, unsigned long svc_number) | |
1373 | { | |
1374 | int ret = 0; | |
1375 | enum gdb_syscall syscall_gdb; | |
1376 | ||
1377 | syscall_gdb = arm_canonicalize_syscall (svc_number); | |
1378 | ||
f486487f | 1379 | if (syscall_gdb == gdb_sys_no_syscall) |
97dfe206 OJ |
1380 | { |
1381 | printf_unfiltered (_("Process record and replay target doesn't " | |
1382 | "support syscall number %s\n"), | |
1383 | plongest (svc_number)); | |
1384 | return -1; | |
1385 | } | |
1386 | ||
1387 | if (syscall_gdb == gdb_sys_sigreturn | |
1388 | || syscall_gdb == gdb_sys_rt_sigreturn) | |
1389 | { | |
1390 | if (arm_all_but_pc_registers_record (regcache)) | |
1391 | return -1; | |
1392 | return 0; | |
1393 | } | |
1394 | ||
1395 | ret = record_linux_system_call (syscall_gdb, regcache, | |
1396 | &arm_linux_record_tdep); | |
1397 | if (ret != 0) | |
1398 | return ret; | |
1399 | ||
1400 | /* Record the return value of the system call. */ | |
1401 | if (record_full_arch_list_add_reg (regcache, ARM_A1_REGNUM)) | |
1402 | return -1; | |
1403 | /* Record LR. */ | |
1404 | if (record_full_arch_list_add_reg (regcache, ARM_LR_REGNUM)) | |
1405 | return -1; | |
1406 | /* Record CPSR. */ | |
1407 | if (record_full_arch_list_add_reg (regcache, ARM_PS_REGNUM)) | |
1408 | return -1; | |
1409 | ||
1410 | return 0; | |
1411 | } | |
1412 | ||
3343ef86 YQ |
1413 | /* Implement the skip_trampoline_code gdbarch method. */ |
1414 | ||
1415 | static CORE_ADDR | |
1416 | arm_linux_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc) | |
1417 | { | |
1418 | CORE_ADDR target_pc = arm_skip_stub (frame, pc); | |
1419 | ||
1420 | if (target_pc != 0) | |
1421 | return target_pc; | |
1422 | ||
1423 | return find_solib_trampoline_target (frame, pc); | |
1424 | } | |
1425 | ||
97e03143 RE |
1426 | static void |
1427 | arm_linux_init_abi (struct gdbarch_info info, | |
1428 | struct gdbarch *gdbarch) | |
1429 | { | |
8d85bacb | 1430 | static const char *const stap_integer_prefixes[] = { "#", "$", "", NULL }; |
05c0465e SDJ |
1431 | static const char *const stap_register_prefixes[] = { "r", NULL }; |
1432 | static const char *const stap_register_indirection_prefixes[] = { "[", | |
1433 | NULL }; | |
1434 | static const char *const stap_register_indirection_suffixes[] = { "]", | |
1435 | NULL }; | |
97e03143 RE |
1436 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1437 | ||
a5ee0f0c PA |
1438 | linux_init_abi (info, gdbarch); |
1439 | ||
97e03143 | 1440 | tdep->lowest_pc = 0x8000; |
dcd4a3a4 | 1441 | if (info.byte_order_for_code == BFD_ENDIAN_BIG) |
498b1f87 | 1442 | { |
c75a2cc8 DJ |
1443 | if (tdep->arm_abi == ARM_ABI_AAPCS) |
1444 | tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint; | |
1445 | else | |
1446 | tdep->arm_breakpoint = arm_linux_arm_be_breakpoint; | |
498b1f87 | 1447 | tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint; |
177321bd | 1448 | tdep->thumb2_breakpoint = arm_linux_thumb2_be_breakpoint; |
498b1f87 | 1449 | } |
2ef47cd0 | 1450 | else |
498b1f87 | 1451 | { |
c75a2cc8 DJ |
1452 | if (tdep->arm_abi == ARM_ABI_AAPCS) |
1453 | tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint; | |
1454 | else | |
1455 | tdep->arm_breakpoint = arm_linux_arm_le_breakpoint; | |
498b1f87 | 1456 | tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint; |
177321bd | 1457 | tdep->thumb2_breakpoint = arm_linux_thumb2_le_breakpoint; |
498b1f87 | 1458 | } |
66e810cd | 1459 | tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint); |
498b1f87 | 1460 | tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint); |
177321bd | 1461 | tdep->thumb2_breakpoint_size = sizeof (arm_linux_thumb2_le_breakpoint); |
9df628e0 | 1462 | |
28e97307 DJ |
1463 | if (tdep->fp_model == ARM_FLOAT_AUTO) |
1464 | tdep->fp_model = ARM_FLOAT_FPA; | |
fd50bc42 | 1465 | |
f8624c62 MGD |
1466 | switch (tdep->fp_model) |
1467 | { | |
1468 | case ARM_FLOAT_FPA: | |
1469 | tdep->jb_pc = ARM_LINUX_JB_PC_FPA; | |
1470 | break; | |
1471 | case ARM_FLOAT_SOFT_FPA: | |
1472 | case ARM_FLOAT_SOFT_VFP: | |
1473 | case ARM_FLOAT_VFP: | |
1474 | tdep->jb_pc = ARM_LINUX_JB_PC_EABI; | |
1475 | break; | |
1476 | default: | |
1477 | internal_error | |
1478 | (__FILE__, __LINE__, | |
1479 | _("arm_linux_init_abi: Floating point model not supported")); | |
1480 | break; | |
1481 | } | |
a6cdd8c5 | 1482 | tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE; |
19d3fc80 | 1483 | |
7aa1783e | 1484 | set_solib_svr4_fetch_link_map_offsets |
76a9d10f | 1485 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
7aa1783e | 1486 | |
190dce09 | 1487 | /* Single stepping. */ |
daddc3c1 | 1488 | set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step); |
190dce09 | 1489 | |
0e18d038 | 1490 | /* Shared library handling. */ |
3343ef86 | 1491 | set_gdbarch_skip_trampoline_code (gdbarch, arm_linux_skip_trampoline_code); |
bb41a796 | 1492 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); |
b2756930 KB |
1493 | |
1494 | /* Enable TLS support. */ | |
1495 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
1496 | svr4_fetch_objfile_link_map); | |
8e9d1a24 DJ |
1497 | |
1498 | tramp_frame_prepend_unwinder (gdbarch, | |
1499 | &arm_linux_sigreturn_tramp_frame); | |
1500 | tramp_frame_prepend_unwinder (gdbarch, | |
1501 | &arm_linux_rt_sigreturn_tramp_frame); | |
1502 | tramp_frame_prepend_unwinder (gdbarch, | |
1503 | &arm_eabi_linux_sigreturn_tramp_frame); | |
1504 | tramp_frame_prepend_unwinder (gdbarch, | |
1505 | &arm_eabi_linux_rt_sigreturn_tramp_frame); | |
f347ffc9 WN |
1506 | tramp_frame_prepend_unwinder (gdbarch, |
1507 | &thumb2_eabi_linux_sigreturn_tramp_frame); | |
1508 | tramp_frame_prepend_unwinder (gdbarch, | |
1509 | &thumb2_eabi_linux_rt_sigreturn_tramp_frame); | |
f1973203 MR |
1510 | tramp_frame_prepend_unwinder (gdbarch, |
1511 | &arm_linux_restart_syscall_tramp_frame); | |
478fd957 UW |
1512 | tramp_frame_prepend_unwinder (gdbarch, |
1513 | &arm_kernel_linux_restart_syscall_tramp_frame); | |
cb587d83 DJ |
1514 | |
1515 | /* Core file support. */ | |
5aa82d05 AA |
1516 | set_gdbarch_iterate_over_regset_sections |
1517 | (gdbarch, arm_linux_iterate_over_regset_sections); | |
ef7e8358 UW |
1518 | set_gdbarch_core_read_description (gdbarch, arm_linux_core_read_description); |
1519 | ||
cca44b1b JB |
1520 | /* Displaced stepping. */ |
1521 | set_gdbarch_displaced_step_copy_insn (gdbarch, | |
1522 | arm_linux_displaced_step_copy_insn); | |
1523 | set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup); | |
1524 | set_gdbarch_displaced_step_free_closure (gdbarch, | |
1525 | simple_displaced_step_free_closure); | |
906d60cf | 1526 | set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location); |
25b41d01 | 1527 | |
72508ac0 PO |
1528 | /* Reversible debugging, process record. */ |
1529 | set_gdbarch_process_record (gdbarch, arm_process_record); | |
25b41d01 | 1530 | |
55aa24fb | 1531 | /* SystemTap functions. */ |
05c0465e SDJ |
1532 | set_gdbarch_stap_integer_prefixes (gdbarch, stap_integer_prefixes); |
1533 | set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes); | |
1534 | set_gdbarch_stap_register_indirection_prefixes (gdbarch, | |
1535 | stap_register_indirection_prefixes); | |
1536 | set_gdbarch_stap_register_indirection_suffixes (gdbarch, | |
1537 | stap_register_indirection_suffixes); | |
55aa24fb SDJ |
1538 | set_gdbarch_stap_gdb_register_prefix (gdbarch, "r"); |
1539 | set_gdbarch_stap_is_single_operand (gdbarch, arm_stap_is_single_operand); | |
1540 | set_gdbarch_stap_parse_special_token (gdbarch, | |
1541 | arm_stap_parse_special_token); | |
1542 | ||
25b41d01 | 1543 | tdep->syscall_next_pc = arm_linux_syscall_next_pc; |
72508ac0 | 1544 | |
9f948660 | 1545 | /* `catch syscall' */ |
458c8db8 | 1546 | set_xml_syscall_file_name (gdbarch, "syscalls/arm-linux.xml"); |
9f948660 SDJ |
1547 | set_gdbarch_get_syscall_number (gdbarch, arm_linux_get_syscall_number); |
1548 | ||
72508ac0 | 1549 | /* Syscall record. */ |
97dfe206 OJ |
1550 | tdep->arm_syscall_record = arm_linux_syscall_record; |
1551 | ||
1552 | /* Initialize the arm_linux_record_tdep. */ | |
1553 | /* These values are the size of the type that will be used in a system | |
1554 | call. They are obtained from Linux Kernel source. */ | |
1555 | arm_linux_record_tdep.size_pointer | |
1556 | = gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT; | |
1557 | arm_linux_record_tdep.size__old_kernel_stat = 32; | |
1558 | arm_linux_record_tdep.size_tms = 16; | |
1559 | arm_linux_record_tdep.size_loff_t = 8; | |
1560 | arm_linux_record_tdep.size_flock = 16; | |
1561 | arm_linux_record_tdep.size_oldold_utsname = 45; | |
1562 | arm_linux_record_tdep.size_ustat = 20; | |
7571f7f2 MK |
1563 | arm_linux_record_tdep.size_old_sigaction = 16; |
1564 | arm_linux_record_tdep.size_old_sigset_t = 4; | |
97dfe206 OJ |
1565 | arm_linux_record_tdep.size_rlimit = 8; |
1566 | arm_linux_record_tdep.size_rusage = 72; | |
1567 | arm_linux_record_tdep.size_timeval = 8; | |
1568 | arm_linux_record_tdep.size_timezone = 8; | |
1569 | arm_linux_record_tdep.size_old_gid_t = 2; | |
1570 | arm_linux_record_tdep.size_old_uid_t = 2; | |
1571 | arm_linux_record_tdep.size_fd_set = 128; | |
72aded86 | 1572 | arm_linux_record_tdep.size_old_dirent = 268; |
97dfe206 OJ |
1573 | arm_linux_record_tdep.size_statfs = 64; |
1574 | arm_linux_record_tdep.size_statfs64 = 84; | |
1575 | arm_linux_record_tdep.size_sockaddr = 16; | |
1576 | arm_linux_record_tdep.size_int | |
1577 | = gdbarch_int_bit (gdbarch) / TARGET_CHAR_BIT; | |
1578 | arm_linux_record_tdep.size_long | |
1579 | = gdbarch_long_bit (gdbarch) / TARGET_CHAR_BIT; | |
1580 | arm_linux_record_tdep.size_ulong | |
1581 | = gdbarch_long_bit (gdbarch) / TARGET_CHAR_BIT; | |
1582 | arm_linux_record_tdep.size_msghdr = 28; | |
1583 | arm_linux_record_tdep.size_itimerval = 16; | |
1584 | arm_linux_record_tdep.size_stat = 88; | |
1585 | arm_linux_record_tdep.size_old_utsname = 325; | |
1586 | arm_linux_record_tdep.size_sysinfo = 64; | |
1587 | arm_linux_record_tdep.size_msqid_ds = 88; | |
1588 | arm_linux_record_tdep.size_shmid_ds = 84; | |
1589 | arm_linux_record_tdep.size_new_utsname = 390; | |
1590 | arm_linux_record_tdep.size_timex = 128; | |
1591 | arm_linux_record_tdep.size_mem_dqinfo = 24; | |
1592 | arm_linux_record_tdep.size_if_dqblk = 68; | |
1593 | arm_linux_record_tdep.size_fs_quota_stat = 68; | |
1594 | arm_linux_record_tdep.size_timespec = 8; | |
1595 | arm_linux_record_tdep.size_pollfd = 8; | |
1596 | arm_linux_record_tdep.size_NFS_FHSIZE = 32; | |
1597 | arm_linux_record_tdep.size_knfsd_fh = 132; | |
1598 | arm_linux_record_tdep.size_TASK_COMM_LEN = 16; | |
7571f7f2 | 1599 | arm_linux_record_tdep.size_sigaction = 20; |
97dfe206 OJ |
1600 | arm_linux_record_tdep.size_sigset_t = 8; |
1601 | arm_linux_record_tdep.size_siginfo_t = 128; | |
1602 | arm_linux_record_tdep.size_cap_user_data_t = 12; | |
1603 | arm_linux_record_tdep.size_stack_t = 12; | |
1604 | arm_linux_record_tdep.size_off_t = arm_linux_record_tdep.size_long; | |
1605 | arm_linux_record_tdep.size_stat64 = 96; | |
d625f9a9 MK |
1606 | arm_linux_record_tdep.size_gid_t = 4; |
1607 | arm_linux_record_tdep.size_uid_t = 4; | |
97dfe206 OJ |
1608 | arm_linux_record_tdep.size_PAGE_SIZE = 4096; |
1609 | arm_linux_record_tdep.size_flock64 = 24; | |
1610 | arm_linux_record_tdep.size_user_desc = 16; | |
1611 | arm_linux_record_tdep.size_io_event = 32; | |
1612 | arm_linux_record_tdep.size_iocb = 64; | |
1613 | arm_linux_record_tdep.size_epoll_event = 12; | |
1614 | arm_linux_record_tdep.size_itimerspec | |
1615 | = arm_linux_record_tdep.size_timespec * 2; | |
1616 | arm_linux_record_tdep.size_mq_attr = 32; | |
97dfe206 OJ |
1617 | arm_linux_record_tdep.size_termios = 36; |
1618 | arm_linux_record_tdep.size_termios2 = 44; | |
1619 | arm_linux_record_tdep.size_pid_t = 4; | |
1620 | arm_linux_record_tdep.size_winsize = 8; | |
1621 | arm_linux_record_tdep.size_serial_struct = 60; | |
1622 | arm_linux_record_tdep.size_serial_icounter_struct = 80; | |
1623 | arm_linux_record_tdep.size_hayes_esp_config = 12; | |
1624 | arm_linux_record_tdep.size_size_t = 4; | |
1625 | arm_linux_record_tdep.size_iovec = 8; | |
b80d067f | 1626 | arm_linux_record_tdep.size_time_t = 4; |
97dfe206 OJ |
1627 | |
1628 | /* These values are the second argument of system call "sys_ioctl". | |
1629 | They are obtained from Linux Kernel source. */ | |
1630 | arm_linux_record_tdep.ioctl_TCGETS = 0x5401; | |
1631 | arm_linux_record_tdep.ioctl_TCSETS = 0x5402; | |
1632 | arm_linux_record_tdep.ioctl_TCSETSW = 0x5403; | |
1633 | arm_linux_record_tdep.ioctl_TCSETSF = 0x5404; | |
1634 | arm_linux_record_tdep.ioctl_TCGETA = 0x5405; | |
1635 | arm_linux_record_tdep.ioctl_TCSETA = 0x5406; | |
1636 | arm_linux_record_tdep.ioctl_TCSETAW = 0x5407; | |
1637 | arm_linux_record_tdep.ioctl_TCSETAF = 0x5408; | |
1638 | arm_linux_record_tdep.ioctl_TCSBRK = 0x5409; | |
1639 | arm_linux_record_tdep.ioctl_TCXONC = 0x540a; | |
1640 | arm_linux_record_tdep.ioctl_TCFLSH = 0x540b; | |
1641 | arm_linux_record_tdep.ioctl_TIOCEXCL = 0x540c; | |
1642 | arm_linux_record_tdep.ioctl_TIOCNXCL = 0x540d; | |
1643 | arm_linux_record_tdep.ioctl_TIOCSCTTY = 0x540e; | |
1644 | arm_linux_record_tdep.ioctl_TIOCGPGRP = 0x540f; | |
1645 | arm_linux_record_tdep.ioctl_TIOCSPGRP = 0x5410; | |
1646 | arm_linux_record_tdep.ioctl_TIOCOUTQ = 0x5411; | |
1647 | arm_linux_record_tdep.ioctl_TIOCSTI = 0x5412; | |
1648 | arm_linux_record_tdep.ioctl_TIOCGWINSZ = 0x5413; | |
1649 | arm_linux_record_tdep.ioctl_TIOCSWINSZ = 0x5414; | |
1650 | arm_linux_record_tdep.ioctl_TIOCMGET = 0x5415; | |
1651 | arm_linux_record_tdep.ioctl_TIOCMBIS = 0x5416; | |
1652 | arm_linux_record_tdep.ioctl_TIOCMBIC = 0x5417; | |
1653 | arm_linux_record_tdep.ioctl_TIOCMSET = 0x5418; | |
1654 | arm_linux_record_tdep.ioctl_TIOCGSOFTCAR = 0x5419; | |
1655 | arm_linux_record_tdep.ioctl_TIOCSSOFTCAR = 0x541a; | |
1656 | arm_linux_record_tdep.ioctl_FIONREAD = 0x541b; | |
1657 | arm_linux_record_tdep.ioctl_TIOCINQ = arm_linux_record_tdep.ioctl_FIONREAD; | |
1658 | arm_linux_record_tdep.ioctl_TIOCLINUX = 0x541c; | |
1659 | arm_linux_record_tdep.ioctl_TIOCCONS = 0x541d; | |
1660 | arm_linux_record_tdep.ioctl_TIOCGSERIAL = 0x541e; | |
1661 | arm_linux_record_tdep.ioctl_TIOCSSERIAL = 0x541f; | |
1662 | arm_linux_record_tdep.ioctl_TIOCPKT = 0x5420; | |
1663 | arm_linux_record_tdep.ioctl_FIONBIO = 0x5421; | |
1664 | arm_linux_record_tdep.ioctl_TIOCNOTTY = 0x5422; | |
1665 | arm_linux_record_tdep.ioctl_TIOCSETD = 0x5423; | |
1666 | arm_linux_record_tdep.ioctl_TIOCGETD = 0x5424; | |
1667 | arm_linux_record_tdep.ioctl_TCSBRKP = 0x5425; | |
1668 | arm_linux_record_tdep.ioctl_TIOCTTYGSTRUCT = 0x5426; | |
1669 | arm_linux_record_tdep.ioctl_TIOCSBRK = 0x5427; | |
1670 | arm_linux_record_tdep.ioctl_TIOCCBRK = 0x5428; | |
1671 | arm_linux_record_tdep.ioctl_TIOCGSID = 0x5429; | |
1672 | arm_linux_record_tdep.ioctl_TCGETS2 = 0x802c542a; | |
1673 | arm_linux_record_tdep.ioctl_TCSETS2 = 0x402c542b; | |
1674 | arm_linux_record_tdep.ioctl_TCSETSW2 = 0x402c542c; | |
1675 | arm_linux_record_tdep.ioctl_TCSETSF2 = 0x402c542d; | |
1676 | arm_linux_record_tdep.ioctl_TIOCGPTN = 0x80045430; | |
1677 | arm_linux_record_tdep.ioctl_TIOCSPTLCK = 0x40045431; | |
1678 | arm_linux_record_tdep.ioctl_FIONCLEX = 0x5450; | |
1679 | arm_linux_record_tdep.ioctl_FIOCLEX = 0x5451; | |
1680 | arm_linux_record_tdep.ioctl_FIOASYNC = 0x5452; | |
1681 | arm_linux_record_tdep.ioctl_TIOCSERCONFIG = 0x5453; | |
1682 | arm_linux_record_tdep.ioctl_TIOCSERGWILD = 0x5454; | |
1683 | arm_linux_record_tdep.ioctl_TIOCSERSWILD = 0x5455; | |
1684 | arm_linux_record_tdep.ioctl_TIOCGLCKTRMIOS = 0x5456; | |
1685 | arm_linux_record_tdep.ioctl_TIOCSLCKTRMIOS = 0x5457; | |
1686 | arm_linux_record_tdep.ioctl_TIOCSERGSTRUCT = 0x5458; | |
1687 | arm_linux_record_tdep.ioctl_TIOCSERGETLSR = 0x5459; | |
1688 | arm_linux_record_tdep.ioctl_TIOCSERGETMULTI = 0x545a; | |
1689 | arm_linux_record_tdep.ioctl_TIOCSERSETMULTI = 0x545b; | |
1690 | arm_linux_record_tdep.ioctl_TIOCMIWAIT = 0x545c; | |
1691 | arm_linux_record_tdep.ioctl_TIOCGICOUNT = 0x545d; | |
1692 | arm_linux_record_tdep.ioctl_TIOCGHAYESESP = 0x545e; | |
1693 | arm_linux_record_tdep.ioctl_TIOCSHAYESESP = 0x545f; | |
1694 | arm_linux_record_tdep.ioctl_FIOQSIZE = 0x5460; | |
1695 | ||
1696 | /* These values are the second argument of system call "sys_fcntl" | |
1697 | and "sys_fcntl64". They are obtained from Linux Kernel source. */ | |
1698 | arm_linux_record_tdep.fcntl_F_GETLK = 5; | |
1699 | arm_linux_record_tdep.fcntl_F_GETLK64 = 12; | |
1700 | arm_linux_record_tdep.fcntl_F_SETLK64 = 13; | |
1701 | arm_linux_record_tdep.fcntl_F_SETLKW64 = 14; | |
1702 | ||
1703 | arm_linux_record_tdep.arg1 = ARM_A1_REGNUM + 1; | |
1704 | arm_linux_record_tdep.arg2 = ARM_A1_REGNUM + 2; | |
1705 | arm_linux_record_tdep.arg3 = ARM_A1_REGNUM + 3; | |
1706 | arm_linux_record_tdep.arg4 = ARM_A1_REGNUM + 3; | |
97e03143 RE |
1707 | } |
1708 | ||
63807e1d PA |
1709 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1710 | extern initialize_file_ftype _initialize_arm_linux_tdep; | |
1711 | ||
faf5f7ad SB |
1712 | void |
1713 | _initialize_arm_linux_tdep (void) | |
1714 | { | |
05816f70 MK |
1715 | gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX, |
1716 | arm_linux_init_abi); | |
faf5f7ad | 1717 | } |