include/elf/
[deliverable/binutils-gdb.git] / gdb / arm-linux-tdep.c
CommitLineData
faf5f7ad 1/* GNU/Linux on ARM target support.
0fd88904 2
0fb0cc75 3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
7b6bb8da 4 2009, 2010, 2011 Free Software Foundation, Inc.
faf5f7ad
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5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
faf5f7ad
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11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
faf5f7ad
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20
21#include "defs.h"
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22#include "target.h"
23#include "value.h"
faf5f7ad 24#include "gdbtypes.h"
134e61c4 25#include "floatformat.h"
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26#include "gdbcore.h"
27#include "frame.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
7aa1783e 30#include "solib-svr4.h"
4be87837 31#include "osabi.h"
cb587d83 32#include "regset.h"
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33#include "trad-frame.h"
34#include "tramp-frame.h"
daddc3c1 35#include "breakpoint.h"
faf5f7ad 36
34e8f22d 37#include "arm-tdep.h"
cb587d83 38#include "arm-linux-tdep.h"
4aa995e1 39#include "linux-tdep.h"
0670c0aa 40#include "glibc-tdep.h"
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41#include "arch-utils.h"
42#include "inferior.h"
43#include "gdbthread.h"
44#include "symfile.h"
a52e6aac 45
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46#include "gdb_string.h"
47
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48extern int arm_apcs_32;
49
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50/* Under ARM GNU/Linux the traditional way of performing a breakpoint
51 is to execute a particular software interrupt, rather than use a
52 particular undefined instruction to provoke a trap. Upon exection
53 of the software interrupt the kernel stops the inferior with a
498b1f87 54 SIGTRAP, and wakes the debugger. */
66e810cd 55
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56static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
57
58static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
66e810cd 59
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60/* However, the EABI syscall interface (new in Nov. 2005) does not look at
61 the operand of the swi if old-ABI compatibility is disabled. Therefore,
62 use an undefined instruction instead. This is supported as of kernel
63 version 2.5.70 (May 2003), so should be a safe assumption for EABI
64 binaries. */
65
66static const char eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 };
67
68static const char eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 };
69
70/* All the kernels which support Thumb support using a specific undefined
71 instruction for the Thumb breakpoint. */
72
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73static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01};
74
75static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde};
76
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77/* Because the 16-bit Thumb breakpoint is affected by Thumb-2 IT blocks,
78 we must use a length-appropriate breakpoint for 32-bit Thumb
79 instructions. See also thumb_get_next_pc. */
80
81static const char arm_linux_thumb2_be_breakpoint[] = { 0xf7, 0xf0, 0xa0, 0x00 };
82
83static const char arm_linux_thumb2_le_breakpoint[] = { 0xf0, 0xf7, 0x00, 0xa0 };
84
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85/* Description of the longjmp buffer. The buffer is treated as an array of
86 elements of size ARM_LINUX_JB_ELEMENT_SIZE.
87
88 The location of saved registers in this buffer (in particular the PC
89 to use after longjmp is called) varies depending on the ABI (in
90 particular the FP model) and also (possibly) the C Library.
91
92 For glibc, eglibc, and uclibc the following holds: If the FP model is
93 SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the
94 buffer. This is also true for the SoftFPA model. However, for the FPA
95 model the PC is at offset 21 in the buffer. */
7a5ea0d4 96#define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
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97#define ARM_LINUX_JB_PC_FPA 21
98#define ARM_LINUX_JB_PC_EABI 9
faf5f7ad 99
f38e884d 100/*
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101 Dynamic Linking on ARM GNU/Linux
102 --------------------------------
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103
104 Note: PLT = procedure linkage table
105 GOT = global offset table
106
107 As much as possible, ELF dynamic linking defers the resolution of
0963b4bd 108 jump/call addresses until the last minute. The technique used is
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109 inspired by the i386 ELF design, and is based on the following
110 constraints.
111
112 1) The calling technique should not force a change in the assembly
113 code produced for apps; it MAY cause changes in the way assembly
114 code is produced for position independent code (i.e. shared
115 libraries).
116
117 2) The technique must be such that all executable areas must not be
118 modified; and any modified areas must not be executed.
119
120 To do this, there are three steps involved in a typical jump:
121
122 1) in the code
123 2) through the PLT
124 3) using a pointer from the GOT
125
126 When the executable or library is first loaded, each GOT entry is
127 initialized to point to the code which implements dynamic name
128 resolution and code finding. This is normally a function in the
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129 program interpreter (on ARM GNU/Linux this is usually
130 ld-linux.so.2, but it does not have to be). On the first
131 invocation, the function is located and the GOT entry is replaced
132 with the real function address. Subsequent calls go through steps
133 1, 2 and 3 and end up calling the real code.
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134
135 1) In the code:
136
137 b function_call
138 bl function_call
139
140 This is typical ARM code using the 26 bit relative branch or branch
141 and link instructions. The target of the instruction
142 (function_call is usually the address of the function to be called.
143 In position independent code, the target of the instruction is
144 actually an entry in the PLT when calling functions in a shared
145 library. Note that this call is identical to a normal function
146 call, only the target differs.
147
148 2) In the PLT:
149
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150 The PLT is a synthetic area, created by the linker. It exists in
151 both executables and libraries. It is an array of stubs, one per
152 imported function call. It looks like this:
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153
154 PLT[0]:
155 str lr, [sp, #-4]! @push the return address (lr)
156 ldr lr, [pc, #16] @load from 6 words ahead
157 add lr, pc, lr @form an address for GOT[0]
158 ldr pc, [lr, #8]! @jump to the contents of that addr
159
160 The return address (lr) is pushed on the stack and used for
161 calculations. The load on the second line loads the lr with
162 &GOT[3] - . - 20. The addition on the third leaves:
163
164 lr = (&GOT[3] - . - 20) + (. + 8)
165 lr = (&GOT[3] - 12)
166 lr = &GOT[0]
167
168 On the fourth line, the pc and lr are both updated, so that:
169
170 pc = GOT[2]
171 lr = &GOT[0] + 8
172 = &GOT[2]
173
0963b4bd 174 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
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175 "tight", but allows us to keep all the PLT entries the same size.
176
177 PLT[n+1]:
178 ldr ip, [pc, #4] @load offset from gotoff
179 add ip, pc, ip @add the offset to the pc
180 ldr pc, [ip] @jump to that address
181 gotoff: .word GOT[n+3] - .
182
183 The load on the first line, gets an offset from the fourth word of
184 the PLT entry. The add on the second line makes ip = &GOT[n+3],
185 which contains either a pointer to PLT[0] (the fixup trampoline) or
186 a pointer to the actual code.
187
188 3) In the GOT:
189
190 The GOT contains helper pointers for both code (PLT) fixups and
0963b4bd 191 data fixups. The first 3 entries of the GOT are special. The next
f38e884d 192 M entries (where M is the number of entries in the PLT) belong to
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193 the PLT fixups. The next D (all remaining) entries belong to
194 various data fixups. The actual size of the GOT is 3 + M + D.
f38e884d 195
0963b4bd 196 The GOT is also a synthetic area, created by the linker. It exists
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197 in both executables and libraries. When the GOT is first
198 initialized , all the GOT entries relating to PLT fixups are
199 pointing to code back at PLT[0].
200
201 The special entries in the GOT are:
202
203 GOT[0] = linked list pointer used by the dynamic loader
204 GOT[1] = pointer to the reloc table for this module
205 GOT[2] = pointer to the fixup/resolver code
206
207 The first invocation of function call comes through and uses the
208 fixup/resolver code. On the entry to the fixup/resolver code:
209
210 ip = &GOT[n+3]
211 lr = &GOT[2]
212 stack[0] = return address (lr) of the function call
213 [r0, r1, r2, r3] are still the arguments to the function call
214
215 This is enough information for the fixup/resolver code to work
216 with. Before the fixup/resolver code returns, it actually calls
217 the requested function and repairs &GOT[n+3]. */
218
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219/* The constants below were determined by examining the following files
220 in the linux kernel sources:
221
222 arch/arm/kernel/signal.c
223 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
224 include/asm-arm/unistd.h
225 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
226
227#define ARM_LINUX_SIGRETURN_INSTR 0xef900077
228#define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
229
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230/* For ARM EABI, the syscall number is not in the SWI instruction
231 (instead it is loaded into r7). We recognize the pattern that
232 glibc uses... alternatively, we could arrange to do this by
233 function name, but they are not always exported. */
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234#define ARM_SET_R7_SIGRETURN 0xe3a07077
235#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad
236#define ARM_EABI_SYSCALL 0xef000000
2a451106 237
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238/* OABI syscall restart trampoline, used for EABI executables too
239 whenever OABI support has been enabled in the kernel. */
240#define ARM_OABI_SYSCALL_RESTART_SYSCALL 0xef900000
241#define ARM_LDR_PC_SP_12 0xe49df00c
478fd957 242#define ARM_LDR_PC_SP_4 0xe49df004
f1973203 243
8e9d1a24 244static void
a262aec2 245arm_linux_sigtramp_cache (struct frame_info *this_frame,
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246 struct trad_frame_cache *this_cache,
247 CORE_ADDR func, int regs_offset)
2a451106 248{
a262aec2 249 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
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250 CORE_ADDR base = sp + regs_offset;
251 int i;
2a451106 252
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253 for (i = 0; i < 16; i++)
254 trad_frame_set_reg_addr (this_cache, i, base + i * 4);
2a451106 255
8e9d1a24 256 trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4);
2a451106 257
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258 /* The VFP or iWMMXt registers may be saved on the stack, but there's
259 no reliable way to restore them (yet). */
2a451106 260
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261 /* Save a frame ID. */
262 trad_frame_set_id (this_cache, frame_id_build (sp, func));
263}
2a451106 264
edfb1a26
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265/* There are a couple of different possible stack layouts that
266 we need to support.
267
268 Before version 2.6.18, the kernel used completely independent
269 layouts for non-RT and RT signals. For non-RT signals the stack
270 began directly with a struct sigcontext. For RT signals the stack
271 began with two redundant pointers (to the siginfo and ucontext),
272 and then the siginfo and ucontext.
273
274 As of version 2.6.18, the non-RT signal frame layout starts with
275 a ucontext and the RT signal frame starts with a siginfo and then
276 a ucontext. Also, the ucontext now has a designated save area
277 for coprocessor registers.
278
279 For RT signals, it's easy to tell the difference: we look for
280 pinfo, the pointer to the siginfo. If it has the expected
281 value, we have an old layout. If it doesn't, we have the new
282 layout.
283
284 For non-RT signals, it's a bit harder. We need something in one
285 layout or the other with a recognizable offset and value. We can't
286 use the return trampoline, because ARM usually uses SA_RESTORER,
287 in which case the stack return trampoline is not filled in.
288 We can't use the saved stack pointer, because sigaltstack might
289 be in use. So for now we guess the new layout... */
290
291/* There are three words (trap_no, error_code, oldmask) in
292 struct sigcontext before r0. */
293#define ARM_SIGCONTEXT_R0 0xc
294
295/* There are five words (uc_flags, uc_link, and three for uc_stack)
296 in the ucontext_t before the sigcontext. */
297#define ARM_UCONTEXT_SIGCONTEXT 0x14
298
299/* There are three elements in an rt_sigframe before the ucontext:
300 pinfo, puc, and info. The first two are pointers and the third
301 is a struct siginfo, with size 128 bytes. We could follow puc
302 to the ucontext, but it's simpler to skip the whole thing. */
303#define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8
304#define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88
305
306#define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80
307
308#define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a
309
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310static void
311arm_linux_sigreturn_init (const struct tramp_frame *self,
a262aec2 312 struct frame_info *this_frame,
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313 struct trad_frame_cache *this_cache,
314 CORE_ADDR func)
2a451106 315{
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316 struct gdbarch *gdbarch = get_frame_arch (this_frame);
317 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a262aec2 318 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
e17a4113 319 ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order);
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320
321 if (uc_flags == ARM_NEW_SIGFRAME_MAGIC)
a262aec2 322 arm_linux_sigtramp_cache (this_frame, this_cache, func,
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323 ARM_UCONTEXT_SIGCONTEXT
324 + ARM_SIGCONTEXT_R0);
325 else
a262aec2 326 arm_linux_sigtramp_cache (this_frame, this_cache, func,
edfb1a26 327 ARM_SIGCONTEXT_R0);
8e9d1a24 328}
2a451106 329
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330static void
331arm_linux_rt_sigreturn_init (const struct tramp_frame *self,
a262aec2 332 struct frame_info *this_frame,
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333 struct trad_frame_cache *this_cache,
334 CORE_ADDR func)
335{
e17a4113
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336 struct gdbarch *gdbarch = get_frame_arch (this_frame);
337 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a262aec2 338 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
e17a4113 339 ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order);
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340
341 if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO)
a262aec2 342 arm_linux_sigtramp_cache (this_frame, this_cache, func,
edfb1a26
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343 ARM_OLD_RT_SIGFRAME_UCONTEXT
344 + ARM_UCONTEXT_SIGCONTEXT
345 + ARM_SIGCONTEXT_R0);
346 else
a262aec2 347 arm_linux_sigtramp_cache (this_frame, this_cache, func,
edfb1a26
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348 ARM_NEW_RT_SIGFRAME_UCONTEXT
349 + ARM_UCONTEXT_SIGCONTEXT
350 + ARM_SIGCONTEXT_R0);
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351}
352
f1973203
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353static void
354arm_linux_restart_syscall_init (const struct tramp_frame *self,
355 struct frame_info *this_frame,
356 struct trad_frame_cache *this_cache,
357 CORE_ADDR func)
358{
478fd957 359 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f1973203 360 CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
478fd957
UW
361 CORE_ADDR pc = get_frame_memory_unsigned (this_frame, sp, 4);
362 CORE_ADDR cpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM);
363 ULONGEST t_bit = arm_psr_thumb_bit (gdbarch);
364 int sp_offset;
365
366 /* There are two variants of this trampoline; with older kernels, the
367 stub is placed on the stack, while newer kernels use the stub from
368 the vector page. They are identical except that the older version
369 increments SP by 12 (to skip stored PC and the stub itself), while
370 the newer version increments SP only by 4 (just the stored PC). */
371 if (self->insn[1].bytes == ARM_LDR_PC_SP_4)
372 sp_offset = 4;
373 else
374 sp_offset = 12;
375
376 /* Update Thumb bit in CPSR. */
377 if (pc & 1)
378 cpsr |= t_bit;
379 else
380 cpsr &= ~t_bit;
f1973203 381
478fd957
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382 /* Remove Thumb bit from PC. */
383 pc = gdbarch_addr_bits_remove (gdbarch, pc);
384
385 /* Save previous register values. */
386 trad_frame_set_reg_value (this_cache, ARM_SP_REGNUM, sp + sp_offset);
387 trad_frame_set_reg_value (this_cache, ARM_PC_REGNUM, pc);
388 trad_frame_set_reg_value (this_cache, ARM_PS_REGNUM, cpsr);
f1973203
MR
389
390 /* Save a frame ID. */
391 trad_frame_set_id (this_cache, frame_id_build (sp, func));
392}
393
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394static struct tramp_frame arm_linux_sigreturn_tramp_frame = {
395 SIGTRAMP_FRAME,
396 4,
397 {
398 { ARM_LINUX_SIGRETURN_INSTR, -1 },
399 { TRAMP_SENTINEL_INSN }
400 },
401 arm_linux_sigreturn_init
402};
403
404static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = {
405 SIGTRAMP_FRAME,
406 4,
407 {
408 { ARM_LINUX_RT_SIGRETURN_INSTR, -1 },
409 { TRAMP_SENTINEL_INSN }
410 },
411 arm_linux_rt_sigreturn_init
412};
413
414static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = {
415 SIGTRAMP_FRAME,
416 4,
417 {
418 { ARM_SET_R7_SIGRETURN, -1 },
419 { ARM_EABI_SYSCALL, -1 },
420 { TRAMP_SENTINEL_INSN }
421 },
422 arm_linux_sigreturn_init
423};
424
425static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = {
426 SIGTRAMP_FRAME,
427 4,
428 {
429 { ARM_SET_R7_RT_SIGRETURN, -1 },
430 { ARM_EABI_SYSCALL, -1 },
431 { TRAMP_SENTINEL_INSN }
432 },
433 arm_linux_rt_sigreturn_init
434};
435
f1973203
MR
436static struct tramp_frame arm_linux_restart_syscall_tramp_frame = {
437 NORMAL_FRAME,
438 4,
439 {
440 { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 },
441 { ARM_LDR_PC_SP_12, -1 },
442 { TRAMP_SENTINEL_INSN }
443 },
444 arm_linux_restart_syscall_init
445};
446
478fd957
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447static struct tramp_frame arm_kernel_linux_restart_syscall_tramp_frame = {
448 NORMAL_FRAME,
449 4,
450 {
451 { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 },
452 { ARM_LDR_PC_SP_4, -1 },
453 { TRAMP_SENTINEL_INSN }
454 },
455 arm_linux_restart_syscall_init
456};
457
cb587d83
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458/* Core file and register set support. */
459
460#define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE)
461
462void
463arm_linux_supply_gregset (const struct regset *regset,
464 struct regcache *regcache,
465 int regnum, const void *gregs_buf, size_t len)
466{
e17a4113
UW
467 struct gdbarch *gdbarch = get_regcache_arch (regcache);
468 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
cb587d83
DJ
469 const gdb_byte *gregs = gregs_buf;
470 int regno;
471 CORE_ADDR reg_pc;
472 gdb_byte pc_buf[INT_REGISTER_SIZE];
473
474 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
475 if (regnum == -1 || regnum == regno)
476 regcache_raw_supply (regcache, regno,
477 gregs + INT_REGISTER_SIZE * regno);
478
479 if (regnum == ARM_PS_REGNUM || regnum == -1)
480 {
481 if (arm_apcs_32)
482 regcache_raw_supply (regcache, ARM_PS_REGNUM,
17c12639 483 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
cb587d83
DJ
484 else
485 regcache_raw_supply (regcache, ARM_PS_REGNUM,
486 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
487 }
488
489 if (regnum == ARM_PC_REGNUM || regnum == -1)
490 {
491 reg_pc = extract_unsigned_integer (gregs
492 + INT_REGISTER_SIZE * ARM_PC_REGNUM,
e17a4113
UW
493 INT_REGISTER_SIZE, byte_order);
494 reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
495 store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc);
cb587d83
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496 regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf);
497 }
498}
499
500void
501arm_linux_collect_gregset (const struct regset *regset,
502 const struct regcache *regcache,
503 int regnum, void *gregs_buf, size_t len)
504{
505 gdb_byte *gregs = gregs_buf;
506 int regno;
507
508 for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
509 if (regnum == -1 || regnum == regno)
510 regcache_raw_collect (regcache, regno,
511 gregs + INT_REGISTER_SIZE * regno);
512
513 if (regnum == ARM_PS_REGNUM || regnum == -1)
514 {
515 if (arm_apcs_32)
516 regcache_raw_collect (regcache, ARM_PS_REGNUM,
17c12639 517 gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
cb587d83
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518 else
519 regcache_raw_collect (regcache, ARM_PS_REGNUM,
520 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
521 }
522
523 if (regnum == ARM_PC_REGNUM || regnum == -1)
524 regcache_raw_collect (regcache, ARM_PC_REGNUM,
525 gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
526}
527
528/* Support for register format used by the NWFPE FPA emulator. */
529
530#define typeNone 0x00
531#define typeSingle 0x01
532#define typeDouble 0x02
533#define typeExtended 0x03
534
535void
536supply_nwfpe_register (struct regcache *regcache, int regno,
537 const gdb_byte *regs)
538{
539 const gdb_byte *reg_data;
540 gdb_byte reg_tag;
541 gdb_byte buf[FP_REGISTER_SIZE];
542
543 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
544 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
545 memset (buf, 0, FP_REGISTER_SIZE);
546
547 switch (reg_tag)
548 {
549 case typeSingle:
550 memcpy (buf, reg_data, 4);
551 break;
552 case typeDouble:
553 memcpy (buf, reg_data + 4, 4);
554 memcpy (buf + 4, reg_data, 4);
555 break;
556 case typeExtended:
557 /* We want sign and exponent, then least significant bits,
558 then most significant. NWFPE does sign, most, least. */
559 memcpy (buf, reg_data, 4);
560 memcpy (buf + 4, reg_data + 8, 4);
561 memcpy (buf + 8, reg_data + 4, 4);
562 break;
563 default:
564 break;
565 }
566
567 regcache_raw_supply (regcache, regno, buf);
568}
569
570void
571collect_nwfpe_register (const struct regcache *regcache, int regno,
572 gdb_byte *regs)
573{
574 gdb_byte *reg_data;
575 gdb_byte reg_tag;
576 gdb_byte buf[FP_REGISTER_SIZE];
577
578 regcache_raw_collect (regcache, regno, buf);
579
580 /* NOTE drow/2006-06-07: This code uses the tag already in the
581 register buffer. I've preserved that when moving the code
582 from the native file to the target file. But this doesn't
583 always make sense. */
584
585 reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
586 reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
587
588 switch (reg_tag)
589 {
590 case typeSingle:
591 memcpy (reg_data, buf, 4);
592 break;
593 case typeDouble:
594 memcpy (reg_data, buf + 4, 4);
595 memcpy (reg_data + 4, buf, 4);
596 break;
597 case typeExtended:
598 memcpy (reg_data, buf, 4);
599 memcpy (reg_data + 4, buf + 8, 4);
600 memcpy (reg_data + 8, buf + 4, 4);
601 break;
602 default:
603 break;
604 }
605}
606
607void
608arm_linux_supply_nwfpe (const struct regset *regset,
609 struct regcache *regcache,
610 int regnum, const void *regs_buf, size_t len)
611{
612 const gdb_byte *regs = regs_buf;
613 int regno;
614
615 if (regnum == ARM_FPS_REGNUM || regnum == -1)
616 regcache_raw_supply (regcache, ARM_FPS_REGNUM,
617 regs + NWFPE_FPSR_OFFSET);
618
619 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
620 if (regnum == -1 || regnum == regno)
621 supply_nwfpe_register (regcache, regno, regs);
622}
623
624void
625arm_linux_collect_nwfpe (const struct regset *regset,
626 const struct regcache *regcache,
627 int regnum, void *regs_buf, size_t len)
628{
629 gdb_byte *regs = regs_buf;
630 int regno;
631
632 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
633 if (regnum == -1 || regnum == regno)
634 collect_nwfpe_register (regcache, regno, regs);
635
636 if (regnum == ARM_FPS_REGNUM || regnum == -1)
637 regcache_raw_collect (regcache, ARM_FPS_REGNUM,
638 regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM);
639}
640
641/* Return the appropriate register set for the core section identified
642 by SECT_NAME and SECT_SIZE. */
643
644static const struct regset *
645arm_linux_regset_from_core_section (struct gdbarch *gdbarch,
646 const char *sect_name, size_t sect_size)
647{
648 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
649
650 if (strcmp (sect_name, ".reg") == 0
651 && sect_size == ARM_LINUX_SIZEOF_GREGSET)
652 {
653 if (tdep->gregset == NULL)
654 tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset,
655 arm_linux_collect_gregset);
656 return tdep->gregset;
657 }
658
659 if (strcmp (sect_name, ".reg2") == 0
660 && sect_size == ARM_LINUX_SIZEOF_NWFPE)
661 {
662 if (tdep->fpregset == NULL)
663 tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe,
664 arm_linux_collect_nwfpe);
665 return tdep->fpregset;
666 }
667
668 return NULL;
669}
670
25b41d01 671/* Copy the value of next pc of sigreturn and rt_sigrturn into PC,
18819fa6
UW
672 return 1. In addition, set IS_THUMB depending on whether we
673 will return to ARM or Thumb code. Return 0 if it is not a
674 rt_sigreturn/sigreturn syscall. */
25b41d01
YQ
675static int
676arm_linux_sigreturn_return_addr (struct frame_info *frame,
677 unsigned long svc_number,
18819fa6 678 CORE_ADDR *pc, int *is_thumb)
25b41d01
YQ
679{
680 /* Is this a sigreturn or rt_sigreturn syscall? */
681 if (svc_number == 119 || svc_number == 173)
682 {
683 if (get_frame_type (frame) == SIGTRAMP_FRAME)
684 {
18819fa6
UW
685 ULONGEST t_bit = arm_psr_thumb_bit (frame_unwind_arch (frame));
686 CORE_ADDR cpsr
687 = frame_unwind_register_unsigned (frame, ARM_PS_REGNUM);
688
689 *is_thumb = (cpsr & t_bit) != 0;
25b41d01
YQ
690 *pc = frame_unwind_caller_pc (frame);
691 return 1;
692 }
693 }
694 return 0;
695}
696
697/* When FRAME is at a syscall instruction, return the PC of the next
698 instruction to be executed. */
699
700static CORE_ADDR
701arm_linux_syscall_next_pc (struct frame_info *frame)
702{
703 CORE_ADDR pc = get_frame_pc (frame);
704 CORE_ADDR return_addr = 0;
705 int is_thumb = arm_frame_is_thumb (frame);
706 ULONGEST svc_number = 0;
25b41d01
YQ
707
708 if (is_thumb)
709 {
710 svc_number = get_frame_register_unsigned (frame, 7);
18819fa6 711 return_addr = pc + 2;
25b41d01
YQ
712 }
713 else
714 {
715 struct gdbarch *gdbarch = get_frame_arch (frame);
716 enum bfd_endian byte_order_for_code =
717 gdbarch_byte_order_for_code (gdbarch);
718 unsigned long this_instr =
719 read_memory_unsigned_integer (pc, 4, byte_order_for_code);
720
721 unsigned long svc_operand = (0x00ffffff & this_instr);
722 if (svc_operand) /* OABI. */
723 {
724 svc_number = svc_operand - 0x900000;
725 }
726 else /* EABI. */
727 {
728 svc_number = get_frame_register_unsigned (frame, 7);
729 }
18819fa6
UW
730
731 return_addr = pc + 4;
25b41d01
YQ
732 }
733
18819fa6 734 arm_linux_sigreturn_return_addr (frame, svc_number, &return_addr, &is_thumb);
25b41d01 735
18819fa6 736 /* Addresses for calling Thumb functions have the bit 0 set. */
25b41d01 737 if (is_thumb)
18819fa6 738 return_addr |= 1;
25b41d01
YQ
739
740 return return_addr;
741}
742
743
daddc3c1
DJ
744/* Insert a single step breakpoint at the next executed instruction. */
745
63807e1d 746static int
daddc3c1
DJ
747arm_linux_software_single_step (struct frame_info *frame)
748{
a6d9a66e 749 struct gdbarch *gdbarch = get_frame_arch (frame);
6c95b8df 750 struct address_space *aspace = get_frame_address_space (frame);
daddc3c1
DJ
751 CORE_ADDR next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
752
753 /* The Linux kernel offers some user-mode helpers in a high page. We can
754 not read this page (as of 2.6.23), and even if we could then we couldn't
755 set breakpoints in it, and even if we could then the atomic operations
756 would fail when interrupted. They are all called as functions and return
757 to the address in LR, so step to there instead. */
758 if (next_pc > 0xffff0000)
759 next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM);
760
18819fa6 761 arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc);
daddc3c1
DJ
762
763 return 1;
764}
765
cca44b1b
JB
766/* Support for displaced stepping of Linux SVC instructions. */
767
768static void
6e39997a 769arm_linux_cleanup_svc (struct gdbarch *gdbarch,
cca44b1b
JB
770 struct regcache *regs,
771 struct displaced_step_closure *dsc)
772{
773 CORE_ADDR from = dsc->insn_addr;
774 ULONGEST apparent_pc;
775 int within_scratch;
776
777 regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc);
778
779 within_scratch = (apparent_pc >= dsc->scratch_base
780 && apparent_pc < (dsc->scratch_base
781 + DISPLACED_MODIFIED_INSNS * 4 + 4));
782
783 if (debug_displaced)
784 {
785 fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after "
786 "SVC step ", (unsigned long) apparent_pc);
787 if (within_scratch)
788 fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n");
789 else
790 fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n");
791 }
792
793 if (within_scratch)
794 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC);
795}
796
797static int
bd18283a
YQ
798arm_linux_copy_svc (struct gdbarch *gdbarch, struct regcache *regs,
799 struct displaced_step_closure *dsc)
cca44b1b 800{
25b41d01
YQ
801 CORE_ADDR return_to = 0;
802
cca44b1b 803 struct frame_info *frame;
36073a92 804 unsigned int svc_number = displaced_read_reg (regs, dsc, 7);
25b41d01 805 int is_sigreturn = 0;
18819fa6 806 int is_thumb;
cca44b1b 807
cca44b1b
JB
808 frame = get_current_frame ();
809
25b41d01 810 is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number,
18819fa6 811 &return_to, &is_thumb);
25b41d01 812 if (is_sigreturn)
cca44b1b 813 {
cca44b1b
JB
814 struct symtab_and_line sal;
815
816 if (debug_displaced)
817 fprintf_unfiltered (gdb_stdlog, "displaced: found "
0963b4bd 818 "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n",
cca44b1b
JB
819 (unsigned long) get_frame_pc (frame));
820
cca44b1b 821 if (debug_displaced)
0963b4bd 822 fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. "
cca44b1b
JB
823 "Setting momentary breakpoint.\n", (unsigned long) return_to);
824
8358c15c
JK
825 gdb_assert (inferior_thread ()->control.step_resume_breakpoint
826 == NULL);
cca44b1b
JB
827
828 sal = find_pc_line (return_to, 0);
829 sal.pc = return_to;
830 sal.section = find_pc_overlay (return_to);
831 sal.explicit_pc = 1;
832
833 frame = get_prev_frame (frame);
834
835 if (frame)
836 {
8358c15c 837 inferior_thread ()->control.step_resume_breakpoint
cca44b1b
JB
838 = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame),
839 bp_step_resume);
840
841 /* We need to make sure we actually insert the momentary
842 breakpoint set above. */
843 insert_breakpoints ();
844 }
845 else if (debug_displaced)
846 fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous "
847 "frame to set momentary breakpoint for "
848 "sigreturn/rt_sigreturn\n");
849 }
850 else if (debug_displaced)
851 fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn "
852 "SVC call not in signal trampoline frame\n");
25b41d01 853
cca44b1b
JB
854
855 /* Preparation: If we detect sigreturn, set momentary breakpoint at resume
856 location, else nothing.
857 Insn: unmodified svc.
858 Cleanup: if pc lands in scratch space, pc <- insn_addr + 4
859 else leave pc alone. */
860
cca44b1b
JB
861
862 dsc->cleanup = &arm_linux_cleanup_svc;
863 /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next
864 instruction. */
865 dsc->wrote_to_pc = 1;
866
867 return 0;
868}
869
870
871/* The following two functions implement single-stepping over calls to Linux
872 kernel helper routines, which perform e.g. atomic operations on architecture
873 variants which don't support them natively.
874
875 When this function is called, the PC will be pointing at the kernel helper
876 (at an address inaccessible to GDB), and r14 will point to the return
877 address. Displaced stepping always executes code in the copy area:
878 so, make the copy-area instruction branch back to the kernel helper (the
879 "from" address), and make r14 point to the breakpoint in the copy area. In
880 that way, we regain control once the kernel helper returns, and can clean
881 up appropriately (as if we had just returned from the kernel helper as it
882 would have been called from the non-displaced location). */
883
884static void
6e39997a 885cleanup_kernel_helper_return (struct gdbarch *gdbarch,
cca44b1b
JB
886 struct regcache *regs,
887 struct displaced_step_closure *dsc)
888{
889 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC);
890 displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC);
891}
892
893static void
894arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from,
895 CORE_ADDR to, struct regcache *regs,
896 struct displaced_step_closure *dsc)
897{
898 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
899
900 dsc->numinsns = 1;
901 dsc->insn_addr = from;
902 dsc->cleanup = &cleanup_kernel_helper_return;
903 /* Say we wrote to the PC, else cleanup will set PC to the next
904 instruction in the helper, which isn't helpful. */
905 dsc->wrote_to_pc = 1;
906
907 /* Preparation: tmp[0] <- r14
908 r14 <- <scratch space>+4
909 *(<scratch space>+8) <- from
910 Insn: ldr pc, [r14, #4]
911 Cleanup: r14 <- tmp[0], pc <- tmp[0]. */
912
36073a92 913 dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM);
cca44b1b
JB
914 displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4,
915 CANNOT_WRITE_PC);
916 write_memory_unsigned_integer (to + 8, 4, byte_order, from);
917
918 dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */
919}
920
921/* Linux-specific displaced step instruction copying function. Detects when
922 the program has stepped into a Linux kernel helper routine (which must be
923 handled as a special case), falling back to arm_displaced_step_copy_insn()
924 if it hasn't. */
925
926static struct displaced_step_closure *
927arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch,
928 CORE_ADDR from, CORE_ADDR to,
929 struct regcache *regs)
930{
931 struct displaced_step_closure *dsc
932 = xmalloc (sizeof (struct displaced_step_closure));
933
934 /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and
935 stop at the return location. */
936 if (from > 0xffff0000)
937 {
938 if (debug_displaced)
939 fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper "
940 "at %.8lx\n", (unsigned long) from);
941
942 arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc);
943 }
944 else
945 {
cca44b1b
JB
946 /* Override the default handling of SVC instructions. */
947 dsc->u.svc.copy_svc_os = arm_linux_copy_svc;
948
b434a28f 949 arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
cca44b1b
JB
950 }
951
952 arm_displaced_init_closure (gdbarch, from, to, dsc);
953
954 return dsc;
955}
956
97e03143
RE
957static void
958arm_linux_init_abi (struct gdbarch_info info,
959 struct gdbarch *gdbarch)
960{
961 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
962
a5ee0f0c
PA
963 linux_init_abi (info, gdbarch);
964
97e03143 965 tdep->lowest_pc = 0x8000;
2ef47cd0 966 if (info.byte_order == BFD_ENDIAN_BIG)
498b1f87 967 {
c75a2cc8
DJ
968 if (tdep->arm_abi == ARM_ABI_AAPCS)
969 tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint;
970 else
971 tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
498b1f87 972 tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint;
177321bd 973 tdep->thumb2_breakpoint = arm_linux_thumb2_be_breakpoint;
498b1f87 974 }
2ef47cd0 975 else
498b1f87 976 {
c75a2cc8
DJ
977 if (tdep->arm_abi == ARM_ABI_AAPCS)
978 tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint;
979 else
980 tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
498b1f87 981 tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint;
177321bd 982 tdep->thumb2_breakpoint = arm_linux_thumb2_le_breakpoint;
498b1f87 983 }
66e810cd 984 tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
498b1f87 985 tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint);
177321bd 986 tdep->thumb2_breakpoint_size = sizeof (arm_linux_thumb2_le_breakpoint);
9df628e0 987
28e97307
DJ
988 if (tdep->fp_model == ARM_FLOAT_AUTO)
989 tdep->fp_model = ARM_FLOAT_FPA;
fd50bc42 990
f8624c62
MGD
991 switch (tdep->fp_model)
992 {
993 case ARM_FLOAT_FPA:
994 tdep->jb_pc = ARM_LINUX_JB_PC_FPA;
995 break;
996 case ARM_FLOAT_SOFT_FPA:
997 case ARM_FLOAT_SOFT_VFP:
998 case ARM_FLOAT_VFP:
999 tdep->jb_pc = ARM_LINUX_JB_PC_EABI;
1000 break;
1001 default:
1002 internal_error
1003 (__FILE__, __LINE__,
1004 _("arm_linux_init_abi: Floating point model not supported"));
1005 break;
1006 }
a6cdd8c5 1007 tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
19d3fc80 1008
7aa1783e 1009 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1010 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
7aa1783e 1011
190dce09 1012 /* Single stepping. */
daddc3c1 1013 set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step);
190dce09 1014
0e18d038 1015 /* Shared library handling. */
0e18d038 1016 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
bb41a796 1017 set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
b2756930
KB
1018
1019 /* Enable TLS support. */
1020 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1021 svr4_fetch_objfile_link_map);
8e9d1a24
DJ
1022
1023 tramp_frame_prepend_unwinder (gdbarch,
1024 &arm_linux_sigreturn_tramp_frame);
1025 tramp_frame_prepend_unwinder (gdbarch,
1026 &arm_linux_rt_sigreturn_tramp_frame);
1027 tramp_frame_prepend_unwinder (gdbarch,
1028 &arm_eabi_linux_sigreturn_tramp_frame);
1029 tramp_frame_prepend_unwinder (gdbarch,
1030 &arm_eabi_linux_rt_sigreturn_tramp_frame);
f1973203
MR
1031 tramp_frame_prepend_unwinder (gdbarch,
1032 &arm_linux_restart_syscall_tramp_frame);
478fd957
UW
1033 tramp_frame_prepend_unwinder (gdbarch,
1034 &arm_kernel_linux_restart_syscall_tramp_frame);
cb587d83
DJ
1035
1036 /* Core file support. */
1037 set_gdbarch_regset_from_core_section (gdbarch,
1038 arm_linux_regset_from_core_section);
4aa995e1
PA
1039
1040 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
cca44b1b
JB
1041
1042 /* Displaced stepping. */
1043 set_gdbarch_displaced_step_copy_insn (gdbarch,
1044 arm_linux_displaced_step_copy_insn);
1045 set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup);
1046 set_gdbarch_displaced_step_free_closure (gdbarch,
1047 simple_displaced_step_free_closure);
1048 set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point);
25b41d01
YQ
1049
1050
1051 tdep->syscall_next_pc = arm_linux_syscall_next_pc;
97e03143
RE
1052}
1053
63807e1d
PA
1054/* Provide a prototype to silence -Wmissing-prototypes. */
1055extern initialize_file_ftype _initialize_arm_linux_tdep;
1056
faf5f7ad
SB
1057void
1058_initialize_arm_linux_tdep (void)
1059{
05816f70
MK
1060 gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
1061 arm_linux_init_abi);
faf5f7ad 1062}
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