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1 | /* Common target dependent code for GDB on ARM systems. |
2 | Copyright 2002 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | /* Register numbers of various important registers. Note that some of | |
22 | these values are "real" register numbers, and correspond to the | |
23 | general registers of the machine, and some are "phony" register | |
24 | numbers which are too large to be actual register numbers as far as | |
25 | the user is concerned but do serve to get the desired values when | |
26 | passed to read_register. */ | |
27 | ||
28 | #define ARM_A1_REGNUM 0 /* first integer-like argument */ | |
29 | #define ARM_A4_REGNUM 3 /* last integer-like argument */ | |
30 | #define ARM_AP_REGNUM 11 | |
31 | #define ARM_SP_REGNUM 13 /* Contains address of top of stack */ | |
32 | #define ARM_LR_REGNUM 14 /* address to return to from a function call */ | |
33 | #define ARM_PC_REGNUM 15 /* Contains program counter */ | |
34 | #define ARM_F0_REGNUM 16 /* first floating point register */ | |
35 | #define ARM_F3_REGNUM 19 /* last floating point argument register */ | |
36 | #define ARM_F7_REGNUM 23 /* last floating point register */ | |
37 | #define ARM_FPS_REGNUM 24 /* floating point status register */ | |
38 | #define ARM_PS_REGNUM 25 /* Contains processor status */ | |
39 | ||
40 | #define ARM_FP_REGNUM 11 /* Frame register in ARM code, if used. */ | |
41 | #define THUMB_FP_REGNUM 7 /* Frame register in Thumb code, if used. */ | |
42 | ||
43 | #define ARM_NUM_ARG_REGS 4 | |
44 | #define ARM_LAST_ARG_REGNUM ARM_A4_REGNUM | |
45 | #define ARM_NUM_FP_ARG_REGS 4 | |
46 | #define ARM_LAST_FP_ARG_REGNUM ARM_F3_REGNUM | |
47 | ||
48 | /* Size of integer registers. */ | |
49 | #define INT_REGISTER_RAW_SIZE 4 | |
50 | #define INT_REGISTER_VIRTUAL_SIZE 4 | |
51 | ||
52 | /* Say how long FP registers are. Used for documentation purposes and | |
53 | code readability in this header. IEEE extended doubles are 80 | |
54 | bits. DWORD aligned they use 96 bits. */ | |
55 | #define FP_REGISTER_RAW_SIZE 12 | |
56 | ||
57 | /* GCC doesn't support long doubles (extended IEEE values). The FP | |
58 | register virtual size is therefore 64 bits. Used for documentation | |
59 | purposes and code readability in this header. */ | |
60 | #define FP_REGISTER_VIRTUAL_SIZE 8 | |
61 | ||
62 | /* Status registers are the same size as general purpose registers. | |
63 | Used for documentation purposes and code readability in this | |
64 | header. */ | |
65 | #define STATUS_REGISTER_SIZE 4 | |
66 | ||
67 | /* Number of machine registers. The only define actually required | |
68 | is NUM_REGS. The other definitions are used for documentation | |
69 | purposes and code readability. */ | |
70 | /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS) | |
71 | (and called PS for processor status) so the status bits can be cleared | |
72 | from the PC (register 15). For 32 bit ARM code, a copy of CPSR is placed | |
73 | in PS. */ | |
74 | #define NUM_FREGS 8 /* Number of floating point registers. */ | |
75 | #define NUM_SREGS 2 /* Number of status registers. */ | |
76 | #define NUM_GREGS 16 /* Number of general purpose registers. */ | |
77 | ||
78 | ||
79 | /* Instruction condition field values. */ | |
80 | #define INST_EQ 0x0 | |
81 | #define INST_NE 0x1 | |
82 | #define INST_CS 0x2 | |
83 | #define INST_CC 0x3 | |
84 | #define INST_MI 0x4 | |
85 | #define INST_PL 0x5 | |
86 | #define INST_VS 0x6 | |
87 | #define INST_VC 0x7 | |
88 | #define INST_HI 0x8 | |
89 | #define INST_LS 0x9 | |
90 | #define INST_GE 0xa | |
91 | #define INST_LT 0xb | |
92 | #define INST_GT 0xc | |
93 | #define INST_LE 0xd | |
94 | #define INST_AL 0xe | |
95 | #define INST_NV 0xf | |
96 | ||
97 | #define FLAG_N 0x80000000 | |
98 | #define FLAG_Z 0x40000000 | |
99 | #define FLAG_C 0x20000000 | |
100 | #define FLAG_V 0x10000000 | |
101 | ||
102 | /* Prototypes for internal interfaces needed by more than one MD file. */ | |
103 | int arm_pc_is_thumb_dummy (CORE_ADDR); | |
104 | ||
105 | int arm_pc_is_thumb (CORE_ADDR); | |
106 | ||
107 | CORE_ADDR thumb_get_next_pc (CORE_ADDR); | |
108 |