Commit | Line | Data |
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8818c391 | 1 | /* Target-dependent code for Atmel AVR, for GDB. |
51603483 | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
8818c391 TR |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
de18ac1f | 22 | /* Contributed by Theodore A. Roth, troth@openavr.org */ |
8818c391 TR |
23 | |
24 | /* Portions of this file were taken from the original gdb-4.18 patch developed | |
25 | by Denis Chertykov, denisc@overta.ru */ | |
26 | ||
27 | #include "defs.h" | |
4add8633 TR |
28 | #include "frame.h" |
29 | #include "frame-unwind.h" | |
30 | #include "frame-base.h" | |
31 | #include "trad-frame.h" | |
8818c391 TR |
32 | #include "gdbcmd.h" |
33 | #include "gdbcore.h" | |
34 | #include "inferior.h" | |
35 | #include "symfile.h" | |
36 | #include "arch-utils.h" | |
37 | #include "regcache.h" | |
5f8a3188 | 38 | #include "gdb_string.h" |
8818c391 TR |
39 | |
40 | /* AVR Background: | |
41 | ||
42 | (AVR micros are pure Harvard Architecture processors.) | |
43 | ||
44 | The AVR family of microcontrollers have three distinctly different memory | |
45 | spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for | |
46 | the most part to store program instructions. The sram is 8 bits wide and is | |
47 | used for the stack and the heap. Some devices lack sram and some can have | |
48 | an additional external sram added on as a peripheral. | |
49 | ||
50 | The eeprom is 8 bits wide and is used to store data when the device is | |
51 | powered down. Eeprom is not directly accessible, it can only be accessed | |
52 | via io-registers using a special algorithm. Accessing eeprom via gdb's | |
53 | remote serial protocol ('m' or 'M' packets) looks difficult to do and is | |
54 | not included at this time. | |
55 | ||
56 | [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or | |
57 | written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to | |
58 | work, the remote target must be able to handle eeprom accesses and perform | |
59 | the address translation.] | |
60 | ||
61 | All three memory spaces have physical addresses beginning at 0x0. In | |
62 | addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit | |
63 | bytes instead of the 16 bit wide words used by the real device for the | |
64 | Program Counter. | |
65 | ||
66 | In order for remote targets to work correctly, extra bits must be added to | |
67 | addresses before they are send to the target or received from the target | |
68 | via the remote serial protocol. The extra bits are the MSBs and are used to | |
69 | decode which memory space the address is referring to. */ | |
70 | ||
71 | #undef XMALLOC | |
72 | #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) | |
73 | ||
74 | #undef EXTRACT_INSN | |
75 | #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2) | |
76 | ||
77 | /* Constants: prefixed with AVR_ to avoid name space clashes */ | |
78 | ||
79 | enum | |
2e5ff58c TR |
80 | { |
81 | AVR_REG_W = 24, | |
82 | AVR_REG_X = 26, | |
83 | AVR_REG_Y = 28, | |
84 | AVR_FP_REGNUM = 28, | |
85 | AVR_REG_Z = 30, | |
86 | ||
87 | AVR_SREG_REGNUM = 32, | |
88 | AVR_SP_REGNUM = 33, | |
89 | AVR_PC_REGNUM = 34, | |
90 | ||
91 | AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, | |
92 | AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, | |
93 | ||
94 | AVR_PC_REG_INDEX = 35, /* index into array of registers */ | |
95 | ||
4add8633 | 96 | AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ |
2e5ff58c TR |
97 | |
98 | /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ | |
99 | AVR_MAX_PUSHES = 18, | |
100 | ||
101 | /* Number of the last pushed register. r17 for current avr-gcc */ | |
102 | AVR_LAST_PUSHED_REGNUM = 17, | |
103 | ||
4add8633 TR |
104 | AVR_ARG1_REGNUM = 24, /* Single byte argument */ |
105 | AVR_ARGN_REGNUM = 25, /* Multi byte argments */ | |
106 | ||
107 | AVR_RET1_REGNUM = 24, /* Single byte return value */ | |
108 | AVR_RETN_REGNUM = 25, /* Multi byte return value */ | |
109 | ||
2e5ff58c TR |
110 | /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 |
111 | bits? Do these have to match the bfd vma values?. It sure would make | |
112 | things easier in the future if they didn't need to match. | |
113 | ||
114 | Note: I chose these values so as to be consistent with bfd vma | |
115 | addresses. | |
116 | ||
117 | TRoth/2002-04-08: There is already a conflict with very large programs | |
118 | in the mega128. The mega128 has 128K instruction bytes (64K words), | |
119 | thus the Most Significant Bit is 0x10000 which gets masked off my | |
120 | AVR_MEM_MASK. | |
121 | ||
122 | The problem manifests itself when trying to set a breakpoint in a | |
123 | function which resides in the upper half of the instruction space and | |
124 | thus requires a 17-bit address. | |
125 | ||
126 | For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK | |
127 | from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, | |
128 | but could be for some remote targets by just adding the correct offset | |
129 | to the address and letting the remote target handle the low-level | |
130 | details of actually accessing the eeprom. */ | |
131 | ||
132 | AVR_IMEM_START = 0x00000000, /* INSN memory */ | |
133 | AVR_SMEM_START = 0x00800000, /* SRAM memory */ | |
8818c391 | 134 | #if 1 |
2e5ff58c TR |
135 | /* No eeprom mask defined */ |
136 | AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ | |
8818c391 | 137 | #else |
2e5ff58c TR |
138 | AVR_EMEM_START = 0x00810000, /* EEPROM memory */ |
139 | AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ | |
8818c391 | 140 | #endif |
2e5ff58c | 141 | }; |
8818c391 | 142 | |
4add8633 TR |
143 | /* Prologue types: |
144 | ||
145 | NORMAL and CALL are the typical types (the -mcall-prologues gcc option | |
146 | causes the generation of the CALL type prologues). */ | |
147 | ||
148 | enum { | |
149 | AVR_PROLOGUE_NONE, /* No prologue */ | |
150 | AVR_PROLOGUE_NORMAL, | |
151 | AVR_PROLOGUE_CALL, /* -mcall-prologues */ | |
152 | AVR_PROLOGUE_MAIN, | |
153 | AVR_PROLOGUE_INTR, /* interrupt handler */ | |
154 | AVR_PROLOGUE_SIG, /* signal handler */ | |
155 | }; | |
156 | ||
8818c391 TR |
157 | /* Any function with a frame looks like this |
158 | ....... <-SP POINTS HERE | |
159 | LOCALS1 <-FP POINTS HERE | |
160 | LOCALS0 | |
161 | SAVED FP | |
162 | SAVED R3 | |
163 | SAVED R2 | |
164 | RET PC | |
165 | FIRST ARG | |
166 | SECOND ARG */ | |
167 | ||
4add8633 | 168 | struct avr_unwind_cache |
2e5ff58c | 169 | { |
4add8633 TR |
170 | /* The previous frame's inner most stack address. Used as this |
171 | frame ID's stack_addr. */ | |
172 | CORE_ADDR prev_sp; | |
173 | /* The frame's base, optionally used by the high-level debug info. */ | |
174 | CORE_ADDR base; | |
175 | int size; | |
176 | int prologue_type; | |
177 | /* Table indicating the location of each and every register. */ | |
178 | struct trad_frame_saved_reg *saved_regs; | |
2e5ff58c | 179 | }; |
8818c391 TR |
180 | |
181 | struct gdbarch_tdep | |
2e5ff58c TR |
182 | { |
183 | /* FIXME: TRoth: is there anything to put here? */ | |
184 | int foo; | |
185 | }; | |
8818c391 TR |
186 | |
187 | /* Lookup the name of a register given it's number. */ | |
188 | ||
fa88f677 | 189 | static const char * |
8818c391 TR |
190 | avr_register_name (int regnum) |
191 | { | |
2e5ff58c TR |
192 | static char *register_names[] = { |
193 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
194 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
8818c391 TR |
195 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
196 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
197 | "SREG", "SP", "PC" | |
198 | }; | |
199 | if (regnum < 0) | |
200 | return NULL; | |
201 | if (regnum >= (sizeof (register_names) / sizeof (*register_names))) | |
202 | return NULL; | |
203 | return register_names[regnum]; | |
204 | } | |
205 | ||
8818c391 TR |
206 | /* Return the GDB type object for the "standard" data type |
207 | of data in register N. */ | |
208 | ||
209 | static struct type * | |
866b76ea | 210 | avr_register_type (struct gdbarch *gdbarch, int reg_nr) |
8818c391 | 211 | { |
866b76ea TR |
212 | if (reg_nr == AVR_PC_REGNUM) |
213 | return builtin_type_uint32; | |
866b76ea TR |
214 | if (reg_nr == AVR_SP_REGNUM) |
215 | return builtin_type_void_data_ptr; | |
216 | else | |
217 | return builtin_type_uint8; | |
8818c391 TR |
218 | } |
219 | ||
220 | /* Instruction address checks and convertions. */ | |
221 | ||
222 | static CORE_ADDR | |
223 | avr_make_iaddr (CORE_ADDR x) | |
224 | { | |
225 | return ((x) | AVR_IMEM_START); | |
226 | } | |
227 | ||
228 | static int | |
229 | avr_iaddr_p (CORE_ADDR x) | |
230 | { | |
231 | return (((x) & AVR_MEM_MASK) == AVR_IMEM_START); | |
232 | } | |
233 | ||
234 | /* FIXME: TRoth: Really need to use a larger mask for instructions. Some | |
235 | devices are already up to 128KBytes of flash space. | |
236 | ||
237 | TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ | |
238 | ||
239 | static CORE_ADDR | |
240 | avr_convert_iaddr_to_raw (CORE_ADDR x) | |
241 | { | |
242 | return ((x) & 0xffffffff); | |
243 | } | |
244 | ||
245 | /* SRAM address checks and convertions. */ | |
246 | ||
247 | static CORE_ADDR | |
248 | avr_make_saddr (CORE_ADDR x) | |
249 | { | |
250 | return ((x) | AVR_SMEM_START); | |
251 | } | |
252 | ||
253 | static int | |
254 | avr_saddr_p (CORE_ADDR x) | |
255 | { | |
256 | return (((x) & AVR_MEM_MASK) == AVR_SMEM_START); | |
257 | } | |
258 | ||
259 | static CORE_ADDR | |
260 | avr_convert_saddr_to_raw (CORE_ADDR x) | |
261 | { | |
262 | return ((x) & 0xffffffff); | |
263 | } | |
264 | ||
265 | /* EEPROM address checks and convertions. I don't know if these will ever | |
266 | actually be used, but I've added them just the same. TRoth */ | |
267 | ||
268 | /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large | |
269 | programs in the mega128. */ | |
270 | ||
271 | /* static CORE_ADDR */ | |
272 | /* avr_make_eaddr (CORE_ADDR x) */ | |
273 | /* { */ | |
274 | /* return ((x) | AVR_EMEM_START); */ | |
275 | /* } */ | |
276 | ||
277 | /* static int */ | |
278 | /* avr_eaddr_p (CORE_ADDR x) */ | |
279 | /* { */ | |
280 | /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ | |
281 | /* } */ | |
282 | ||
283 | /* static CORE_ADDR */ | |
284 | /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ | |
285 | /* { */ | |
286 | /* return ((x) & 0xffffffff); */ | |
287 | /* } */ | |
288 | ||
289 | /* Convert from address to pointer and vice-versa. */ | |
290 | ||
291 | static void | |
292 | avr_address_to_pointer (struct type *type, void *buf, CORE_ADDR addr) | |
293 | { | |
294 | /* Is it a code address? */ | |
295 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
296 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD) | |
297 | { | |
2e5ff58c | 298 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
4ea2465e | 299 | avr_convert_iaddr_to_raw (addr >> 1)); |
8818c391 TR |
300 | } |
301 | else | |
302 | { | |
303 | /* Strip off any upper segment bits. */ | |
2e5ff58c TR |
304 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
305 | avr_convert_saddr_to_raw (addr)); | |
8818c391 TR |
306 | } |
307 | } | |
308 | ||
309 | static CORE_ADDR | |
66140c26 | 310 | avr_pointer_to_address (struct type *type, const void *buf) |
8818c391 | 311 | { |
7c0b4a20 | 312 | CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type)); |
8818c391 | 313 | |
8818c391 TR |
314 | /* Is it a code address? */ |
315 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
316 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD | |
2e5ff58c | 317 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
4ea2465e | 318 | return avr_make_iaddr (addr << 1); |
8818c391 TR |
319 | else |
320 | return avr_make_saddr (addr); | |
321 | } | |
322 | ||
323 | static CORE_ADDR | |
324 | avr_read_pc (ptid_t ptid) | |
325 | { | |
326 | ptid_t save_ptid; | |
327 | CORE_ADDR pc; | |
328 | CORE_ADDR retval; | |
329 | ||
330 | save_ptid = inferior_ptid; | |
331 | inferior_ptid = ptid; | |
332 | pc = (int) read_register (AVR_PC_REGNUM); | |
333 | inferior_ptid = save_ptid; | |
334 | retval = avr_make_iaddr (pc); | |
335 | return retval; | |
336 | } | |
337 | ||
338 | static void | |
339 | avr_write_pc (CORE_ADDR val, ptid_t ptid) | |
340 | { | |
341 | ptid_t save_ptid; | |
342 | ||
343 | save_ptid = inferior_ptid; | |
344 | inferior_ptid = ptid; | |
345 | write_register (AVR_PC_REGNUM, avr_convert_iaddr_to_raw (val)); | |
346 | inferior_ptid = save_ptid; | |
347 | } | |
348 | ||
349 | static CORE_ADDR | |
350 | avr_read_sp (void) | |
351 | { | |
352 | return (avr_make_saddr (read_register (AVR_SP_REGNUM))); | |
353 | } | |
354 | ||
4add8633 TR |
355 | static int |
356 | avr_scan_arg_moves (int vpc, unsigned char *prologue) | |
8818c391 | 357 | { |
4add8633 | 358 | unsigned short insn; |
866b76ea | 359 | |
4add8633 TR |
360 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
361 | { | |
362 | insn = EXTRACT_INSN (&prologue[vpc]); | |
363 | if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ | |
364 | continue; | |
365 | else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ | |
366 | continue; | |
367 | else | |
368 | break; | |
369 | } | |
370 | ||
371 | return vpc; | |
8818c391 TR |
372 | } |
373 | ||
4add8633 | 374 | /* Function: avr_scan_prologue |
8818c391 | 375 | |
4add8633 | 376 | This function decodes an AVR function prologue to determine: |
8818c391 TR |
377 | 1) the size of the stack frame |
378 | 2) which registers are saved on it | |
379 | 3) the offsets of saved regs | |
4add8633 | 380 | This information is stored in the avr_unwind_cache structure. |
8818c391 | 381 | |
e3d8b004 TR |
382 | Some devices lack the sbiw instruction, so on those replace this: |
383 | sbiw r28, XX | |
384 | with this: | |
385 | subi r28,lo8(XX) | |
386 | sbci r29,hi8(XX) | |
387 | ||
388 | A typical AVR function prologue with a frame pointer might look like this: | |
389 | push rXX ; saved regs | |
390 | ... | |
391 | push r28 | |
392 | push r29 | |
393 | in r28,__SP_L__ | |
394 | in r29,__SP_H__ | |
395 | sbiw r28,<LOCALS_SIZE> | |
396 | in __tmp_reg__,__SREG__ | |
8818c391 | 397 | cli |
e3d8b004 | 398 | out __SP_H__,r29 |
72fab697 TR |
399 | out __SREG__,__tmp_reg__ |
400 | out __SP_L__,r28 | |
e3d8b004 TR |
401 | |
402 | A typical AVR function prologue without a frame pointer might look like | |
403 | this: | |
404 | push rXX ; saved regs | |
405 | ... | |
406 | ||
407 | A main function prologue looks like this: | |
408 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
409 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
410 | out __SP_H__,r29 | |
411 | out __SP_L__,r28 | |
412 | ||
413 | A signal handler prologue looks like this: | |
414 | push __zero_reg__ | |
415 | push __tmp_reg__ | |
416 | in __tmp_reg__, __SREG__ | |
417 | push __tmp_reg__ | |
418 | clr __zero_reg__ | |
419 | push rXX ; save registers r18:r27, r30:r31 | |
420 | ... | |
421 | push r28 ; save frame pointer | |
422 | push r29 | |
423 | in r28, __SP_L__ | |
424 | in r29, __SP_H__ | |
425 | sbiw r28, <LOCALS_SIZE> | |
426 | out __SP_H__, r29 | |
427 | out __SP_L__, r28 | |
428 | ||
429 | A interrupt handler prologue looks like this: | |
430 | sei | |
431 | push __zero_reg__ | |
432 | push __tmp_reg__ | |
433 | in __tmp_reg__, __SREG__ | |
434 | push __tmp_reg__ | |
435 | clr __zero_reg__ | |
436 | push rXX ; save registers r18:r27, r30:r31 | |
437 | ... | |
438 | push r28 ; save frame pointer | |
439 | push r29 | |
440 | in r28, __SP_L__ | |
441 | in r29, __SP_H__ | |
442 | sbiw r28, <LOCALS_SIZE> | |
443 | cli | |
444 | out __SP_H__, r29 | |
445 | sei | |
446 | out __SP_L__, r28 | |
447 | ||
448 | A `-mcall-prologues' prologue looks like this (Note that the megas use a | |
449 | jmp instead of a rjmp, thus the prologue is one word larger since jmp is a | |
450 | 32 bit insn and rjmp is a 16 bit insn): | |
451 | ldi r26,lo8(<LOCALS_SIZE>) | |
452 | ldi r27,hi8(<LOCALS_SIZE>) | |
453 | ldi r30,pm_lo8(.L_foo_body) | |
454 | ldi r31,pm_hi8(.L_foo_body) | |
455 | rjmp __prologue_saves__+RRR | |
456 | .L_foo_body: */ | |
8818c391 | 457 | |
4add8633 TR |
458 | /* Not really part of a prologue, but still need to scan for it, is when a |
459 | function prologue moves values passed via registers as arguments to new | |
460 | registers. In this case, all local variables live in registers, so there | |
461 | may be some register saves. This is what it looks like: | |
462 | movw rMM, rNN | |
463 | ... | |
464 | ||
465 | There could be multiple movw's. If the target doesn't have a movw insn, it | |
466 | will use two mov insns. This could be done after any of the above prologue | |
467 | types. */ | |
468 | ||
469 | static CORE_ADDR | |
470 | avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info) | |
8818c391 | 471 | { |
2e5ff58c TR |
472 | int i; |
473 | unsigned short insn; | |
2e5ff58c | 474 | int scan_stage = 0; |
8818c391 | 475 | struct minimal_symbol *msymbol; |
8818c391 TR |
476 | unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; |
477 | int vpc = 0; | |
478 | ||
4add8633 TR |
479 | /* FIXME: TRoth/2003-06-11: This could be made more efficient by only |
480 | reading in the bytes of the prologue. The problem is that the figuring | |
481 | out where the end of the prologue is is a bit difficult. The old code | |
482 | tried to do that, but failed quite often. */ | |
483 | read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE); | |
8818c391 TR |
484 | |
485 | /* Scanning main()'s prologue | |
486 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
487 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
488 | out __SP_H__,r29 | |
489 | out __SP_L__,r28 */ | |
490 | ||
4add8633 | 491 | if (1) |
8818c391 TR |
492 | { |
493 | CORE_ADDR locals; | |
2e5ff58c TR |
494 | unsigned char img[] = { |
495 | 0xde, 0xbf, /* out __SP_H__,r29 */ | |
496 | 0xcd, 0xbf /* out __SP_L__,r28 */ | |
8818c391 TR |
497 | }; |
498 | ||
8818c391 TR |
499 | insn = EXTRACT_INSN (&prologue[vpc]); |
500 | /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ | |
2e5ff58c TR |
501 | if ((insn & 0xf0f0) == 0xe0c0) |
502 | { | |
503 | locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); | |
504 | insn = EXTRACT_INSN (&prologue[vpc + 2]); | |
505 | /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ | |
506 | if ((insn & 0xf0f0) == 0xe0d0) | |
507 | { | |
508 | locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; | |
509 | if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) | |
510 | { | |
4add8633 TR |
511 | info->prologue_type = AVR_PROLOGUE_MAIN; |
512 | info->base = locals; | |
513 | return pc + 4; | |
2e5ff58c TR |
514 | } |
515 | } | |
516 | } | |
8818c391 | 517 | } |
2e5ff58c | 518 | |
4add8633 TR |
519 | /* Scanning `-mcall-prologues' prologue |
520 | Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ | |
8818c391 | 521 | |
e3d8b004 | 522 | while (1) /* Using a while to avoid many goto's */ |
8818c391 TR |
523 | { |
524 | int loc_size; | |
525 | int body_addr; | |
526 | unsigned num_pushes; | |
4add8633 | 527 | int pc_offset = 0; |
2e5ff58c | 528 | |
8818c391 TR |
529 | insn = EXTRACT_INSN (&prologue[vpc]); |
530 | /* ldi r26,<LOCALS_SIZE> */ | |
2e5ff58c TR |
531 | if ((insn & 0xf0f0) != 0xe0a0) |
532 | break; | |
8818c391 | 533 | loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 534 | pc_offset += 2; |
2e5ff58c | 535 | |
8818c391 TR |
536 | insn = EXTRACT_INSN (&prologue[vpc + 2]); |
537 | /* ldi r27,<LOCALS_SIZE> / 256 */ | |
538 | if ((insn & 0xf0f0) != 0xe0b0) | |
2e5ff58c | 539 | break; |
8818c391 | 540 | loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 541 | pc_offset += 2; |
2e5ff58c | 542 | |
8818c391 TR |
543 | insn = EXTRACT_INSN (&prologue[vpc + 4]); |
544 | /* ldi r30,pm_lo8(.L_foo_body) */ | |
545 | if ((insn & 0xf0f0) != 0xe0e0) | |
2e5ff58c | 546 | break; |
8818c391 | 547 | body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 548 | pc_offset += 2; |
8818c391 TR |
549 | |
550 | insn = EXTRACT_INSN (&prologue[vpc + 6]); | |
551 | /* ldi r31,pm_hi8(.L_foo_body) */ | |
552 | if ((insn & 0xf0f0) != 0xe0f0) | |
2e5ff58c | 553 | break; |
8818c391 | 554 | body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 555 | pc_offset += 2; |
8818c391 | 556 | |
8818c391 TR |
557 | msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); |
558 | if (!msymbol) | |
2e5ff58c | 559 | break; |
8818c391 | 560 | |
8818c391 TR |
561 | insn = EXTRACT_INSN (&prologue[vpc + 8]); |
562 | /* rjmp __prologue_saves__+RRR */ | |
e3d8b004 TR |
563 | if ((insn & 0xf000) == 0xc000) |
564 | { | |
565 | /* Extract PC relative offset from RJMP */ | |
566 | i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); | |
567 | /* Convert offset to byte addressable mode */ | |
568 | i *= 2; | |
569 | /* Destination address */ | |
4add8633 | 570 | i += pc + 10; |
e3d8b004 | 571 | |
4add8633 | 572 | if (body_addr != (pc + 10)/2) |
e3d8b004 | 573 | break; |
4add8633 TR |
574 | |
575 | pc_offset += 2; | |
e3d8b004 | 576 | } |
e3d8b004 TR |
577 | else if ((insn & 0xfe0e) == 0x940c) |
578 | { | |
579 | /* Extract absolute PC address from JMP */ | |
580 | i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) | |
581 | | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff)); | |
582 | /* Convert address to byte addressable mode */ | |
583 | i *= 2; | |
584 | ||
4add8633 | 585 | if (body_addr != (pc + 12)/2) |
e3d8b004 | 586 | break; |
4add8633 TR |
587 | |
588 | pc_offset += 4; | |
e3d8b004 TR |
589 | } |
590 | else | |
591 | break; | |
2e5ff58c | 592 | |
4add8633 | 593 | /* Resolve offset (in words) from __prologue_saves__ symbol. |
8818c391 TR |
594 | Which is a pushes count in `-mcall-prologues' mode */ |
595 | num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2; | |
596 | ||
597 | if (num_pushes > AVR_MAX_PUSHES) | |
4add8633 TR |
598 | { |
599 | fprintf_unfiltered (gdb_stderr, "Num pushes too large: %d\n", | |
600 | num_pushes); | |
601 | num_pushes = 0; | |
602 | } | |
2e5ff58c | 603 | |
8818c391 | 604 | if (num_pushes) |
2e5ff58c TR |
605 | { |
606 | int from; | |
4add8633 TR |
607 | |
608 | info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes; | |
2e5ff58c | 609 | if (num_pushes >= 2) |
4add8633 TR |
610 | info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1; |
611 | ||
2e5ff58c TR |
612 | i = 0; |
613 | for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); | |
614 | from <= AVR_LAST_PUSHED_REGNUM; ++from) | |
4add8633 | 615 | info->saved_regs [from].addr = ++i; |
2e5ff58c | 616 | } |
4add8633 TR |
617 | info->size = loc_size + num_pushes; |
618 | info->prologue_type = AVR_PROLOGUE_CALL; | |
619 | ||
620 | return pc + pc_offset; | |
8818c391 TR |
621 | } |
622 | ||
4add8633 TR |
623 | /* Scan for the beginning of the prologue for an interrupt or signal |
624 | function. Note that we have to set the prologue type here since the | |
625 | third stage of the prologue may not be present (e.g. no saved registered | |
626 | or changing of the SP register). */ | |
8818c391 | 627 | |
4add8633 | 628 | if (1) |
8818c391 | 629 | { |
2e5ff58c TR |
630 | unsigned char img[] = { |
631 | 0x78, 0x94, /* sei */ | |
632 | 0x1f, 0x92, /* push r1 */ | |
633 | 0x0f, 0x92, /* push r0 */ | |
634 | 0x0f, 0xb6, /* in r0,0x3f SREG */ | |
635 | 0x0f, 0x92, /* push r0 */ | |
636 | 0x11, 0x24 /* clr r1 */ | |
8818c391 TR |
637 | }; |
638 | if (memcmp (prologue, img, sizeof (img)) == 0) | |
2e5ff58c | 639 | { |
4add8633 | 640 | info->prologue_type = AVR_PROLOGUE_INTR; |
2e5ff58c | 641 | vpc += sizeof (img); |
4add8633 TR |
642 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; |
643 | info->saved_regs[0].addr = 2; | |
644 | info->saved_regs[1].addr = 1; | |
645 | info->size += 3; | |
2e5ff58c | 646 | } |
4add8633 | 647 | else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0) |
2e5ff58c | 648 | { |
4add8633 TR |
649 | info->prologue_type = AVR_PROLOGUE_SIG; |
650 | vpc += sizeof (img) - 2; | |
651 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; | |
652 | info->saved_regs[0].addr = 2; | |
653 | info->saved_regs[1].addr = 1; | |
654 | info->size += 3; | |
2e5ff58c | 655 | } |
8818c391 TR |
656 | } |
657 | ||
658 | /* First stage of the prologue scanning. | |
4add8633 | 659 | Scan pushes (saved registers) */ |
8818c391 | 660 | |
4add8633 | 661 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
8818c391 TR |
662 | { |
663 | insn = EXTRACT_INSN (&prologue[vpc]); | |
2e5ff58c TR |
664 | if ((insn & 0xfe0f) == 0x920f) /* push rXX */ |
665 | { | |
666 | /* Bits 4-9 contain a mask for registers R0-R32. */ | |
4add8633 TR |
667 | int regno = (insn & 0x1f0) >> 4; |
668 | info->size++; | |
669 | info->saved_regs[regno].addr = info->size; | |
2e5ff58c TR |
670 | scan_stage = 1; |
671 | } | |
8818c391 | 672 | else |
2e5ff58c | 673 | break; |
8818c391 TR |
674 | } |
675 | ||
4add8633 TR |
676 | if (vpc >= AVR_MAX_PROLOGUE_SIZE) |
677 | fprintf_unfiltered (gdb_stderr, | |
678 | "Hit end of prologue while scanning pushes\n"); | |
679 | ||
8818c391 TR |
680 | /* Second stage of the prologue scanning. |
681 | Scan: | |
682 | in r28,__SP_L__ | |
683 | in r29,__SP_H__ */ | |
684 | ||
4add8633 | 685 | if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE) |
8818c391 | 686 | { |
2e5ff58c TR |
687 | unsigned char img[] = { |
688 | 0xcd, 0xb7, /* in r28,__SP_L__ */ | |
689 | 0xde, 0xb7 /* in r29,__SP_H__ */ | |
8818c391 TR |
690 | }; |
691 | unsigned short insn1; | |
2e5ff58c | 692 | |
8818c391 | 693 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) |
2e5ff58c TR |
694 | { |
695 | vpc += 4; | |
2e5ff58c TR |
696 | scan_stage = 2; |
697 | } | |
8818c391 TR |
698 | } |
699 | ||
700 | /* Third stage of the prologue scanning. (Really two stages) | |
701 | Scan for: | |
702 | sbiw r28,XX or subi r28,lo8(XX) | |
72fab697 | 703 | sbci r29,hi8(XX) |
8818c391 TR |
704 | in __tmp_reg__,__SREG__ |
705 | cli | |
e3d8b004 | 706 | out __SP_H__,r29 |
8818c391 | 707 | out __SREG__,__tmp_reg__ |
e3d8b004 | 708 | out __SP_L__,r28 */ |
8818c391 | 709 | |
4add8633 | 710 | if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE) |
8818c391 TR |
711 | { |
712 | int locals_size = 0; | |
2e5ff58c TR |
713 | unsigned char img[] = { |
714 | 0x0f, 0xb6, /* in r0,0x3f */ | |
715 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 716 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 717 | 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ |
e3d8b004 | 718 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 719 | }; |
2e5ff58c | 720 | unsigned char img_sig[] = { |
e3d8b004 TR |
721 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
722 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ | |
8818c391 | 723 | }; |
2e5ff58c TR |
724 | unsigned char img_int[] = { |
725 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 726 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 727 | 0x78, 0x94, /* sei */ |
e3d8b004 | 728 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 729 | }; |
2e5ff58c | 730 | |
8818c391 TR |
731 | insn = EXTRACT_INSN (&prologue[vpc]); |
732 | vpc += 2; | |
2e5ff58c TR |
733 | if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ |
734 | locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); | |
735 | else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ | |
736 | { | |
737 | locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); | |
738 | insn = EXTRACT_INSN (&prologue[vpc]); | |
739 | vpc += 2; | |
740 | locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8); | |
741 | } | |
8818c391 | 742 | else |
4add8633 TR |
743 | return pc + vpc; |
744 | ||
745 | /* Scan the last part of the prologue. May not be present for interrupt | |
746 | or signal handler functions, which is why we set the prologue type | |
747 | when we saw the beginning of the prologue previously. */ | |
748 | ||
749 | if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) | |
750 | { | |
751 | vpc += sizeof (img_sig); | |
752 | } | |
753 | else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) | |
754 | { | |
755 | vpc += sizeof (img_int); | |
756 | } | |
757 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
758 | { | |
759 | info->prologue_type = AVR_PROLOGUE_NORMAL; | |
760 | vpc += sizeof (img); | |
761 | } | |
762 | ||
763 | info->size += locals_size; | |
764 | ||
765 | return pc + avr_scan_arg_moves (vpc, prologue); | |
8818c391 | 766 | } |
4add8633 TR |
767 | |
768 | /* If we got this far, we could not scan the prologue, so just return the pc | |
769 | of the frame plus an adjustment for argument move insns. */ | |
770 | ||
771 | return pc + avr_scan_arg_moves (vpc, prologue);; | |
8818c391 TR |
772 | } |
773 | ||
4add8633 | 774 | /* Returns the return address for a dummy. */ |
8818c391 | 775 | |
4add8633 TR |
776 | static CORE_ADDR |
777 | avr_call_dummy_address (void) | |
8818c391 | 778 | { |
4add8633 TR |
779 | return entry_point_address (); |
780 | } | |
8818c391 | 781 | |
4add8633 TR |
782 | static CORE_ADDR |
783 | avr_skip_prologue (CORE_ADDR pc) | |
784 | { | |
785 | CORE_ADDR func_addr, func_end; | |
786 | CORE_ADDR prologue_end = pc; | |
8818c391 | 787 | |
4add8633 | 788 | /* See what the symbol table says */ |
8818c391 | 789 | |
4add8633 TR |
790 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
791 | { | |
792 | struct symtab_and_line sal; | |
793 | struct avr_unwind_cache info = {0}; | |
794 | struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; | |
2e5ff58c | 795 | |
4add8633 | 796 | info.saved_regs = saved_regs; |
8818c391 | 797 | |
4add8633 TR |
798 | /* Need to run the prologue scanner to figure out if the function has a |
799 | prologue and possibly skip over moving arguments passed via registers | |
800 | to other registers. */ | |
2e5ff58c | 801 | |
4add8633 | 802 | prologue_end = avr_scan_prologue (pc, &info); |
8818c391 | 803 | |
4add8633 TR |
804 | if (info.prologue_type != AVR_PROLOGUE_NONE) |
805 | { | |
806 | sal = find_pc_line (func_addr, 0); | |
8818c391 | 807 | |
4add8633 TR |
808 | if (sal.line != 0 && sal.end < func_end) |
809 | return sal.end; | |
810 | } | |
811 | } | |
2e5ff58c | 812 | |
4add8633 TR |
813 | /* Either we didn't find the start of this function (nothing we can do), |
814 | or there's no line info, or the line after the prologue is after | |
815 | the end of the function (there probably isn't a prologue). */ | |
2e5ff58c | 816 | |
4add8633 TR |
817 | return prologue_end; |
818 | } | |
8818c391 | 819 | |
4add8633 TR |
820 | /* Not all avr devices support the BREAK insn. Those that don't should treat |
821 | it as a NOP. Thus, it should be ok. Since the avr is currently a remote | |
822 | only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ | |
8818c391 | 823 | |
4add8633 TR |
824 | static const unsigned char * |
825 | avr_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr) | |
826 | { | |
827 | static unsigned char avr_break_insn [] = { 0x98, 0x95 }; | |
828 | *lenptr = sizeof (avr_break_insn); | |
829 | return avr_break_insn; | |
8818c391 TR |
830 | } |
831 | ||
4add8633 TR |
832 | /* Given a return value in `regbuf' with a type `valtype', |
833 | extract and copy its value into `valbuf'. | |
834 | ||
835 | Return values are always passed via registers r25:r24:... */ | |
8818c391 TR |
836 | |
837 | static void | |
4add8633 TR |
838 | avr_extract_return_value (struct type *type, struct regcache *regcache, |
839 | void *valbuf) | |
8818c391 | 840 | { |
4add8633 TR |
841 | ULONGEST r24, r25; |
842 | ULONGEST c; | |
843 | int len; | |
844 | if (TYPE_LENGTH (type) == 1) | |
8818c391 | 845 | { |
4add8633 TR |
846 | regcache_cooked_read_unsigned (regcache, 24, &c); |
847 | store_unsigned_integer (valbuf, 1, c); | |
8818c391 TR |
848 | } |
849 | else | |
850 | { | |
4add8633 TR |
851 | int i; |
852 | /* The MSB of the return value is always in r25, calculate which | |
853 | register holds the LSB. */ | |
854 | int lsb_reg = 25 - TYPE_LENGTH (type) + 1; | |
8818c391 | 855 | |
4add8633 TR |
856 | for (i=0; i< TYPE_LENGTH (type); i++) |
857 | { | |
858 | regcache_cooked_read (regcache, lsb_reg + i, | |
859 | (bfd_byte *) valbuf + i); | |
4add8633 TR |
860 | } |
861 | } | |
862 | } | |
8818c391 | 863 | |
4add8633 TR |
864 | static void |
865 | avr_saved_regs_unwinder (struct frame_info *next_frame, | |
866 | struct trad_frame_saved_reg *this_saved_regs, | |
867 | int regnum, int *optimizedp, | |
868 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
869 | int *realnump, void *bufferp) | |
870 | { | |
871 | if (this_saved_regs[regnum].addr != 0) | |
872 | { | |
873 | *optimizedp = 0; | |
874 | *lvalp = lval_memory; | |
875 | *addrp = this_saved_regs[regnum].addr; | |
876 | *realnump = -1; | |
877 | if (bufferp != NULL) | |
878 | { | |
879 | /* Read the value in from memory. */ | |
880 | ||
881 | if (regnum == AVR_PC_REGNUM) | |
882 | { | |
883 | /* Reading the return PC from the PC register is slightly | |
884 | abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, | |
885 | but in reality, only two bytes (3 in upcoming mega256) are | |
886 | stored on the stack. | |
887 | ||
888 | Also, note that the value on the stack is an addr to a word | |
889 | not a byte, so we will need to multiply it by two at some | |
890 | point. | |
891 | ||
892 | And to confuse matters even more, the return address stored | |
893 | on the stack is in big endian byte order, even though most | |
894 | everything else about the avr is little endian. Ick! */ | |
895 | ||
896 | /* FIXME: number of bytes read here will need updated for the | |
897 | mega256 when it is available. */ | |
898 | ||
899 | ULONGEST pc; | |
900 | unsigned char tmp; | |
901 | unsigned char buf[2]; | |
902 | ||
903 | read_memory (this_saved_regs[regnum].addr, buf, 2); | |
904 | ||
905 | /* Convert the PC read from memory as a big-endian to | |
906 | little-endian order. */ | |
907 | tmp = buf[0]; | |
908 | buf[0] = buf[1]; | |
909 | buf[1] = tmp; | |
910 | ||
911 | pc = (extract_unsigned_integer (buf, 2) * 2); | |
912 | store_unsigned_integer (bufferp, | |
913 | register_size (current_gdbarch, regnum), | |
914 | pc); | |
915 | } | |
916 | else | |
917 | { | |
918 | read_memory (this_saved_regs[regnum].addr, bufferp, | |
919 | register_size (current_gdbarch, regnum)); | |
920 | } | |
921 | } | |
922 | ||
923 | return; | |
8818c391 | 924 | } |
4add8633 TR |
925 | |
926 | /* No luck, assume this and the next frame have the same register | |
927 | value. If a value is needed, pass the request on down the chain; | |
928 | otherwise just return an indication that the value is in the same | |
929 | register as the next frame. */ | |
930 | frame_register_unwind (next_frame, regnum, optimizedp, lvalp, addrp, | |
931 | realnump, bufferp); | |
8818c391 TR |
932 | } |
933 | ||
4add8633 TR |
934 | /* Put here the code to store, into fi->saved_regs, the addresses of |
935 | the saved registers of frame described by FRAME_INFO. This | |
936 | includes special registers such as pc and fp saved in special ways | |
937 | in the stack frame. sp is even more special: the address we return | |
938 | for it IS the sp for the next frame. */ | |
8818c391 | 939 | |
4add8633 TR |
940 | struct avr_unwind_cache * |
941 | avr_frame_unwind_cache (struct frame_info *next_frame, | |
942 | void **this_prologue_cache) | |
8818c391 | 943 | { |
4add8633 TR |
944 | CORE_ADDR pc; |
945 | ULONGEST prev_sp; | |
946 | ULONGEST this_base; | |
947 | struct avr_unwind_cache *info; | |
948 | int i; | |
949 | ||
950 | if ((*this_prologue_cache)) | |
951 | return (*this_prologue_cache); | |
952 | ||
953 | info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); | |
954 | (*this_prologue_cache) = info; | |
955 | info->saved_regs = trad_frame_alloc_saved_regs (next_frame); | |
956 | ||
957 | info->size = 0; | |
958 | info->prologue_type = AVR_PROLOGUE_NONE; | |
959 | ||
960 | pc = frame_func_unwind (next_frame); | |
961 | ||
962 | if ((pc > 0) && (pc < frame_pc_unwind (next_frame))) | |
963 | avr_scan_prologue (pc, info); | |
964 | ||
965 | if (info->prologue_type != AVR_PROLOGUE_NONE) | |
966 | { | |
967 | ULONGEST high_base; /* High byte of FP */ | |
968 | ||
969 | /* The SP was moved to the FP. This indicates that a new frame | |
970 | was created. Get THIS frame's FP value by unwinding it from | |
971 | the next frame. */ | |
972 | frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM, &this_base); | |
973 | frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM+1, &high_base); | |
974 | this_base += (high_base << 8); | |
975 | ||
976 | /* The FP points at the last saved register. Adjust the FP back | |
977 | to before the first saved register giving the SP. */ | |
978 | prev_sp = this_base + info->size; | |
979 | } | |
8818c391 | 980 | else |
4add8633 TR |
981 | { |
982 | /* Assume that the FP is this frame's SP but with that pushed | |
983 | stack space added back. */ | |
984 | frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &this_base); | |
985 | prev_sp = this_base + info->size; | |
986 | } | |
987 | ||
988 | /* Add 1 here to adjust for the post-decrement nature of the push | |
989 | instruction.*/ | |
990 | info->prev_sp = avr_make_saddr (prev_sp+1); | |
991 | ||
992 | info->base = avr_make_saddr (this_base); | |
993 | ||
994 | /* Adjust all the saved registers so that they contain addresses and not | |
995 | offsets. We need to add one to the addresses since push ops are post | |
996 | decrement on the avr. */ | |
997 | for (i = 0; i < NUM_REGS - 1; i++) | |
998 | if (info->saved_regs[i].addr) | |
999 | { | |
1000 | info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr); | |
1001 | } | |
1002 | ||
1003 | /* Except for the main and startup code, the return PC is always saved on | |
1004 | the stack and is at the base of the frame. */ | |
1005 | ||
1006 | if (info->prologue_type != AVR_PROLOGUE_MAIN) | |
1007 | { | |
1008 | info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp; | |
1009 | } | |
1010 | ||
1011 | return info; | |
8818c391 TR |
1012 | } |
1013 | ||
1014 | static CORE_ADDR | |
4add8633 | 1015 | avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
8818c391 | 1016 | { |
4add8633 TR |
1017 | ULONGEST pc; |
1018 | ||
1019 | frame_unwind_unsigned_register (next_frame, AVR_PC_REGNUM, &pc); | |
1020 | ||
1021 | return avr_make_iaddr (pc); | |
8818c391 TR |
1022 | } |
1023 | ||
4add8633 TR |
1024 | /* Given a GDB frame, determine the address of the calling function's |
1025 | frame. This will be used to create a new GDB frame struct. */ | |
8818c391 | 1026 | |
4add8633 TR |
1027 | static void |
1028 | avr_frame_this_id (struct frame_info *next_frame, | |
1029 | void **this_prologue_cache, | |
1030 | struct frame_id *this_id) | |
8818c391 | 1031 | { |
4add8633 TR |
1032 | struct avr_unwind_cache *info |
1033 | = avr_frame_unwind_cache (next_frame, this_prologue_cache); | |
1034 | CORE_ADDR base; | |
1035 | CORE_ADDR func; | |
1036 | struct frame_id id; | |
1037 | ||
1038 | /* The FUNC is easy. */ | |
1039 | func = frame_func_unwind (next_frame); | |
1040 | ||
1041 | /* This is meant to halt the backtrace at "_start". Make sure we | |
1042 | don't halt it at a generic dummy frame. */ | |
1043 | if (inside_entry_file (func)) | |
1044 | return; | |
1045 | ||
1046 | /* Hopefully the prologue analysis either correctly determined the | |
1047 | frame's base (which is the SP from the previous frame), or set | |
1048 | that base to "NULL". */ | |
1049 | base = info->prev_sp; | |
1050 | if (base == 0) | |
1051 | return; | |
1052 | ||
1053 | id = frame_id_build (base, func); | |
1054 | ||
1055 | /* Check that we're not going round in circles with the same frame | |
1056 | ID (but avoid applying the test to sentinel frames which do go | |
1057 | round in circles). Can't use frame_id_eq() as that doesn't yet | |
1058 | compare the frame's PC value. */ | |
1059 | if (frame_relative_level (next_frame) >= 0 | |
1060 | && get_frame_type (next_frame) != DUMMY_FRAME | |
1061 | && frame_id_eq (get_frame_id (next_frame), id)) | |
1062 | return; | |
1063 | ||
1064 | (*this_id) = id; | |
8818c391 TR |
1065 | } |
1066 | ||
4add8633 TR |
1067 | static void |
1068 | avr_frame_prev_register (struct frame_info *next_frame, | |
1069 | void **this_prologue_cache, | |
1070 | int regnum, int *optimizedp, | |
1071 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1072 | int *realnump, void *bufferp) | |
8818c391 | 1073 | { |
4add8633 TR |
1074 | struct avr_unwind_cache *info |
1075 | = avr_frame_unwind_cache (next_frame, this_prologue_cache); | |
8818c391 | 1076 | |
4add8633 TR |
1077 | avr_saved_regs_unwinder (next_frame, info->saved_regs, regnum, optimizedp, |
1078 | lvalp, addrp, realnump, bufferp); | |
1079 | } | |
8818c391 | 1080 | |
4add8633 TR |
1081 | static const struct frame_unwind avr_frame_unwind = { |
1082 | NORMAL_FRAME, | |
1083 | avr_frame_this_id, | |
1084 | avr_frame_prev_register | |
1085 | }; | |
1086 | ||
1087 | const struct frame_unwind * | |
1088 | avr_frame_p (CORE_ADDR pc) | |
1089 | { | |
1090 | return &avr_frame_unwind; | |
8818c391 TR |
1091 | } |
1092 | ||
1093 | static CORE_ADDR | |
4add8633 | 1094 | avr_frame_base_address (struct frame_info *next_frame, void **this_cache) |
8818c391 | 1095 | { |
4add8633 TR |
1096 | struct avr_unwind_cache *info |
1097 | = avr_frame_unwind_cache (next_frame, this_cache); | |
8818c391 | 1098 | |
4add8633 TR |
1099 | return info->base; |
1100 | } | |
8818c391 | 1101 | |
4add8633 TR |
1102 | static const struct frame_base avr_frame_base = { |
1103 | &avr_frame_unwind, | |
1104 | avr_frame_base_address, | |
1105 | avr_frame_base_address, | |
1106 | avr_frame_base_address | |
1107 | }; | |
ced15480 | 1108 | |
4add8633 TR |
1109 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1110 | dummy frame. The frame ID's base needs to match the TOS value | |
1111 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1112 | breakpoint. */ | |
8818c391 | 1113 | |
4add8633 TR |
1114 | static struct frame_id |
1115 | avr_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1116 | { | |
1117 | ULONGEST base; | |
8818c391 | 1118 | |
4add8633 TR |
1119 | frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &base); |
1120 | return frame_id_build (avr_make_saddr (base), frame_pc_unwind (next_frame)); | |
8818c391 TR |
1121 | } |
1122 | ||
4add8633 TR |
1123 | /* When arguments must be pushed onto the stack, they go on in reverse |
1124 | order. The below implements a FILO (stack) to do this. */ | |
8818c391 | 1125 | |
4add8633 TR |
1126 | struct stack_item |
1127 | { | |
1128 | int len; | |
1129 | struct stack_item *prev; | |
1130 | void *data; | |
1131 | }; | |
8818c391 | 1132 | |
4add8633 TR |
1133 | static struct stack_item *push_stack_item (struct stack_item *prev, |
1134 | void *contents, int len); | |
1135 | static struct stack_item * | |
1136 | push_stack_item (struct stack_item *prev, void *contents, int len) | |
8818c391 | 1137 | { |
4add8633 TR |
1138 | struct stack_item *si; |
1139 | si = xmalloc (sizeof (struct stack_item)); | |
1140 | si->data = xmalloc (len); | |
1141 | si->len = len; | |
1142 | si->prev = prev; | |
1143 | memcpy (si->data, contents, len); | |
1144 | return si; | |
8818c391 TR |
1145 | } |
1146 | ||
4add8633 TR |
1147 | static struct stack_item *pop_stack_item (struct stack_item *si); |
1148 | static struct stack_item * | |
1149 | pop_stack_item (struct stack_item *si) | |
8818c391 | 1150 | { |
4add8633 TR |
1151 | struct stack_item *dead = si; |
1152 | si = si->prev; | |
1153 | xfree (dead->data); | |
1154 | xfree (dead); | |
1155 | return si; | |
8818c391 TR |
1156 | } |
1157 | ||
8818c391 TR |
1158 | /* Setup the function arguments for calling a function in the inferior. |
1159 | ||
1160 | On the AVR architecture, there are 18 registers (R25 to R8) which are | |
1161 | dedicated for passing function arguments. Up to the first 18 arguments | |
1162 | (depending on size) may go into these registers. The rest go on the stack. | |
1163 | ||
4add8633 TR |
1164 | All arguments are aligned to start in even-numbered registers (odd-sized |
1165 | arguments, including char, have one free register above them). For example, | |
1166 | an int in arg1 and a char in arg2 would be passed as such: | |
1167 | ||
1168 | arg1 -> r25:r24 | |
1169 | arg2 -> r22 | |
1170 | ||
1171 | Arguments that are larger than 2 bytes will be split between two or more | |
1172 | registers as available, but will NOT be split between a register and the | |
1173 | stack. Arguments that go onto the stack are pushed last arg first (this is | |
1174 | similar to the d10v). */ | |
1175 | ||
1176 | /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be | |
1177 | inaccurate. | |
8818c391 TR |
1178 | |
1179 | An exceptional case exists for struct arguments (and possibly other | |
1180 | aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but | |
1181 | not a multiple of WORDSIZE bytes. In this case the argument is never split | |
1182 | between the registers and the stack, but instead is copied in its entirety | |
1183 | onto the stack, AND also copied into as many registers as there is room | |
1184 | for. In other words, space in registers permitting, two copies of the same | |
1185 | argument are passed in. As far as I can tell, only the one on the stack is | |
1186 | used, although that may be a function of the level of compiler | |
1187 | optimization. I suspect this is a compiler bug. Arguments of these odd | |
1188 | sizes are left-justified within the word (as opposed to arguments smaller | |
1189 | than WORDSIZE bytes, which are right-justified). | |
1190 | ||
1191 | If the function is to return an aggregate type such as a struct, the caller | |
1192 | must allocate space into which the callee will copy the return value. In | |
1193 | this case, a pointer to the return value location is passed into the callee | |
1194 | in register R0, which displaces one of the other arguments passed in via | |
1195 | registers R0 to R2. */ | |
1196 | ||
1197 | static CORE_ADDR | |
4add8633 TR |
1198 | avr_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1199 | struct regcache *regcache, CORE_ADDR bp_addr, | |
1200 | int nargs, struct value **args, CORE_ADDR sp, | |
1201 | int struct_return, CORE_ADDR struct_addr) | |
8818c391 | 1202 | { |
4add8633 TR |
1203 | int i; |
1204 | unsigned char buf[2]; | |
1205 | CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); | |
1206 | int regnum = AVR_ARGN_REGNUM; | |
1207 | struct stack_item *si = NULL; | |
8818c391 | 1208 | |
8818c391 | 1209 | #if 0 |
4add8633 TR |
1210 | /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */ |
1211 | if (struct_return) | |
8818c391 | 1212 | { |
4add8633 TR |
1213 | fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr); |
1214 | write_register (argreg--, struct_addr & 0xff); | |
1215 | write_register (argreg--, (struct_addr >>8) & 0xff); | |
8818c391 | 1216 | } |
4add8633 | 1217 | #endif |
8818c391 | 1218 | |
4add8633 | 1219 | for (i = 0; i < nargs; i++) |
8818c391 | 1220 | { |
4add8633 TR |
1221 | int last_regnum; |
1222 | int j; | |
1223 | struct value *arg = args[i]; | |
1224 | struct type *type = check_typedef (VALUE_TYPE (arg)); | |
1225 | char *contents = VALUE_CONTENTS (arg); | |
1226 | int len = TYPE_LENGTH (type); | |
1227 | ||
1228 | /* Calculate the potential last register needed. */ | |
1229 | last_regnum = regnum - (len + (len & 1)); | |
1230 | ||
1231 | /* If there are registers available, use them. Once we start putting | |
1232 | stuff on the stack, all subsequent args go on stack. */ | |
1233 | if ((si == NULL) && (last_regnum >= 8)) | |
1234 | { | |
1235 | ULONGEST val; | |
1236 | ||
1237 | /* Skip a register for odd length args. */ | |
1238 | if (len & 1) | |
1239 | regnum--; | |
1240 | ||
1241 | val = extract_unsigned_integer (contents, len); | |
1242 | for (j=0; j<len; j++) | |
1243 | { | |
1244 | regcache_cooked_write_unsigned (regcache, regnum--, | |
1245 | val >> (8*(len-j-1))); | |
1246 | } | |
1247 | } | |
1248 | /* No registers available, push the args onto the stack. */ | |
1249 | else | |
1250 | { | |
1251 | /* From here on, we don't care about regnum. */ | |
1252 | si = push_stack_item (si, contents, len); | |
1253 | } | |
8818c391 | 1254 | } |
909cd28e | 1255 | |
4add8633 TR |
1256 | /* Push args onto the stack. */ |
1257 | while (si) | |
1258 | { | |
1259 | sp -= si->len; | |
1260 | /* Add 1 to sp here to account for post decr nature of pushes. */ | |
1261 | write_memory (sp+1, si->data, si->len); | |
1262 | si = pop_stack_item (si); | |
1263 | } | |
3605c34a | 1264 | |
4add8633 TR |
1265 | /* Set the return address. For the avr, the return address is the BP_ADDR. |
1266 | Need to push the return address onto the stack noting that it needs to be | |
1267 | in big-endian order on the stack. */ | |
1268 | buf[0] = (return_pc >> 8) & 0xff; | |
1269 | buf[1] = return_pc & 0xff; | |
3605c34a | 1270 | |
4add8633 TR |
1271 | sp -= 2; |
1272 | write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */ | |
3605c34a | 1273 | |
4add8633 TR |
1274 | /* Finally, update the SP register. */ |
1275 | regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, | |
1276 | avr_convert_saddr_to_raw (sp)); | |
3605c34a | 1277 | |
4add8633 | 1278 | return sp; |
3605c34a TR |
1279 | } |
1280 | ||
8818c391 TR |
1281 | /* Initialize the gdbarch structure for the AVR's. */ |
1282 | ||
1283 | static struct gdbarch * | |
2e5ff58c TR |
1284 | avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1285 | { | |
2e5ff58c TR |
1286 | struct gdbarch *gdbarch; |
1287 | struct gdbarch_tdep *tdep; | |
8818c391 TR |
1288 | |
1289 | /* Find a candidate among the list of pre-declared architectures. */ | |
1290 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1291 | if (arches != NULL) | |
1292 | return arches->gdbarch; | |
1293 | ||
1294 | /* None found, create a new architecture from the information provided. */ | |
1295 | tdep = XMALLOC (struct gdbarch_tdep); | |
1296 | gdbarch = gdbarch_alloc (&info, tdep); | |
1297 | ||
1298 | /* If we ever need to differentiate the device types, do it here. */ | |
1299 | switch (info.bfd_arch_info->mach) | |
1300 | { | |
1301 | case bfd_mach_avr1: | |
1302 | case bfd_mach_avr2: | |
1303 | case bfd_mach_avr3: | |
1304 | case bfd_mach_avr4: | |
1305 | case bfd_mach_avr5: | |
1306 | break; | |
1307 | } | |
1308 | ||
1309 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1310 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1311 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1312 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1313 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1314 | set_gdbarch_addr_bit (gdbarch, 32); | |
2e5ff58c | 1315 | set_gdbarch_bfd_vma_bit (gdbarch, 32); /* FIXME: TRoth/2002-02-18: Is this needed? */ |
8818c391 TR |
1316 | |
1317 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1318 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1319 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1320 | ||
1321 | set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little); | |
1322 | set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little); | |
1323 | set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_single_little); | |
1324 | ||
1325 | set_gdbarch_read_pc (gdbarch, avr_read_pc); | |
1326 | set_gdbarch_write_pc (gdbarch, avr_write_pc); | |
8818c391 | 1327 | set_gdbarch_read_sp (gdbarch, avr_read_sp); |
8818c391 TR |
1328 | |
1329 | set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); | |
1330 | ||
1331 | set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); | |
8818c391 TR |
1332 | set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); |
1333 | ||
1334 | set_gdbarch_register_name (gdbarch, avr_register_name); | |
866b76ea | 1335 | set_gdbarch_register_type (gdbarch, avr_register_type); |
8818c391 | 1336 | |
3605c34a | 1337 | set_gdbarch_extract_return_value (gdbarch, avr_extract_return_value); |
8818c391 TR |
1338 | set_gdbarch_print_insn (gdbarch, print_insn_avr); |
1339 | ||
8818c391 | 1340 | set_gdbarch_call_dummy_address (gdbarch, avr_call_dummy_address); |
4add8633 | 1341 | set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); |
8818c391 TR |
1342 | |
1343 | set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); | |
1344 | set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); | |
8818c391 | 1345 | |
8818c391 | 1346 | set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention); |
8818c391 | 1347 | |
8818c391 | 1348 | set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); |
8818c391 TR |
1349 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1350 | ||
1351 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
909cd28e | 1352 | set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc); |
8818c391 TR |
1353 | |
1354 | set_gdbarch_function_start_offset (gdbarch, 0); | |
98be1e77 | 1355 | |
8818c391 | 1356 | set_gdbarch_frame_args_skip (gdbarch, 0); |
4add8633 TR |
1357 | set_gdbarch_frameless_function_invocation (gdbarch, |
1358 | frameless_look_for_prologue); | |
4add8633 TR |
1359 | |
1360 | frame_unwind_append_predicate (gdbarch, avr_frame_p); | |
1361 | frame_base_set_default (gdbarch, &avr_frame_base); | |
1362 | ||
1363 | set_gdbarch_unwind_dummy_id (gdbarch, avr_unwind_dummy_id); | |
1364 | ||
1365 | set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); | |
8818c391 | 1366 | |
8818c391 TR |
1367 | return gdbarch; |
1368 | } | |
1369 | ||
1370 | /* Send a query request to the avr remote target asking for values of the io | |
1371 | registers. If args parameter is not NULL, then the user has requested info | |
1372 | on a specific io register [This still needs implemented and is ignored for | |
1373 | now]. The query string should be one of these forms: | |
1374 | ||
1375 | "Ravr.io_reg" -> reply is "NN" number of io registers | |
1376 | ||
1377 | "Ravr.io_reg:addr,len" where addr is first register and len is number of | |
1378 | registers to be read. The reply should be "<NAME>,VV;" for each io register | |
1379 | where, <NAME> is a string, and VV is the hex value of the register. | |
1380 | ||
1381 | All io registers are 8-bit. */ | |
1382 | ||
1383 | static void | |
1384 | avr_io_reg_read_command (char *args, int from_tty) | |
1385 | { | |
2e5ff58c TR |
1386 | int bufsiz = 0; |
1387 | char buf[400]; | |
1388 | char query[400]; | |
1389 | char *p; | |
1390 | unsigned int nreg = 0; | |
1391 | unsigned int val; | |
1392 | int i, j, k, step; | |
8818c391 | 1393 | |
2e5ff58c | 1394 | if (!current_target.to_query) |
8818c391 | 1395 | { |
2e5ff58c | 1396 | fprintf_unfiltered (gdb_stderr, |
98be1e77 TR |
1397 | "ERR: info io_registers NOT supported by current " |
1398 | "target\n"); | |
8818c391 TR |
1399 | return; |
1400 | } | |
1401 | ||
1402 | /* Just get the maximum buffer size. */ | |
1403 | target_query ((int) 'R', 0, 0, &bufsiz); | |
2e5ff58c TR |
1404 | if (bufsiz > sizeof (buf)) |
1405 | bufsiz = sizeof (buf); | |
8818c391 TR |
1406 | |
1407 | /* Find out how many io registers the target has. */ | |
1408 | strcpy (query, "avr.io_reg"); | |
2e5ff58c | 1409 | target_query ((int) 'R', query, buf, &bufsiz); |
8818c391 TR |
1410 | |
1411 | if (strncmp (buf, "", bufsiz) == 0) | |
1412 | { | |
2e5ff58c TR |
1413 | fprintf_unfiltered (gdb_stderr, |
1414 | "info io_registers NOT supported by target\n"); | |
8818c391 TR |
1415 | return; |
1416 | } | |
1417 | ||
2e5ff58c | 1418 | if (sscanf (buf, "%x", &nreg) != 1) |
8818c391 | 1419 | { |
2e5ff58c TR |
1420 | fprintf_unfiltered (gdb_stderr, |
1421 | "Error fetching number of io registers\n"); | |
8818c391 TR |
1422 | return; |
1423 | } | |
1424 | ||
2e5ff58c | 1425 | reinitialize_more_filter (); |
8818c391 TR |
1426 | |
1427 | printf_unfiltered ("Target has %u io registers:\n\n", nreg); | |
1428 | ||
1429 | /* only fetch up to 8 registers at a time to keep the buffer small */ | |
1430 | step = 8; | |
1431 | ||
2e5ff58c | 1432 | for (i = 0; i < nreg; i += step) |
8818c391 | 1433 | { |
91ccbfc1 TR |
1434 | /* how many registers this round? */ |
1435 | j = step; | |
1436 | if ((i+j) >= nreg) | |
1437 | j = nreg - i; /* last block is less than 8 registers */ | |
8818c391 | 1438 | |
2e5ff58c | 1439 | snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); |
8818c391 TR |
1440 | target_query ((int) 'R', query, buf, &bufsiz); |
1441 | ||
1442 | p = buf; | |
2e5ff58c TR |
1443 | for (k = i; k < (i + j); k++) |
1444 | { | |
1445 | if (sscanf (p, "%[^,],%x;", query, &val) == 2) | |
1446 | { | |
1447 | printf_filtered ("[%02x] %-15s : %02x\n", k, query, val); | |
1448 | while ((*p != ';') && (*p != '\0')) | |
1449 | p++; | |
1450 | p++; /* skip over ';' */ | |
1451 | if (*p == '\0') | |
1452 | break; | |
1453 | } | |
1454 | } | |
8818c391 TR |
1455 | } |
1456 | } | |
1457 | ||
a78f21af AC |
1458 | extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */ |
1459 | ||
8818c391 TR |
1460 | void |
1461 | _initialize_avr_tdep (void) | |
1462 | { | |
1463 | register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init); | |
1464 | ||
1465 | /* Add a new command to allow the user to query the avr remote target for | |
1466 | the values of the io space registers in a saner way than just using | |
1467 | `x/NNNb ADDR`. */ | |
1468 | ||
1469 | /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr | |
1470 | io_registers' to signify it is not available on other platforms. */ | |
1471 | ||
1472 | add_cmd ("io_registers", class_info, avr_io_reg_read_command, | |
2e5ff58c | 1473 | "query remote avr target for io space register values", &infolist); |
8818c391 | 1474 | } |