* dwarf2-frame.c (dwarf2_frame_cache, dwarf2_frame_this_id)
[deliverable/binutils-gdb.git] / gdb / avr-tdep.c
CommitLineData
8818c391 1/* Target-dependent code for Atmel AVR, for GDB.
0fd88904 2
6aba47ca
DJ
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2006, 2007 Free Software Foundation, Inc.
8818c391
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5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
197e01b6
EZ
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
8818c391 22
de18ac1f 23/* Contributed by Theodore A. Roth, troth@openavr.org */
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24
25/* Portions of this file were taken from the original gdb-4.18 patch developed
26 by Denis Chertykov, denisc@overta.ru */
27
28#include "defs.h"
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29#include "frame.h"
30#include "frame-unwind.h"
31#include "frame-base.h"
32#include "trad-frame.h"
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33#include "gdbcmd.h"
34#include "gdbcore.h"
e6bb342a 35#include "gdbtypes.h"
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36#include "inferior.h"
37#include "symfile.h"
38#include "arch-utils.h"
39#include "regcache.h"
5f8a3188 40#include "gdb_string.h"
a89aa300 41#include "dis-asm.h"
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42
43/* AVR Background:
44
45 (AVR micros are pure Harvard Architecture processors.)
46
47 The AVR family of microcontrollers have three distinctly different memory
48 spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
49 the most part to store program instructions. The sram is 8 bits wide and is
50 used for the stack and the heap. Some devices lack sram and some can have
51 an additional external sram added on as a peripheral.
52
53 The eeprom is 8 bits wide and is used to store data when the device is
54 powered down. Eeprom is not directly accessible, it can only be accessed
55 via io-registers using a special algorithm. Accessing eeprom via gdb's
56 remote serial protocol ('m' or 'M' packets) looks difficult to do and is
57 not included at this time.
58
59 [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
60 written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to
61 work, the remote target must be able to handle eeprom accesses and perform
62 the address translation.]
63
64 All three memory spaces have physical addresses beginning at 0x0. In
65 addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
66 bytes instead of the 16 bit wide words used by the real device for the
67 Program Counter.
68
69 In order for remote targets to work correctly, extra bits must be added to
70 addresses before they are send to the target or received from the target
71 via the remote serial protocol. The extra bits are the MSBs and are used to
72 decode which memory space the address is referring to. */
73
74#undef XMALLOC
75#define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
76
77#undef EXTRACT_INSN
78#define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2)
79
80/* Constants: prefixed with AVR_ to avoid name space clashes */
81
82enum
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83{
84 AVR_REG_W = 24,
85 AVR_REG_X = 26,
86 AVR_REG_Y = 28,
87 AVR_FP_REGNUM = 28,
88 AVR_REG_Z = 30,
89
90 AVR_SREG_REGNUM = 32,
91 AVR_SP_REGNUM = 33,
92 AVR_PC_REGNUM = 34,
93
94 AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
95 AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
96
97 AVR_PC_REG_INDEX = 35, /* index into array of registers */
98
4add8633 99 AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
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100
101 /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
102 AVR_MAX_PUSHES = 18,
103
104 /* Number of the last pushed register. r17 for current avr-gcc */
105 AVR_LAST_PUSHED_REGNUM = 17,
106
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107 AVR_ARG1_REGNUM = 24, /* Single byte argument */
108 AVR_ARGN_REGNUM = 25, /* Multi byte argments */
109
110 AVR_RET1_REGNUM = 24, /* Single byte return value */
111 AVR_RETN_REGNUM = 25, /* Multi byte return value */
112
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113 /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
114 bits? Do these have to match the bfd vma values?. It sure would make
115 things easier in the future if they didn't need to match.
116
117 Note: I chose these values so as to be consistent with bfd vma
118 addresses.
119
120 TRoth/2002-04-08: There is already a conflict with very large programs
121 in the mega128. The mega128 has 128K instruction bytes (64K words),
122 thus the Most Significant Bit is 0x10000 which gets masked off my
123 AVR_MEM_MASK.
124
125 The problem manifests itself when trying to set a breakpoint in a
126 function which resides in the upper half of the instruction space and
127 thus requires a 17-bit address.
128
129 For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
130 from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
131 but could be for some remote targets by just adding the correct offset
132 to the address and letting the remote target handle the low-level
133 details of actually accessing the eeprom. */
134
135 AVR_IMEM_START = 0x00000000, /* INSN memory */
136 AVR_SMEM_START = 0x00800000, /* SRAM memory */
8818c391 137#if 1
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138 /* No eeprom mask defined */
139 AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */
8818c391 140#else
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141 AVR_EMEM_START = 0x00810000, /* EEPROM memory */
142 AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */
8818c391 143#endif
2e5ff58c 144};
8818c391 145
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146/* Prologue types:
147
148 NORMAL and CALL are the typical types (the -mcall-prologues gcc option
149 causes the generation of the CALL type prologues). */
150
151enum {
152 AVR_PROLOGUE_NONE, /* No prologue */
153 AVR_PROLOGUE_NORMAL,
154 AVR_PROLOGUE_CALL, /* -mcall-prologues */
155 AVR_PROLOGUE_MAIN,
156 AVR_PROLOGUE_INTR, /* interrupt handler */
157 AVR_PROLOGUE_SIG, /* signal handler */
158};
159
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160/* Any function with a frame looks like this
161 ....... <-SP POINTS HERE
162 LOCALS1 <-FP POINTS HERE
163 LOCALS0
164 SAVED FP
165 SAVED R3
166 SAVED R2
167 RET PC
168 FIRST ARG
169 SECOND ARG */
170
4add8633 171struct avr_unwind_cache
2e5ff58c 172{
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173 /* The previous frame's inner most stack address. Used as this
174 frame ID's stack_addr. */
175 CORE_ADDR prev_sp;
176 /* The frame's base, optionally used by the high-level debug info. */
177 CORE_ADDR base;
178 int size;
179 int prologue_type;
180 /* Table indicating the location of each and every register. */
181 struct trad_frame_saved_reg *saved_regs;
2e5ff58c 182};
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183
184struct gdbarch_tdep
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185{
186 /* FIXME: TRoth: is there anything to put here? */
187 int foo;
188};
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189
190/* Lookup the name of a register given it's number. */
191
fa88f677 192static const char *
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193avr_register_name (int regnum)
194{
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195 static char *register_names[] = {
196 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
197 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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198 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
199 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
200 "SREG", "SP", "PC"
201 };
202 if (regnum < 0)
203 return NULL;
204 if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
205 return NULL;
206 return register_names[regnum];
207}
208
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209/* Return the GDB type object for the "standard" data type
210 of data in register N. */
211
212static struct type *
866b76ea 213avr_register_type (struct gdbarch *gdbarch, int reg_nr)
8818c391 214{
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215 if (reg_nr == AVR_PC_REGNUM)
216 return builtin_type_uint32;
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217 if (reg_nr == AVR_SP_REGNUM)
218 return builtin_type_void_data_ptr;
219 else
220 return builtin_type_uint8;
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221}
222
223/* Instruction address checks and convertions. */
224
225static CORE_ADDR
226avr_make_iaddr (CORE_ADDR x)
227{
228 return ((x) | AVR_IMEM_START);
229}
230
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231/* FIXME: TRoth: Really need to use a larger mask for instructions. Some
232 devices are already up to 128KBytes of flash space.
233
234 TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
235
236static CORE_ADDR
237avr_convert_iaddr_to_raw (CORE_ADDR x)
238{
239 return ((x) & 0xffffffff);
240}
241
242/* SRAM address checks and convertions. */
243
244static CORE_ADDR
245avr_make_saddr (CORE_ADDR x)
246{
247 return ((x) | AVR_SMEM_START);
248}
249
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250static CORE_ADDR
251avr_convert_saddr_to_raw (CORE_ADDR x)
252{
253 return ((x) & 0xffffffff);
254}
255
256/* EEPROM address checks and convertions. I don't know if these will ever
257 actually be used, but I've added them just the same. TRoth */
258
259/* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
260 programs in the mega128. */
261
262/* static CORE_ADDR */
263/* avr_make_eaddr (CORE_ADDR x) */
264/* { */
265/* return ((x) | AVR_EMEM_START); */
266/* } */
267
268/* static int */
269/* avr_eaddr_p (CORE_ADDR x) */
270/* { */
271/* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
272/* } */
273
274/* static CORE_ADDR */
275/* avr_convert_eaddr_to_raw (CORE_ADDR x) */
276/* { */
277/* return ((x) & 0xffffffff); */
278/* } */
279
280/* Convert from address to pointer and vice-versa. */
281
282static void
1f3a99d5 283avr_address_to_pointer (struct type *type, gdb_byte *buf, CORE_ADDR addr)
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284{
285 /* Is it a code address? */
286 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
287 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
288 {
2e5ff58c 289 store_unsigned_integer (buf, TYPE_LENGTH (type),
4ea2465e 290 avr_convert_iaddr_to_raw (addr >> 1));
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291 }
292 else
293 {
294 /* Strip off any upper segment bits. */
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295 store_unsigned_integer (buf, TYPE_LENGTH (type),
296 avr_convert_saddr_to_raw (addr));
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297 }
298}
299
300static CORE_ADDR
1f3a99d5 301avr_pointer_to_address (struct type *type, const gdb_byte *buf)
8818c391 302{
7c0b4a20 303 CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type));
8818c391 304
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305 /* Is it a code address? */
306 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
307 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
2e5ff58c 308 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
4ea2465e 309 return avr_make_iaddr (addr << 1);
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310 else
311 return avr_make_saddr (addr);
312}
313
314static CORE_ADDR
315avr_read_pc (ptid_t ptid)
316{
317 ptid_t save_ptid;
8619218d 318 ULONGEST pc;
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319 CORE_ADDR retval;
320
321 save_ptid = inferior_ptid;
322 inferior_ptid = ptid;
8619218d 323 regcache_cooked_read_unsigned (current_regcache, AVR_PC_REGNUM, &pc);
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324 inferior_ptid = save_ptid;
325 retval = avr_make_iaddr (pc);
326 return retval;
327}
328
329static void
330avr_write_pc (CORE_ADDR val, ptid_t ptid)
331{
332 ptid_t save_ptid;
333
334 save_ptid = inferior_ptid;
335 inferior_ptid = ptid;
336 write_register (AVR_PC_REGNUM, avr_convert_iaddr_to_raw (val));
337 inferior_ptid = save_ptid;
338}
339
340static CORE_ADDR
341avr_read_sp (void)
342{
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343 ULONGEST sp;
344
345 regcache_cooked_read_unsigned (current_regcache, AVR_SP_REGNUM, &sp);
346 return (avr_make_saddr (sp));
8818c391
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347}
348
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349static int
350avr_scan_arg_moves (int vpc, unsigned char *prologue)
8818c391 351{
4add8633 352 unsigned short insn;
866b76ea 353
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354 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2)
355 {
356 insn = EXTRACT_INSN (&prologue[vpc]);
357 if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
358 continue;
359 else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
360 continue;
361 else
362 break;
363 }
364
365 return vpc;
8818c391
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366}
367
4add8633 368/* Function: avr_scan_prologue
8818c391 369
4add8633 370 This function decodes an AVR function prologue to determine:
8818c391
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371 1) the size of the stack frame
372 2) which registers are saved on it
373 3) the offsets of saved regs
4add8633 374 This information is stored in the avr_unwind_cache structure.
8818c391 375
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376 Some devices lack the sbiw instruction, so on those replace this:
377 sbiw r28, XX
378 with this:
379 subi r28,lo8(XX)
380 sbci r29,hi8(XX)
381
382 A typical AVR function prologue with a frame pointer might look like this:
383 push rXX ; saved regs
384 ...
385 push r28
386 push r29
387 in r28,__SP_L__
388 in r29,__SP_H__
389 sbiw r28,<LOCALS_SIZE>
390 in __tmp_reg__,__SREG__
8818c391 391 cli
e3d8b004 392 out __SP_H__,r29
72fab697
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393 out __SREG__,__tmp_reg__
394 out __SP_L__,r28
e3d8b004
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395
396 A typical AVR function prologue without a frame pointer might look like
397 this:
398 push rXX ; saved regs
399 ...
400
401 A main function prologue looks like this:
402 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
403 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
404 out __SP_H__,r29
405 out __SP_L__,r28
406
407 A signal handler prologue looks like this:
408 push __zero_reg__
409 push __tmp_reg__
410 in __tmp_reg__, __SREG__
411 push __tmp_reg__
412 clr __zero_reg__
413 push rXX ; save registers r18:r27, r30:r31
414 ...
415 push r28 ; save frame pointer
416 push r29
417 in r28, __SP_L__
418 in r29, __SP_H__
419 sbiw r28, <LOCALS_SIZE>
420 out __SP_H__, r29
421 out __SP_L__, r28
422
423 A interrupt handler prologue looks like this:
424 sei
425 push __zero_reg__
426 push __tmp_reg__
427 in __tmp_reg__, __SREG__
428 push __tmp_reg__
429 clr __zero_reg__
430 push rXX ; save registers r18:r27, r30:r31
431 ...
432 push r28 ; save frame pointer
433 push r29
434 in r28, __SP_L__
435 in r29, __SP_H__
436 sbiw r28, <LOCALS_SIZE>
437 cli
438 out __SP_H__, r29
439 sei
440 out __SP_L__, r28
441
442 A `-mcall-prologues' prologue looks like this (Note that the megas use a
443 jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
444 32 bit insn and rjmp is a 16 bit insn):
445 ldi r26,lo8(<LOCALS_SIZE>)
446 ldi r27,hi8(<LOCALS_SIZE>)
447 ldi r30,pm_lo8(.L_foo_body)
448 ldi r31,pm_hi8(.L_foo_body)
449 rjmp __prologue_saves__+RRR
450 .L_foo_body: */
8818c391 451
4add8633
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452/* Not really part of a prologue, but still need to scan for it, is when a
453 function prologue moves values passed via registers as arguments to new
454 registers. In this case, all local variables live in registers, so there
455 may be some register saves. This is what it looks like:
456 movw rMM, rNN
457 ...
458
459 There could be multiple movw's. If the target doesn't have a movw insn, it
460 will use two mov insns. This could be done after any of the above prologue
461 types. */
462
463static CORE_ADDR
464avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info)
8818c391 465{
2e5ff58c
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466 int i;
467 unsigned short insn;
2e5ff58c 468 int scan_stage = 0;
8818c391 469 struct minimal_symbol *msymbol;
8818c391
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470 unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
471 int vpc = 0;
472
4add8633
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473 /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
474 reading in the bytes of the prologue. The problem is that the figuring
475 out where the end of the prologue is is a bit difficult. The old code
476 tried to do that, but failed quite often. */
477 read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE);
8818c391
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478
479 /* Scanning main()'s prologue
480 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
481 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
482 out __SP_H__,r29
483 out __SP_L__,r28 */
484
4add8633 485 if (1)
8818c391
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486 {
487 CORE_ADDR locals;
2e5ff58c
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488 unsigned char img[] = {
489 0xde, 0xbf, /* out __SP_H__,r29 */
490 0xcd, 0xbf /* out __SP_L__,r28 */
8818c391
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491 };
492
8818c391
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493 insn = EXTRACT_INSN (&prologue[vpc]);
494 /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
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495 if ((insn & 0xf0f0) == 0xe0c0)
496 {
497 locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
498 insn = EXTRACT_INSN (&prologue[vpc + 2]);
499 /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
500 if ((insn & 0xf0f0) == 0xe0d0)
501 {
502 locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
503 if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
504 {
4add8633
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505 info->prologue_type = AVR_PROLOGUE_MAIN;
506 info->base = locals;
507 return pc + 4;
2e5ff58c
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508 }
509 }
510 }
8818c391 511 }
2e5ff58c 512
4add8633
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513 /* Scanning `-mcall-prologues' prologue
514 Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
8818c391 515
e3d8b004 516 while (1) /* Using a while to avoid many goto's */
8818c391
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517 {
518 int loc_size;
519 int body_addr;
520 unsigned num_pushes;
4add8633 521 int pc_offset = 0;
2e5ff58c 522
8818c391
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523 insn = EXTRACT_INSN (&prologue[vpc]);
524 /* ldi r26,<LOCALS_SIZE> */
2e5ff58c
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525 if ((insn & 0xf0f0) != 0xe0a0)
526 break;
8818c391 527 loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
4add8633 528 pc_offset += 2;
2e5ff58c 529
8818c391
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530 insn = EXTRACT_INSN (&prologue[vpc + 2]);
531 /* ldi r27,<LOCALS_SIZE> / 256 */
532 if ((insn & 0xf0f0) != 0xe0b0)
2e5ff58c 533 break;
8818c391 534 loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
4add8633 535 pc_offset += 2;
2e5ff58c 536
8818c391
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537 insn = EXTRACT_INSN (&prologue[vpc + 4]);
538 /* ldi r30,pm_lo8(.L_foo_body) */
539 if ((insn & 0xf0f0) != 0xe0e0)
2e5ff58c 540 break;
8818c391 541 body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
4add8633 542 pc_offset += 2;
8818c391
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543
544 insn = EXTRACT_INSN (&prologue[vpc + 6]);
545 /* ldi r31,pm_hi8(.L_foo_body) */
546 if ((insn & 0xf0f0) != 0xe0f0)
2e5ff58c 547 break;
8818c391 548 body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
4add8633 549 pc_offset += 2;
8818c391 550
8818c391
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551 msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
552 if (!msymbol)
2e5ff58c 553 break;
8818c391 554
8818c391
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555 insn = EXTRACT_INSN (&prologue[vpc + 8]);
556 /* rjmp __prologue_saves__+RRR */
e3d8b004
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557 if ((insn & 0xf000) == 0xc000)
558 {
559 /* Extract PC relative offset from RJMP */
560 i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
561 /* Convert offset to byte addressable mode */
562 i *= 2;
563 /* Destination address */
4add8633 564 i += pc + 10;
e3d8b004 565
4add8633 566 if (body_addr != (pc + 10)/2)
e3d8b004 567 break;
4add8633
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568
569 pc_offset += 2;
e3d8b004 570 }
e3d8b004
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571 else if ((insn & 0xfe0e) == 0x940c)
572 {
573 /* Extract absolute PC address from JMP */
574 i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
575 | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff));
576 /* Convert address to byte addressable mode */
577 i *= 2;
578
4add8633 579 if (body_addr != (pc + 12)/2)
e3d8b004 580 break;
4add8633
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581
582 pc_offset += 4;
e3d8b004
TR
583 }
584 else
585 break;
2e5ff58c 586
4add8633 587 /* Resolve offset (in words) from __prologue_saves__ symbol.
8818c391
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588 Which is a pushes count in `-mcall-prologues' mode */
589 num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2;
590
591 if (num_pushes > AVR_MAX_PUSHES)
4add8633 592 {
edefbb7c 593 fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
4add8633
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594 num_pushes);
595 num_pushes = 0;
596 }
2e5ff58c 597
8818c391 598 if (num_pushes)
2e5ff58c
TR
599 {
600 int from;
4add8633
TR
601
602 info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
2e5ff58c 603 if (num_pushes >= 2)
4add8633
TR
604 info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
605
2e5ff58c
TR
606 i = 0;
607 for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
608 from <= AVR_LAST_PUSHED_REGNUM; ++from)
4add8633 609 info->saved_regs [from].addr = ++i;
2e5ff58c 610 }
4add8633
TR
611 info->size = loc_size + num_pushes;
612 info->prologue_type = AVR_PROLOGUE_CALL;
613
614 return pc + pc_offset;
8818c391
TR
615 }
616
4add8633
TR
617 /* Scan for the beginning of the prologue for an interrupt or signal
618 function. Note that we have to set the prologue type here since the
619 third stage of the prologue may not be present (e.g. no saved registered
620 or changing of the SP register). */
8818c391 621
4add8633 622 if (1)
8818c391 623 {
2e5ff58c
TR
624 unsigned char img[] = {
625 0x78, 0x94, /* sei */
626 0x1f, 0x92, /* push r1 */
627 0x0f, 0x92, /* push r0 */
628 0x0f, 0xb6, /* in r0,0x3f SREG */
629 0x0f, 0x92, /* push r0 */
630 0x11, 0x24 /* clr r1 */
8818c391
TR
631 };
632 if (memcmp (prologue, img, sizeof (img)) == 0)
2e5ff58c 633 {
4add8633 634 info->prologue_type = AVR_PROLOGUE_INTR;
2e5ff58c 635 vpc += sizeof (img);
4add8633
TR
636 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
637 info->saved_regs[0].addr = 2;
638 info->saved_regs[1].addr = 1;
639 info->size += 3;
2e5ff58c 640 }
4add8633 641 else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
2e5ff58c 642 {
4add8633
TR
643 info->prologue_type = AVR_PROLOGUE_SIG;
644 vpc += sizeof (img) - 2;
645 info->saved_regs[AVR_SREG_REGNUM].addr = 3;
646 info->saved_regs[0].addr = 2;
647 info->saved_regs[1].addr = 1;
648 info->size += 3;
2e5ff58c 649 }
8818c391
TR
650 }
651
652 /* First stage of the prologue scanning.
4add8633 653 Scan pushes (saved registers) */
8818c391 654
4add8633 655 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2)
8818c391
TR
656 {
657 insn = EXTRACT_INSN (&prologue[vpc]);
2e5ff58c
TR
658 if ((insn & 0xfe0f) == 0x920f) /* push rXX */
659 {
660 /* Bits 4-9 contain a mask for registers R0-R32. */
4add8633
TR
661 int regno = (insn & 0x1f0) >> 4;
662 info->size++;
663 info->saved_regs[regno].addr = info->size;
2e5ff58c
TR
664 scan_stage = 1;
665 }
8818c391 666 else
2e5ff58c 667 break;
8818c391
TR
668 }
669
4add8633
TR
670 if (vpc >= AVR_MAX_PROLOGUE_SIZE)
671 fprintf_unfiltered (gdb_stderr,
edefbb7c 672 _("Hit end of prologue while scanning pushes\n"));
4add8633 673
8818c391
TR
674 /* Second stage of the prologue scanning.
675 Scan:
676 in r28,__SP_L__
677 in r29,__SP_H__ */
678
4add8633 679 if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE)
8818c391 680 {
2e5ff58c
TR
681 unsigned char img[] = {
682 0xcd, 0xb7, /* in r28,__SP_L__ */
683 0xde, 0xb7 /* in r29,__SP_H__ */
8818c391
TR
684 };
685 unsigned short insn1;
2e5ff58c 686
8818c391 687 if (memcmp (prologue + vpc, img, sizeof (img)) == 0)
2e5ff58c
TR
688 {
689 vpc += 4;
2e5ff58c
TR
690 scan_stage = 2;
691 }
8818c391
TR
692 }
693
694 /* Third stage of the prologue scanning. (Really two stages)
695 Scan for:
696 sbiw r28,XX or subi r28,lo8(XX)
72fab697 697 sbci r29,hi8(XX)
8818c391
TR
698 in __tmp_reg__,__SREG__
699 cli
e3d8b004 700 out __SP_H__,r29
8818c391 701 out __SREG__,__tmp_reg__
e3d8b004 702 out __SP_L__,r28 */
8818c391 703
4add8633 704 if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE)
8818c391
TR
705 {
706 int locals_size = 0;
2e5ff58c
TR
707 unsigned char img[] = {
708 0x0f, 0xb6, /* in r0,0x3f */
709 0xf8, 0x94, /* cli */
e3d8b004 710 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
2e5ff58c 711 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */
e3d8b004 712 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
8818c391 713 };
2e5ff58c 714 unsigned char img_sig[] = {
e3d8b004
TR
715 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
716 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
8818c391 717 };
2e5ff58c
TR
718 unsigned char img_int[] = {
719 0xf8, 0x94, /* cli */
e3d8b004 720 0xde, 0xbf, /* out 0x3e,r29 ; SPH */
2e5ff58c 721 0x78, 0x94, /* sei */
e3d8b004 722 0xcd, 0xbf /* out 0x3d,r28 ; SPL */
8818c391 723 };
2e5ff58c 724
8818c391
TR
725 insn = EXTRACT_INSN (&prologue[vpc]);
726 vpc += 2;
2e5ff58c
TR
727 if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
728 locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
729 else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
730 {
731 locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
732 insn = EXTRACT_INSN (&prologue[vpc]);
733 vpc += 2;
734 locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8);
735 }
8818c391 736 else
4add8633
TR
737 return pc + vpc;
738
739 /* Scan the last part of the prologue. May not be present for interrupt
740 or signal handler functions, which is why we set the prologue type
741 when we saw the beginning of the prologue previously. */
742
743 if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
744 {
745 vpc += sizeof (img_sig);
746 }
747 else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
748 {
749 vpc += sizeof (img_int);
750 }
751 if (memcmp (prologue + vpc, img, sizeof (img)) == 0)
752 {
753 info->prologue_type = AVR_PROLOGUE_NORMAL;
754 vpc += sizeof (img);
755 }
756
757 info->size += locals_size;
758
759 return pc + avr_scan_arg_moves (vpc, prologue);
8818c391 760 }
4add8633
TR
761
762 /* If we got this far, we could not scan the prologue, so just return the pc
763 of the frame plus an adjustment for argument move insns. */
764
765 return pc + avr_scan_arg_moves (vpc, prologue);;
8818c391
TR
766}
767
4add8633
TR
768static CORE_ADDR
769avr_skip_prologue (CORE_ADDR pc)
770{
771 CORE_ADDR func_addr, func_end;
772 CORE_ADDR prologue_end = pc;
8818c391 773
4add8633 774 /* See what the symbol table says */
8818c391 775
4add8633
TR
776 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
777 {
778 struct symtab_and_line sal;
779 struct avr_unwind_cache info = {0};
780 struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
2e5ff58c 781
4add8633 782 info.saved_regs = saved_regs;
8818c391 783
4add8633
TR
784 /* Need to run the prologue scanner to figure out if the function has a
785 prologue and possibly skip over moving arguments passed via registers
786 to other registers. */
2e5ff58c 787
4add8633 788 prologue_end = avr_scan_prologue (pc, &info);
8818c391 789
3b85b0f1
TR
790 if (info.prologue_type == AVR_PROLOGUE_NONE)
791 return pc;
792 else
4add8633
TR
793 {
794 sal = find_pc_line (func_addr, 0);
8818c391 795
4add8633
TR
796 if (sal.line != 0 && sal.end < func_end)
797 return sal.end;
798 }
799 }
2e5ff58c 800
4add8633
TR
801/* Either we didn't find the start of this function (nothing we can do),
802 or there's no line info, or the line after the prologue is after
803 the end of the function (there probably isn't a prologue). */
2e5ff58c 804
4add8633
TR
805 return prologue_end;
806}
8818c391 807
4add8633
TR
808/* Not all avr devices support the BREAK insn. Those that don't should treat
809 it as a NOP. Thus, it should be ok. Since the avr is currently a remote
810 only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
8818c391 811
4add8633
TR
812static const unsigned char *
813avr_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr)
814{
815 static unsigned char avr_break_insn [] = { 0x98, 0x95 };
816 *lenptr = sizeof (avr_break_insn);
817 return avr_break_insn;
8818c391
TR
818}
819
4add8633
TR
820/* Given a return value in `regbuf' with a type `valtype',
821 extract and copy its value into `valbuf'.
822
823 Return values are always passed via registers r25:r24:... */
8818c391
TR
824
825static void
4add8633 826avr_extract_return_value (struct type *type, struct regcache *regcache,
1f3a99d5 827 gdb_byte *valbuf)
8818c391 828{
4add8633
TR
829 ULONGEST r24, r25;
830 ULONGEST c;
831 int len;
832 if (TYPE_LENGTH (type) == 1)
8818c391 833 {
4add8633
TR
834 regcache_cooked_read_unsigned (regcache, 24, &c);
835 store_unsigned_integer (valbuf, 1, c);
8818c391
TR
836 }
837 else
838 {
4add8633
TR
839 int i;
840 /* The MSB of the return value is always in r25, calculate which
841 register holds the LSB. */
842 int lsb_reg = 25 - TYPE_LENGTH (type) + 1;
8818c391 843
4add8633
TR
844 for (i=0; i< TYPE_LENGTH (type); i++)
845 {
846 regcache_cooked_read (regcache, lsb_reg + i,
847 (bfd_byte *) valbuf + i);
4add8633
TR
848 }
849 }
850}
8818c391 851
4add8633
TR
852/* Put here the code to store, into fi->saved_regs, the addresses of
853 the saved registers of frame described by FRAME_INFO. This
854 includes special registers such as pc and fp saved in special ways
855 in the stack frame. sp is even more special: the address we return
856 for it IS the sp for the next frame. */
8818c391 857
4add8633
TR
858struct avr_unwind_cache *
859avr_frame_unwind_cache (struct frame_info *next_frame,
860 void **this_prologue_cache)
8818c391 861{
4add8633
TR
862 CORE_ADDR pc;
863 ULONGEST prev_sp;
864 ULONGEST this_base;
865 struct avr_unwind_cache *info;
866 int i;
867
868 if ((*this_prologue_cache))
869 return (*this_prologue_cache);
870
871 info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
872 (*this_prologue_cache) = info;
873 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
874
875 info->size = 0;
876 info->prologue_type = AVR_PROLOGUE_NONE;
877
93d42b30 878 pc = frame_func_unwind (next_frame, NORMAL_FRAME);
4add8633
TR
879
880 if ((pc > 0) && (pc < frame_pc_unwind (next_frame)))
881 avr_scan_prologue (pc, info);
882
3b85b0f1
TR
883 if ((info->prologue_type != AVR_PROLOGUE_NONE)
884 && (info->prologue_type != AVR_PROLOGUE_MAIN))
4add8633
TR
885 {
886 ULONGEST high_base; /* High byte of FP */
887
888 /* The SP was moved to the FP. This indicates that a new frame
889 was created. Get THIS frame's FP value by unwinding it from
890 the next frame. */
891 frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM, &this_base);
892 frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM+1, &high_base);
893 this_base += (high_base << 8);
894
895 /* The FP points at the last saved register. Adjust the FP back
896 to before the first saved register giving the SP. */
897 prev_sp = this_base + info->size;
898 }
8818c391 899 else
4add8633
TR
900 {
901 /* Assume that the FP is this frame's SP but with that pushed
902 stack space added back. */
903 frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &this_base);
904 prev_sp = this_base + info->size;
905 }
906
907 /* Add 1 here to adjust for the post-decrement nature of the push
908 instruction.*/
909 info->prev_sp = avr_make_saddr (prev_sp+1);
910
911 info->base = avr_make_saddr (this_base);
912
913 /* Adjust all the saved registers so that they contain addresses and not
3b85b0f1 914 offsets. */
4add8633
TR
915 for (i = 0; i < NUM_REGS - 1; i++)
916 if (info->saved_regs[i].addr)
917 {
918 info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr);
919 }
920
921 /* Except for the main and startup code, the return PC is always saved on
922 the stack and is at the base of the frame. */
923
924 if (info->prologue_type != AVR_PROLOGUE_MAIN)
925 {
926 info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
927 }
928
3b85b0f1
TR
929 /* The previous frame's SP needed to be computed. Save the computed
930 value. */
931 trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, info->prev_sp+1);
932
4add8633 933 return info;
8818c391
TR
934}
935
936static CORE_ADDR
4add8633 937avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
8818c391 938{
4add8633
TR
939 ULONGEST pc;
940
941 frame_unwind_unsigned_register (next_frame, AVR_PC_REGNUM, &pc);
942
943 return avr_make_iaddr (pc);
8818c391
TR
944}
945
4add8633
TR
946/* Given a GDB frame, determine the address of the calling function's
947 frame. This will be used to create a new GDB frame struct. */
8818c391 948
4add8633
TR
949static void
950avr_frame_this_id (struct frame_info *next_frame,
951 void **this_prologue_cache,
952 struct frame_id *this_id)
8818c391 953{
4add8633
TR
954 struct avr_unwind_cache *info
955 = avr_frame_unwind_cache (next_frame, this_prologue_cache);
956 CORE_ADDR base;
957 CORE_ADDR func;
958 struct frame_id id;
959
960 /* The FUNC is easy. */
93d42b30 961 func = frame_func_unwind (next_frame, NORMAL_FRAME);
4add8633 962
4add8633
TR
963 /* Hopefully the prologue analysis either correctly determined the
964 frame's base (which is the SP from the previous frame), or set
965 that base to "NULL". */
966 base = info->prev_sp;
967 if (base == 0)
968 return;
969
970 id = frame_id_build (base, func);
4add8633 971 (*this_id) = id;
8818c391
TR
972}
973
4add8633
TR
974static void
975avr_frame_prev_register (struct frame_info *next_frame,
976 void **this_prologue_cache,
977 int regnum, int *optimizedp,
978 enum lval_type *lvalp, CORE_ADDR *addrp,
1f3a99d5 979 int *realnump, gdb_byte *bufferp)
8818c391 980{
4add8633
TR
981 struct avr_unwind_cache *info
982 = avr_frame_unwind_cache (next_frame, this_prologue_cache);
8818c391 983
3b85b0f1
TR
984 if (regnum == AVR_PC_REGNUM)
985 {
986 if (trad_frame_addr_p (info->saved_regs, regnum))
987 {
988 *optimizedp = 0;
989 *lvalp = lval_memory;
990 *addrp = info->saved_regs[regnum].addr;
991 *realnump = -1;
992 if (bufferp != NULL)
993 {
994 /* Reading the return PC from the PC register is slightly
995 abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
996 but in reality, only two bytes (3 in upcoming mega256) are
997 stored on the stack.
998
999 Also, note that the value on the stack is an addr to a word
1000 not a byte, so we will need to multiply it by two at some
1001 point.
1002
1003 And to confuse matters even more, the return address stored
1004 on the stack is in big endian byte order, even though most
1005 everything else about the avr is little endian. Ick! */
1006
1007 /* FIXME: number of bytes read here will need updated for the
1008 mega256 when it is available. */
1009
1010 ULONGEST pc;
1011 unsigned char tmp;
1012 unsigned char buf[2];
1013
1014 read_memory (info->saved_regs[regnum].addr, buf, 2);
1015
1016 /* Convert the PC read from memory as a big-endian to
1017 little-endian order. */
1018 tmp = buf[0];
1019 buf[0] = buf[1];
1020 buf[1] = tmp;
1021
1022 pc = (extract_unsigned_integer (buf, 2) * 2);
1023 store_unsigned_integer (bufferp,
1024 register_size (current_gdbarch, regnum),
1025 pc);
1026 }
1027 }
1028 }
1029 else
1f67027d
AC
1030 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1031 optimizedp, lvalp, addrp, realnump, bufferp);
4add8633 1032}
8818c391 1033
4add8633
TR
1034static const struct frame_unwind avr_frame_unwind = {
1035 NORMAL_FRAME,
1036 avr_frame_this_id,
1037 avr_frame_prev_register
1038};
1039
1040const struct frame_unwind *
336d1bba 1041avr_frame_sniffer (struct frame_info *next_frame)
4add8633
TR
1042{
1043 return &avr_frame_unwind;
8818c391
TR
1044}
1045
1046static CORE_ADDR
4add8633 1047avr_frame_base_address (struct frame_info *next_frame, void **this_cache)
8818c391 1048{
4add8633
TR
1049 struct avr_unwind_cache *info
1050 = avr_frame_unwind_cache (next_frame, this_cache);
8818c391 1051
4add8633
TR
1052 return info->base;
1053}
8818c391 1054
4add8633
TR
1055static const struct frame_base avr_frame_base = {
1056 &avr_frame_unwind,
1057 avr_frame_base_address,
1058 avr_frame_base_address,
1059 avr_frame_base_address
1060};
ced15480 1061
4add8633
TR
1062/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1063 dummy frame. The frame ID's base needs to match the TOS value
1064 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1065 breakpoint. */
8818c391 1066
4add8633
TR
1067static struct frame_id
1068avr_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1069{
1070 ULONGEST base;
8818c391 1071
4add8633
TR
1072 frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &base);
1073 return frame_id_build (avr_make_saddr (base), frame_pc_unwind (next_frame));
8818c391
TR
1074}
1075
4add8633
TR
1076/* When arguments must be pushed onto the stack, they go on in reverse
1077 order. The below implements a FILO (stack) to do this. */
8818c391 1078
4add8633
TR
1079struct stack_item
1080{
1081 int len;
1082 struct stack_item *prev;
1083 void *data;
1084};
8818c391 1085
4add8633 1086static struct stack_item *
0fd88904 1087push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
8818c391 1088{
4add8633
TR
1089 struct stack_item *si;
1090 si = xmalloc (sizeof (struct stack_item));
1091 si->data = xmalloc (len);
1092 si->len = len;
1093 si->prev = prev;
1094 memcpy (si->data, contents, len);
1095 return si;
8818c391
TR
1096}
1097
4add8633
TR
1098static struct stack_item *pop_stack_item (struct stack_item *si);
1099static struct stack_item *
1100pop_stack_item (struct stack_item *si)
8818c391 1101{
4add8633
TR
1102 struct stack_item *dead = si;
1103 si = si->prev;
1104 xfree (dead->data);
1105 xfree (dead);
1106 return si;
8818c391
TR
1107}
1108
8818c391
TR
1109/* Setup the function arguments for calling a function in the inferior.
1110
1111 On the AVR architecture, there are 18 registers (R25 to R8) which are
1112 dedicated for passing function arguments. Up to the first 18 arguments
1113 (depending on size) may go into these registers. The rest go on the stack.
1114
4add8633
TR
1115 All arguments are aligned to start in even-numbered registers (odd-sized
1116 arguments, including char, have one free register above them). For example,
1117 an int in arg1 and a char in arg2 would be passed as such:
1118
1119 arg1 -> r25:r24
1120 arg2 -> r22
1121
1122 Arguments that are larger than 2 bytes will be split between two or more
1123 registers as available, but will NOT be split between a register and the
1124 stack. Arguments that go onto the stack are pushed last arg first (this is
1125 similar to the d10v). */
1126
1127/* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
1128 inaccurate.
8818c391
TR
1129
1130 An exceptional case exists for struct arguments (and possibly other
1131 aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
1132 not a multiple of WORDSIZE bytes. In this case the argument is never split
1133 between the registers and the stack, but instead is copied in its entirety
1134 onto the stack, AND also copied into as many registers as there is room
1135 for. In other words, space in registers permitting, two copies of the same
1136 argument are passed in. As far as I can tell, only the one on the stack is
1137 used, although that may be a function of the level of compiler
1138 optimization. I suspect this is a compiler bug. Arguments of these odd
1139 sizes are left-justified within the word (as opposed to arguments smaller
1140 than WORDSIZE bytes, which are right-justified).
1141
1142 If the function is to return an aggregate type such as a struct, the caller
1143 must allocate space into which the callee will copy the return value. In
1144 this case, a pointer to the return value location is passed into the callee
1145 in register R0, which displaces one of the other arguments passed in via
1146 registers R0 to R2. */
1147
1148static CORE_ADDR
7d9b040b 1149avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
4add8633
TR
1150 struct regcache *regcache, CORE_ADDR bp_addr,
1151 int nargs, struct value **args, CORE_ADDR sp,
1152 int struct_return, CORE_ADDR struct_addr)
8818c391 1153{
4add8633
TR
1154 int i;
1155 unsigned char buf[2];
1156 CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
1157 int regnum = AVR_ARGN_REGNUM;
1158 struct stack_item *si = NULL;
8818c391 1159
8818c391 1160#if 0
4add8633
TR
1161 /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */
1162 if (struct_return)
8818c391 1163 {
4add8633
TR
1164 fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr);
1165 write_register (argreg--, struct_addr & 0xff);
1166 write_register (argreg--, (struct_addr >>8) & 0xff);
8818c391 1167 }
4add8633 1168#endif
8818c391 1169
4add8633 1170 for (i = 0; i < nargs; i++)
8818c391 1171 {
4add8633
TR
1172 int last_regnum;
1173 int j;
1174 struct value *arg = args[i];
4991999e 1175 struct type *type = check_typedef (value_type (arg));
0fd88904 1176 const bfd_byte *contents = value_contents (arg);
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TR
1177 int len = TYPE_LENGTH (type);
1178
1179 /* Calculate the potential last register needed. */
1180 last_regnum = regnum - (len + (len & 1));
1181
1182 /* If there are registers available, use them. Once we start putting
1183 stuff on the stack, all subsequent args go on stack. */
1184 if ((si == NULL) && (last_regnum >= 8))
1185 {
1186 ULONGEST val;
1187
1188 /* Skip a register for odd length args. */
1189 if (len & 1)
1190 regnum--;
1191
1192 val = extract_unsigned_integer (contents, len);
1193 for (j=0; j<len; j++)
1194 {
1195 regcache_cooked_write_unsigned (regcache, regnum--,
1196 val >> (8*(len-j-1)));
1197 }
1198 }
1199 /* No registers available, push the args onto the stack. */
1200 else
1201 {
1202 /* From here on, we don't care about regnum. */
1203 si = push_stack_item (si, contents, len);
1204 }
8818c391 1205 }
909cd28e 1206
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1207 /* Push args onto the stack. */
1208 while (si)
1209 {
1210 sp -= si->len;
1211 /* Add 1 to sp here to account for post decr nature of pushes. */
1212 write_memory (sp+1, si->data, si->len);
1213 si = pop_stack_item (si);
1214 }
3605c34a 1215
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1216 /* Set the return address. For the avr, the return address is the BP_ADDR.
1217 Need to push the return address onto the stack noting that it needs to be
1218 in big-endian order on the stack. */
1219 buf[0] = (return_pc >> 8) & 0xff;
1220 buf[1] = return_pc & 0xff;
3605c34a 1221
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1222 sp -= 2;
1223 write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */
3605c34a 1224
4add8633
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1225 /* Finally, update the SP register. */
1226 regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
1227 avr_convert_saddr_to_raw (sp));
3605c34a 1228
4add8633 1229 return sp;
3605c34a
TR
1230}
1231
8818c391
TR
1232/* Initialize the gdbarch structure for the AVR's. */
1233
1234static struct gdbarch *
2e5ff58c
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1235avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1236{
2e5ff58c
TR
1237 struct gdbarch *gdbarch;
1238 struct gdbarch_tdep *tdep;
8818c391
TR
1239
1240 /* Find a candidate among the list of pre-declared architectures. */
1241 arches = gdbarch_list_lookup_by_info (arches, &info);
1242 if (arches != NULL)
1243 return arches->gdbarch;
1244
1245 /* None found, create a new architecture from the information provided. */
1246 tdep = XMALLOC (struct gdbarch_tdep);
1247 gdbarch = gdbarch_alloc (&info, tdep);
1248
1249 /* If we ever need to differentiate the device types, do it here. */
1250 switch (info.bfd_arch_info->mach)
1251 {
1252 case bfd_mach_avr1:
1253 case bfd_mach_avr2:
1254 case bfd_mach_avr3:
1255 case bfd_mach_avr4:
1256 case bfd_mach_avr5:
1257 break;
1258 }
1259
1260 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1261 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1262 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1263 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1264 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1265 set_gdbarch_addr_bit (gdbarch, 32);
8818c391
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1266
1267 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1268 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1269 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1270
8da61cc4
DJ
1271 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1272 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1273 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
8818c391
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1274
1275 set_gdbarch_read_pc (gdbarch, avr_read_pc);
1276 set_gdbarch_write_pc (gdbarch, avr_write_pc);
8818c391 1277 set_gdbarch_read_sp (gdbarch, avr_read_sp);
8818c391
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1278
1279 set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);
1280
1281 set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
8818c391
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1282 set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);
1283
1284 set_gdbarch_register_name (gdbarch, avr_register_name);
866b76ea 1285 set_gdbarch_register_type (gdbarch, avr_register_type);
8818c391 1286
3605c34a 1287 set_gdbarch_extract_return_value (gdbarch, avr_extract_return_value);
8818c391
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1288 set_gdbarch_print_insn (gdbarch, print_insn_avr);
1289
4add8633 1290 set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
8818c391
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1291
1292 set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
1293 set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
8818c391 1294
8818c391 1295 set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
8818c391
TR
1296 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1297
909cd28e 1298 set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
8818c391 1299
336d1bba 1300 frame_unwind_append_sniffer (gdbarch, avr_frame_sniffer);
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1301 frame_base_set_default (gdbarch, &avr_frame_base);
1302
1303 set_gdbarch_unwind_dummy_id (gdbarch, avr_unwind_dummy_id);
1304
1305 set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
8818c391 1306
8818c391
TR
1307 return gdbarch;
1308}
1309
1310/* Send a query request to the avr remote target asking for values of the io
1311 registers. If args parameter is not NULL, then the user has requested info
1312 on a specific io register [This still needs implemented and is ignored for
1313 now]. The query string should be one of these forms:
1314
1315 "Ravr.io_reg" -> reply is "NN" number of io registers
1316
1317 "Ravr.io_reg:addr,len" where addr is first register and len is number of
1318 registers to be read. The reply should be "<NAME>,VV;" for each io register
1319 where, <NAME> is a string, and VV is the hex value of the register.
1320
1321 All io registers are 8-bit. */
1322
1323static void
1324avr_io_reg_read_command (char *args, int from_tty)
1325{
1e3ff5ad 1326 LONGEST bufsiz = 0;
13547ab6 1327 gdb_byte *buf;
2e5ff58c
TR
1328 char query[400];
1329 char *p;
1330 unsigned int nreg = 0;
1331 unsigned int val;
1332 int i, j, k, step;
8818c391 1333
8818c391 1334 /* Find out how many io registers the target has. */
13547ab6
DJ
1335 bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
1336 "avr.io_reg", &buf);
8818c391 1337
13547ab6 1338 if (bufsiz <= 0)
8818c391 1339 {
2e5ff58c 1340 fprintf_unfiltered (gdb_stderr,
13547ab6
DJ
1341 _("ERR: info io_registers NOT supported "
1342 "by current target\n"));
8818c391
TR
1343 return;
1344 }
1345
2e5ff58c 1346 if (sscanf (buf, "%x", &nreg) != 1)
8818c391 1347 {
2e5ff58c 1348 fprintf_unfiltered (gdb_stderr,
edefbb7c 1349 _("Error fetching number of io registers\n"));
13547ab6 1350 xfree (buf);
8818c391
TR
1351 return;
1352 }
1353
13547ab6
DJ
1354 xfree (buf);
1355
2e5ff58c 1356 reinitialize_more_filter ();
8818c391 1357
edefbb7c 1358 printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);
8818c391
TR
1359
1360 /* only fetch up to 8 registers at a time to keep the buffer small */
1361 step = 8;
1362
2e5ff58c 1363 for (i = 0; i < nreg; i += step)
8818c391 1364 {
91ccbfc1
TR
1365 /* how many registers this round? */
1366 j = step;
1367 if ((i+j) >= nreg)
1368 j = nreg - i; /* last block is less than 8 registers */
8818c391 1369
2e5ff58c 1370 snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
13547ab6
DJ
1371 bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
1372 query, &buf);
8818c391
TR
1373
1374 p = buf;
2e5ff58c
TR
1375 for (k = i; k < (i + j); k++)
1376 {
1377 if (sscanf (p, "%[^,],%x;", query, &val) == 2)
1378 {
1379 printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
1380 while ((*p != ';') && (*p != '\0'))
1381 p++;
1382 p++; /* skip over ';' */
1383 if (*p == '\0')
1384 break;
1385 }
1386 }
13547ab6
DJ
1387
1388 xfree (buf);
8818c391
TR
1389 }
1390}
1391
a78f21af
AC
1392extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */
1393
8818c391
TR
1394void
1395_initialize_avr_tdep (void)
1396{
1397 register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);
1398
1399 /* Add a new command to allow the user to query the avr remote target for
1400 the values of the io space registers in a saner way than just using
1401 `x/NNNb ADDR`. */
1402
1403 /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
1404 io_registers' to signify it is not available on other platforms. */
1405
1406 add_cmd ("io_registers", class_info, avr_io_reg_read_command,
1a966eab
AC
1407 _("query remote avr target for io space register values"),
1408 &infolist);
8818c391 1409}
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