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c906108c | 1 | /* Macro definitions for GDB on an Intel i[345]86. |
ac27f131 | 2 | Copyright (C) 1995, 1996, 2000 Free Software Foundation, Inc. |
c906108c | 3 | |
c5aa993b | 4 | This file is part of GDB. |
c906108c | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
c906108c | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
c906108c | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
20 | |
21 | #ifndef TM_I386_H | |
22 | #define TM_I386_H 1 | |
23 | ||
104c1213 | 24 | /* Forward decl's for prototypes */ |
c906108c SS |
25 | struct frame_info; |
26 | struct frame_saved_regs; | |
27 | struct type; | |
c906108c SS |
28 | |
29 | #define TARGET_BYTE_ORDER LITTLE_ENDIAN | |
30 | ||
ac27f131 MK |
31 | /* The format used for `long double' on almost all i386 targets is the |
32 | i387 extended floating-point format. In fact, of all targets in the | |
33 | GCC 2.95 tree, only OSF/1 does it different, and insists on having | |
34 | a `long double' that's not `long' at all. */ | |
35 | ||
36 | #define TARGET_LONG_DOUBLE_FORMAT &floatformat_i387_ext | |
37 | ||
38 | /* Although the i386 extended floating-point has only 80 significant | |
39 | bits, a `long double' actually takes up 96, probably to enforce | |
40 | alignment. */ | |
41 | ||
6e2e8c24 | 42 | #define TARGET_LONG_DOUBLE_BIT 96 |
ac27f131 | 43 | |
c906108c SS |
44 | /* Used for example in valprint.c:print_floating() to enable checking |
45 | for NaN's */ | |
46 | ||
7355ddba | 47 | #define IEEE_FLOAT (1) |
c906108c SS |
48 | |
49 | /* Number of traps that happen between exec'ing the shell to run an | |
50 | inferior, and when we finally get to the inferior code. This is 2 | |
51 | on most implementations. */ | |
52 | ||
53 | #define START_INFERIOR_TRAPS_EXPECTED 2 | |
54 | ||
55 | /* Offset from address of function to start of its code. | |
56 | Zero on most machines. */ | |
57 | ||
58 | #define FUNCTION_START_OFFSET 0 | |
59 | ||
60 | /* Advance PC across any function entry prologue instructions to reach some | |
61 | "real" code. */ | |
62 | ||
b83266a0 | 63 | #define SKIP_PROLOGUE(frompc) (i386_skip_prologue (frompc)) |
c906108c SS |
64 | |
65 | extern int i386_skip_prologue PARAMS ((int)); | |
66 | ||
67 | /* Immediately after a function call, return the saved pc. Can't always go | |
68 | through the frames for this because on some machines the new frame is not | |
69 | set up until the new function executes some instructions. */ | |
70 | ||
71 | #define SAVED_PC_AFTER_CALL(frame) (read_memory_integer (read_register (SP_REGNUM), 4)) | |
72 | ||
73 | /* Stack grows downward. */ | |
74 | ||
75 | #define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) | |
76 | ||
77 | /* Sequence of bytes for breakpoint instruction. */ | |
78 | ||
79 | #define BREAKPOINT {0xcc} | |
80 | ||
81 | /* Amount PC must be decremented by after a breakpoint. This is often the | |
82 | number of bytes in BREAKPOINT but not always. */ | |
83 | ||
84 | #define DECR_PC_AFTER_BREAK 1 | |
85 | ||
86 | /* Say how long (ordinary) registers are. This is a piece of bogosity | |
87 | used in push_word and a few other places; REGISTER_RAW_SIZE is the | |
88 | real way to know how big a register is. */ | |
89 | ||
90 | #define REGISTER_SIZE 4 | |
91 | ||
917317f4 JM |
92 | /* This register file is parameterized by two macros: |
93 | HAVE_I387_REGS --- register file should include i387 registers | |
94 | HAVE_SSE_REGS --- register file should include SSE registers | |
95 | If HAVE_SSE_REGS is #defined, then HAVE_I387_REGS must also be #defined. | |
96 | ||
97 | However, GDB code should not test those macros with #ifdef, since | |
98 | that makes code which is annoying to multi-arch. Instead, GDB code | |
99 | should check the values of NUM_GREGS, NUM_FREGS, and NUM_SSE_REGS, | |
100 | which will eventually get mapped onto architecture vector entries. | |
101 | ||
102 | It's okay to use the macros in tm-*.h files, though, since those | |
103 | files will get completely replaced when we multi-arch anyway. */ | |
104 | ||
105 | /* Number of general registers, present on every 32-bit x86 variant. */ | |
106 | #define NUM_GREGS (16) | |
107 | ||
108 | /* Number of floating-point unit registers. */ | |
109 | #ifdef HAVE_I387_REGS | |
110 | #define NUM_FREGS (16) | |
111 | #else | |
112 | #define NUM_FREGS (0) | |
113 | #endif | |
114 | ||
115 | /* Number of SSE registers. */ | |
116 | #ifdef HAVE_SSE_REGS | |
117 | #define NUM_SSE_REGS (9) | |
118 | #else | |
119 | #define NUM_SSE_REGS (0) | |
120 | #endif | |
121 | ||
122 | #define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_SSE_REGS) | |
123 | ||
124 | /* Largest number of registers we could have in any configuration. */ | |
125 | #define MAX_NUM_REGS (16 + 16 + 9) | |
c906108c SS |
126 | |
127 | /* Initializer for an array of names of registers. There should be at least | |
128 | NUM_REGS strings in this initializer. Any excess ones are simply ignored. | |
129 | The order of the first 8 registers must match the compiler's numbering | |
130 | scheme (which is the same as the 386 scheme) and also regmap in the various | |
131 | *-nat.c files. */ | |
132 | ||
917317f4 JM |
133 | #define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \ |
134 | "esp", "ebp", "esi", "edi", \ | |
135 | "eip", "eflags", "cs", "ss", \ | |
136 | "ds", "es", "fs", "gs", \ | |
137 | "st0", "st1", "st2", "st3", \ | |
138 | "st4", "st5", "st6", "st7", \ | |
e514a9d6 JM |
139 | "fctrl", "fstat", "ftag", "fiseg", \ |
140 | "fioff", "foseg", "fooff", "fop", \ | |
917317f4 JM |
141 | "xmm0", "xmm1", "xmm2", "xmm3", \ |
142 | "xmm4", "xmm5", "xmm6", "xmm7", \ | |
143 | "mxcsr" \ | |
144 | } | |
c906108c SS |
145 | |
146 | /* Register numbers of various important registers. | |
147 | Note that some of these values are "real" register numbers, | |
148 | and correspond to the general registers of the machine, | |
149 | and some are "phony" register numbers which are too large | |
150 | to be actual register numbers as far as the user is concerned | |
151 | but do serve to get the desired values when passed to read_register. */ | |
152 | ||
917317f4 JM |
153 | #define FP_REGNUM 5 /* (ebp) Contains address of executing stack |
154 | frame */ | |
c5aa993b JM |
155 | #define SP_REGNUM 4 /* (usp) Contains address of top of stack */ |
156 | #define PC_REGNUM 8 /* (eip) Contains program counter */ | |
157 | #define PS_REGNUM 9 /* (ps) Contains processor status */ | |
c906108c | 158 | |
917317f4 JM |
159 | /* These registers are present only if HAVE_I387_REGS is #defined. |
160 | We promise that FP0 .. FP7 will always be consecutive register numbers. */ | |
161 | #define FP0_REGNUM 16 /* first FPU floating-point register */ | |
162 | #define FP7_REGNUM 23 /* last FPU floating-point register */ | |
163 | ||
4ce44c66 JM |
164 | /* All of these control registers (except for FCOFF and FDOFF) are |
165 | sixteen bits long (at most) in the FPU, but are zero-extended to | |
166 | thirty-two bits in GDB's register file. This makes it easier to | |
167 | compute the size of the control register file, and somewhat easier | |
168 | to convert to and from the FSAVE instruction's 32-bit format. */ | |
917317f4 JM |
169 | #define FIRST_FPU_CTRL_REGNUM 24 |
170 | #define FCTRL_REGNUM 24 /* FPU control word */ | |
171 | #define FPC_REGNUM 24 /* old name for FCTRL_REGNUM */ | |
172 | #define FSTAT_REGNUM 25 /* FPU status word */ | |
173 | #define FTAG_REGNUM 26 /* FPU register tag word */ | |
174 | #define FCS_REGNUM 27 /* FPU instruction's code segment selector | |
175 | 16 bits, called "FPU Instruction Pointer | |
176 | Selector" in the x86 manuals */ | |
177 | #define FCOFF_REGNUM 28 /* FPU instruction's offset within segment | |
178 | ("Fpu Code OFFset") */ | |
179 | #define FDS_REGNUM 29 /* FPU operand's data segment */ | |
180 | #define FDOFF_REGNUM 30 /* FPU operand's offset within segment */ | |
181 | #define FOP_REGNUM 31 /* FPU opcode, bottom eleven bits */ | |
182 | #define LAST_FPU_CTRL_REGNUM 31 | |
183 | ||
184 | /* These registers are present only if HAVE_SSE_REGS is #defined. | |
185 | We promise that XMM0 .. XMM7 will always have consecutive reg numbers. */ | |
186 | #define XMM0_REGNUM 32 /* first SSE data register */ | |
187 | #define XMM7_REGNUM 39 /* last SSE data register */ | |
188 | #define MXCSR_REGNUM 40 /* Streaming SIMD Extension control/status */ | |
189 | ||
190 | #define IS_FP_REGNUM(n) (FP0_REGNUM <= (n) && (n) <= FP7_REGNUM) | |
191 | #define IS_SSE_REGNUM(n) (XMM0_REGNUM <= (n) && (n) <= XMM7_REGNUM) | |
192 | ||
193 | #define FPU_REG_RAW_SIZE (10) | |
194 | ||
195 | /* Sizes of individual register sets. These cover the entire register | |
196 | file, so summing up the sizes of those portions actually present | |
197 | yields REGISTER_BYTES. */ | |
198 | #define SIZEOF_GREGS (NUM_GREGS * 4) | |
199 | #define SIZEOF_FPU_REGS (8 * FPU_REG_RAW_SIZE) | |
200 | #define SIZEOF_FPU_CTRL_REGS \ | |
201 | ((LAST_FPU_CTRL_REGNUM - FIRST_FPU_CTRL_REGNUM + 1) * 4) | |
202 | #define SIZEOF_SSE_REGS (8 * 16 + 4) | |
203 | ||
c906108c SS |
204 | |
205 | /* Total amount of space needed to store our copies of the machine's register | |
206 | state, the array `registers'. */ | |
917317f4 JM |
207 | #ifdef HAVE_SSE_REGS |
208 | #define REGISTER_BYTES \ | |
209 | (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) | |
210 | #else | |
211 | #ifdef HAVE_I387_REGS | |
212 | #define REGISTER_BYTES (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS) | |
213 | #else | |
214 | #define REGISTER_BYTES (SIZEOF_GREGS) | |
215 | #endif | |
216 | #endif | |
c906108c SS |
217 | |
218 | /* Index within `registers' of the first byte of the space for register N. */ | |
917317f4 JM |
219 | #define REGISTER_BYTE(n) (i386_register_byte[(n)]) |
220 | extern int i386_register_byte[]; | |
c5aa993b | 221 | |
c906108c | 222 | /* Number of bytes of storage in the actual machine representation for |
917317f4 JM |
223 | register N. */ |
224 | #define REGISTER_RAW_SIZE(n) (i386_register_raw_size[(n)]) | |
225 | extern int i386_register_raw_size[]; | |
c906108c SS |
226 | |
227 | /* Largest value REGISTER_RAW_SIZE can have. */ | |
917317f4 | 228 | #define MAX_REGISTER_RAW_SIZE 16 |
c906108c SS |
229 | |
230 | /* Number of bytes of storage in the program's representation | |
231 | for register N. */ | |
917317f4 JM |
232 | #define REGISTER_VIRTUAL_SIZE(n) (i386_register_virtual_size[(n)]) |
233 | extern int i386_register_virtual_size[]; | |
c906108c SS |
234 | |
235 | /* Largest value REGISTER_VIRTUAL_SIZE can have. */ | |
917317f4 | 236 | #define MAX_REGISTER_VIRTUAL_SIZE 16 |
c906108c SS |
237 | |
238 | /* Return the GDB type object for the "standard" data type of data in | |
239 | register N. Perhaps si and di should go here, but potentially they | |
240 | could be used for things other than address. */ | |
241 | ||
917317f4 JM |
242 | #define REGISTER_VIRTUAL_TYPE(N) \ |
243 | (((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM) \ | |
244 | ? lookup_pointer_type (builtin_type_void) \ | |
ac27f131 | 245 | : IS_FP_REGNUM(N) ? builtin_type_long_double \ |
917317f4 JM |
246 | : IS_SSE_REGNUM(N) ? builtin_type_v4sf \ |
247 | : builtin_type_int) | |
248 | ||
249 | /* REGISTER_CONVERTIBLE(N) is true iff register N's virtual format is | |
250 | different from its raw format. Note that this definition assumes | |
251 | that the host supports IEEE 32-bit floats, since it doesn't say | |
252 | that SSE registers need conversion. Even if we can't find a | |
253 | counterexample, this is still sloppy. */ | |
254 | #define REGISTER_CONVERTIBLE(n) (IS_FP_REGNUM (n)) | |
255 | ||
ac27f131 MK |
256 | /* Convert data from raw format for register REGNUM in buffer FROM to |
257 | virtual format with type TYPE in buffer TO. */ | |
917317f4 | 258 | |
ac27f131 MK |
259 | #define REGISTER_CONVERT_TO_VIRTUAL(regnum, type, from, to) \ |
260 | i386_register_convert_to_virtual ((regnum), (type), (from), (to)); | |
261 | extern void i386_register_convert_to_virtual (int regnum, struct type *type, | |
262 | char *from, char *to); | |
917317f4 | 263 | |
ac27f131 MK |
264 | /* Convert data from virtual format with type TYPE in buffer FROM to |
265 | raw format for register REGNUM in buffer TO. */ | |
917317f4 | 266 | |
ac27f131 MK |
267 | #define REGISTER_CONVERT_TO_RAW(type, regnum, from, to) \ |
268 | i386_register_convert_to_raw ((type), (regnum), (from), (to)); | |
269 | extern void i386_register_convert_to_raw (struct type *type, int regnum, | |
270 | char *from, char *to); | |
c906108c | 271 | |
de57eccd JM |
272 | /* Print out the i387 floating point state. */ |
273 | #ifdef HAVE_I387_REGS | |
274 | extern void i387_float_info (void); | |
275 | #define FLOAT_INFO { i387_float_info (); } | |
276 | #endif | |
277 | ||
278 | \f | |
c906108c SS |
279 | /* Store the address of the place in which to copy the structure the |
280 | subroutine will return. This is called from call_function. */ | |
281 | ||
282 | #define STORE_STRUCT_RETURN(ADDR, SP) \ | |
283 | { char buf[REGISTER_SIZE]; \ | |
284 | (SP) -= sizeof (ADDR); \ | |
285 | store_address (buf, sizeof (ADDR), ADDR); \ | |
286 | write_memory ((SP), buf, sizeof (ADDR)); } | |
287 | ||
288 | /* Extract from an array REGBUF containing the (raw) register state | |
289 | a function return value of type TYPE, and copy that, in virtual format, | |
290 | into VALBUF. */ | |
291 | ||
ac27f131 MK |
292 | #define EXTRACT_RETURN_VALUE(type, regbuf, valbuf) \ |
293 | i386_extract_return_value ((type), (regbuf), (valbuf)) | |
294 | extern void i386_extract_return_value (struct type *type, char *regbuf, | |
295 | char *valbuf); | |
c906108c SS |
296 | |
297 | /* Write into appropriate registers a function return value of type TYPE, given | |
298 | in virtual format. */ | |
299 | ||
300 | #define STORE_RETURN_VALUE(TYPE,VALBUF) \ | |
301 | { \ | |
302 | if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \ | |
303 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), (VALBUF), \ | |
304 | TYPE_LENGTH (TYPE)); \ | |
305 | else \ | |
306 | write_register_bytes (0, (VALBUF), TYPE_LENGTH (TYPE)); \ | |
307 | } | |
308 | ||
309 | /* Extract from an array REGBUF containing the (raw) register state the address | |
310 | in which a function should return its structure value, as a CORE_ADDR (or an | |
311 | expression that can be used as one). */ | |
312 | ||
313 | #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF)) | |
314 | ||
315 | /* The following redefines make backtracing through sigtramp work. | |
316 | They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp | |
317 | from the sigcontext structure which is pushed by the kernel on the | |
318 | user stack, along with a pointer to it. */ | |
319 | ||
320 | /* FRAME_CHAIN takes a frame's nominal address and produces the frame's | |
321 | chain-pointer. | |
322 | In the case of the i386, the frame's nominal address | |
323 | is the address of a 4-byte word containing the calling frame's address. */ | |
324 | ||
325 | #define FRAME_CHAIN(thisframe) \ | |
326 | ((thisframe)->signal_handler_caller \ | |
327 | ? (thisframe)->frame \ | |
328 | : (!inside_entry_file ((thisframe)->pc) \ | |
329 | ? read_memory_integer ((thisframe)->frame, 4) \ | |
330 | : 0)) | |
331 | ||
332 | /* A macro that tells us whether the function invocation represented | |
333 | by FI does not have a frame on the stack associated with it. If it | |
334 | does not, FRAMELESS is set to 1, else 0. */ | |
335 | ||
392a587b JM |
336 | #define FRAMELESS_FUNCTION_INVOCATION(FI) \ |
337 | (((FI)->signal_handler_caller) ? 0 : frameless_look_for_prologue(FI)) | |
c906108c SS |
338 | |
339 | /* Saved Pc. Get it from sigcontext if within sigtramp. */ | |
340 | ||
341 | #define FRAME_SAVED_PC(FRAME) \ | |
342 | (((FRAME)->signal_handler_caller \ | |
343 | ? sigtramp_saved_pc (FRAME) \ | |
344 | : read_memory_integer ((FRAME)->frame + 4, 4)) \ | |
345 | ) | |
346 | ||
347 | extern CORE_ADDR sigtramp_saved_pc PARAMS ((struct frame_info *)); | |
348 | ||
349 | #define FRAME_ARGS_ADDRESS(fi) ((fi)->frame) | |
350 | ||
351 | #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame) | |
352 | ||
353 | /* Return number of args passed to a frame. Can return -1, meaning no way | |
354 | to tell, which is typical now that the C compiler delays popping them. */ | |
355 | ||
392a587b | 356 | #define FRAME_NUM_ARGS(fi) (i386_frame_num_args(fi)) |
c906108c SS |
357 | |
358 | extern int i386_frame_num_args PARAMS ((struct frame_info *)); | |
359 | ||
360 | /* Return number of bytes at start of arglist that are not really args. */ | |
361 | ||
362 | #define FRAME_ARGS_SKIP 8 | |
363 | ||
364 | /* Put here the code to store, into a struct frame_saved_regs, | |
365 | the addresses of the saved registers of frame described by FRAME_INFO. | |
366 | This includes special registers such as pc and fp saved in special | |
367 | ways in the stack frame. sp is even more special: | |
368 | the address we return for it IS the sp for the next frame. */ | |
369 | ||
1211c4e4 AC |
370 | extern void i386_frame_init_saved_regs PARAMS ((struct frame_info *)); |
371 | #define FRAME_INIT_SAVED_REGS(FI) i386_frame_init_saved_regs (FI) | |
c906108c | 372 | |
c906108c | 373 | \f |
c5aa993b | 374 | |
c906108c SS |
375 | /* Things needed for making the inferior call functions. */ |
376 | ||
2df3850c JM |
377 | /* "An argument's size is increased, if necessary, to make it a |
378 | multiple of [32 bit] words. This may require tail padding, | |
379 | depending on the size of the argument" - from the x86 ABI. */ | |
380 | #define PARM_BOUNDARY 32 | |
381 | ||
c906108c SS |
382 | /* Push an empty stack frame, to record the current PC, etc. */ |
383 | ||
384 | #define PUSH_DUMMY_FRAME { i386_push_dummy_frame (); } | |
385 | ||
386 | extern void i386_push_dummy_frame PARAMS ((void)); | |
387 | ||
388 | /* Discard from the stack the innermost frame, restoring all registers. */ | |
389 | ||
390 | #define POP_FRAME { i386_pop_frame (); } | |
391 | ||
392 | extern void i386_pop_frame PARAMS ((void)); | |
c906108c | 393 | \f |
c5aa993b | 394 | |
c906108c SS |
395 | /* this is |
396 | * call 11223344 (32 bit relative) | |
397 | * int3 | |
398 | */ | |
399 | ||
400 | #define CALL_DUMMY { 0x223344e8, 0xcc11 } | |
401 | ||
402 | #define CALL_DUMMY_LENGTH 8 | |
403 | ||
c5aa993b | 404 | #define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */ |
c906108c SS |
405 | |
406 | #define CALL_DUMMY_BREAKPOINT_OFFSET 5 | |
407 | ||
408 | /* Insert the specified number of args and function address | |
409 | into a call sequence of the above form stored at DUMMYNAME. */ | |
410 | ||
411 | #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \ | |
412 | { \ | |
413 | int from, to, delta, loc; \ | |
414 | loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); \ | |
415 | from = loc + 5; \ | |
416 | to = (int)(fun); \ | |
417 | delta = to - from; \ | |
418 | *((char *)(dummyname) + 1) = (delta & 0xff); \ | |
419 | *((char *)(dummyname) + 2) = ((delta >> 8) & 0xff); \ | |
420 | *((char *)(dummyname) + 3) = ((delta >> 16) & 0xff); \ | |
421 | *((char *)(dummyname) + 4) = ((delta >> 24) & 0xff); \ | |
422 | } | |
423 | ||
424 | extern void print_387_control_word PARAMS ((unsigned int)); | |
425 | extern void print_387_status_word PARAMS ((unsigned int)); | |
426 | ||
427 | /* Offset from SP to first arg on stack at first instruction of a function */ | |
428 | ||
429 | #define SP_ARG0 (1 * 4) | |
430 | ||
431 | #endif /* ifndef TM_I386_H */ |