From J.T.: Convert i386 to updated frame_saved_regs.
[deliverable/binutils-gdb.git] / gdb / config / i386 / tm-i386.h
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1/* Macro definitions for GDB on an Intel i[345]86.
2 Copyright (C) 1995, 1996 Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
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6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
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11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
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16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
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20
21#ifndef TM_I386_H
22#define TM_I386_H 1
23
104c1213 24/* Forward decl's for prototypes */
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25struct frame_info;
26struct frame_saved_regs;
27struct type;
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28
29#define TARGET_BYTE_ORDER LITTLE_ENDIAN
30
31/* Used for example in valprint.c:print_floating() to enable checking
32 for NaN's */
33
34#define IEEE_FLOAT
35
36/* Number of traps that happen between exec'ing the shell to run an
37 inferior, and when we finally get to the inferior code. This is 2
38 on most implementations. */
39
40#define START_INFERIOR_TRAPS_EXPECTED 2
41
42/* Offset from address of function to start of its code.
43 Zero on most machines. */
44
45#define FUNCTION_START_OFFSET 0
46
47/* Advance PC across any function entry prologue instructions to reach some
48 "real" code. */
49
b83266a0 50#define SKIP_PROLOGUE(frompc) (i386_skip_prologue (frompc))
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51
52extern int i386_skip_prologue PARAMS ((int));
53
54/* Immediately after a function call, return the saved pc. Can't always go
55 through the frames for this because on some machines the new frame is not
56 set up until the new function executes some instructions. */
57
58#define SAVED_PC_AFTER_CALL(frame) (read_memory_integer (read_register (SP_REGNUM), 4))
59
60/* Stack grows downward. */
61
62#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
63
64/* Sequence of bytes for breakpoint instruction. */
65
66#define BREAKPOINT {0xcc}
67
68/* Amount PC must be decremented by after a breakpoint. This is often the
69 number of bytes in BREAKPOINT but not always. */
70
71#define DECR_PC_AFTER_BREAK 1
72
73/* Say how long (ordinary) registers are. This is a piece of bogosity
74 used in push_word and a few other places; REGISTER_RAW_SIZE is the
75 real way to know how big a register is. */
76
77#define REGISTER_SIZE 4
78
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79/* This register file is parameterized by two macros:
80 HAVE_I387_REGS --- register file should include i387 registers
81 HAVE_SSE_REGS --- register file should include SSE registers
82 If HAVE_SSE_REGS is #defined, then HAVE_I387_REGS must also be #defined.
83
84 However, GDB code should not test those macros with #ifdef, since
85 that makes code which is annoying to multi-arch. Instead, GDB code
86 should check the values of NUM_GREGS, NUM_FREGS, and NUM_SSE_REGS,
87 which will eventually get mapped onto architecture vector entries.
88
89 It's okay to use the macros in tm-*.h files, though, since those
90 files will get completely replaced when we multi-arch anyway. */
91
92/* Number of general registers, present on every 32-bit x86 variant. */
93#define NUM_GREGS (16)
94
95/* Number of floating-point unit registers. */
96#ifdef HAVE_I387_REGS
97#define NUM_FREGS (16)
98#else
99#define NUM_FREGS (0)
100#endif
101
102/* Number of SSE registers. */
103#ifdef HAVE_SSE_REGS
104#define NUM_SSE_REGS (9)
105#else
106#define NUM_SSE_REGS (0)
107#endif
108
109#define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_SSE_REGS)
110
111/* Largest number of registers we could have in any configuration. */
112#define MAX_NUM_REGS (16 + 16 + 9)
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113
114/* Initializer for an array of names of registers. There should be at least
115 NUM_REGS strings in this initializer. Any excess ones are simply ignored.
116 The order of the first 8 registers must match the compiler's numbering
117 scheme (which is the same as the 386 scheme) and also regmap in the various
118 *-nat.c files. */
119
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120#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \
121 "esp", "ebp", "esi", "edi", \
122 "eip", "eflags", "cs", "ss", \
123 "ds", "es", "fs", "gs", \
124 "st0", "st1", "st2", "st3", \
125 "st4", "st5", "st6", "st7", \
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126 "fctrl", "fstat", "ftag", "fiseg", \
127 "fioff", "foseg", "fooff", "fop", \
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128 "xmm0", "xmm1", "xmm2", "xmm3", \
129 "xmm4", "xmm5", "xmm6", "xmm7", \
130 "mxcsr" \
131 }
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132
133/* Register numbers of various important registers.
134 Note that some of these values are "real" register numbers,
135 and correspond to the general registers of the machine,
136 and some are "phony" register numbers which are too large
137 to be actual register numbers as far as the user is concerned
138 but do serve to get the desired values when passed to read_register. */
139
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140#define FP_REGNUM 5 /* (ebp) Contains address of executing stack
141 frame */
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142#define SP_REGNUM 4 /* (usp) Contains address of top of stack */
143#define PC_REGNUM 8 /* (eip) Contains program counter */
144#define PS_REGNUM 9 /* (ps) Contains processor status */
c906108c 145
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146/* These registers are present only if HAVE_I387_REGS is #defined.
147 We promise that FP0 .. FP7 will always be consecutive register numbers. */
148#define FP0_REGNUM 16 /* first FPU floating-point register */
149#define FP7_REGNUM 23 /* last FPU floating-point register */
150
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151/* All of these control registers (except for FCOFF and FDOFF) are
152 sixteen bits long (at most) in the FPU, but are zero-extended to
153 thirty-two bits in GDB's register file. This makes it easier to
154 compute the size of the control register file, and somewhat easier
155 to convert to and from the FSAVE instruction's 32-bit format. */
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156#define FIRST_FPU_CTRL_REGNUM 24
157#define FCTRL_REGNUM 24 /* FPU control word */
158#define FPC_REGNUM 24 /* old name for FCTRL_REGNUM */
159#define FSTAT_REGNUM 25 /* FPU status word */
160#define FTAG_REGNUM 26 /* FPU register tag word */
161#define FCS_REGNUM 27 /* FPU instruction's code segment selector
162 16 bits, called "FPU Instruction Pointer
163 Selector" in the x86 manuals */
164#define FCOFF_REGNUM 28 /* FPU instruction's offset within segment
165 ("Fpu Code OFFset") */
166#define FDS_REGNUM 29 /* FPU operand's data segment */
167#define FDOFF_REGNUM 30 /* FPU operand's offset within segment */
168#define FOP_REGNUM 31 /* FPU opcode, bottom eleven bits */
169#define LAST_FPU_CTRL_REGNUM 31
170
171/* These registers are present only if HAVE_SSE_REGS is #defined.
172 We promise that XMM0 .. XMM7 will always have consecutive reg numbers. */
173#define XMM0_REGNUM 32 /* first SSE data register */
174#define XMM7_REGNUM 39 /* last SSE data register */
175#define MXCSR_REGNUM 40 /* Streaming SIMD Extension control/status */
176
177#define IS_FP_REGNUM(n) (FP0_REGNUM <= (n) && (n) <= FP7_REGNUM)
178#define IS_SSE_REGNUM(n) (XMM0_REGNUM <= (n) && (n) <= XMM7_REGNUM)
179
180#define FPU_REG_RAW_SIZE (10)
181
182/* Sizes of individual register sets. These cover the entire register
183 file, so summing up the sizes of those portions actually present
184 yields REGISTER_BYTES. */
185#define SIZEOF_GREGS (NUM_GREGS * 4)
186#define SIZEOF_FPU_REGS (8 * FPU_REG_RAW_SIZE)
187#define SIZEOF_FPU_CTRL_REGS \
188 ((LAST_FPU_CTRL_REGNUM - FIRST_FPU_CTRL_REGNUM + 1) * 4)
189#define SIZEOF_SSE_REGS (8 * 16 + 4)
190
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191
192/* Total amount of space needed to store our copies of the machine's register
193 state, the array `registers'. */
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194#ifdef HAVE_SSE_REGS
195#define REGISTER_BYTES \
196 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS)
197#else
198#ifdef HAVE_I387_REGS
199#define REGISTER_BYTES (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS)
200#else
201#define REGISTER_BYTES (SIZEOF_GREGS)
202#endif
203#endif
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204
205/* Index within `registers' of the first byte of the space for register N. */
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206#define REGISTER_BYTE(n) (i386_register_byte[(n)])
207extern int i386_register_byte[];
c5aa993b 208
c906108c 209/* Number of bytes of storage in the actual machine representation for
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210 register N. */
211#define REGISTER_RAW_SIZE(n) (i386_register_raw_size[(n)])
212extern int i386_register_raw_size[];
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213
214/* Largest value REGISTER_RAW_SIZE can have. */
917317f4 215#define MAX_REGISTER_RAW_SIZE 16
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216
217/* Number of bytes of storage in the program's representation
218 for register N. */
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219#define REGISTER_VIRTUAL_SIZE(n) (i386_register_virtual_size[(n)])
220extern int i386_register_virtual_size[];
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221
222/* Largest value REGISTER_VIRTUAL_SIZE can have. */
917317f4 223#define MAX_REGISTER_VIRTUAL_SIZE 16
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224
225/* Return the GDB type object for the "standard" data type of data in
226 register N. Perhaps si and di should go here, but potentially they
227 could be used for things other than address. */
228
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229#define REGISTER_VIRTUAL_TYPE(N) \
230 (((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM) \
231 ? lookup_pointer_type (builtin_type_void) \
232 : IS_FP_REGNUM(N) ? builtin_type_double \
233 : IS_SSE_REGNUM(N) ? builtin_type_v4sf \
234 : builtin_type_int)
235
236/* REGISTER_CONVERTIBLE(N) is true iff register N's virtual format is
237 different from its raw format. Note that this definition assumes
238 that the host supports IEEE 32-bit floats, since it doesn't say
239 that SSE registers need conversion. Even if we can't find a
240 counterexample, this is still sloppy. */
241#define REGISTER_CONVERTIBLE(n) (IS_FP_REGNUM (n))
242
243/* Convert data from raw format for register REGNUM in buffer FROM
244 to virtual format with type TYPE in buffer TO. */
245extern void i387_to_double (char *, char *);
246
247#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
248{ \
249 double val; \
250 i387_to_double ((FROM), (char *)&val); \
251 store_floating ((TO), TYPE_LENGTH (TYPE), val); \
252}
253
254extern void double_to_i387 (char *, char *);
255
256#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
257{ \
258 double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
259 double_to_i387((char *)&val, (TO)); \
260}
c906108c 261
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262/* Print out the i387 floating point state. */
263#ifdef HAVE_I387_REGS
264extern void i387_float_info (void);
265#define FLOAT_INFO { i387_float_info (); }
266#endif
267
268\f
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269/* Store the address of the place in which to copy the structure the
270 subroutine will return. This is called from call_function. */
271
272#define STORE_STRUCT_RETURN(ADDR, SP) \
273 { char buf[REGISTER_SIZE]; \
274 (SP) -= sizeof (ADDR); \
275 store_address (buf, sizeof (ADDR), ADDR); \
276 write_memory ((SP), buf, sizeof (ADDR)); }
277
278/* Extract from an array REGBUF containing the (raw) register state
279 a function return value of type TYPE, and copy that, in virtual format,
280 into VALBUF. */
281
282#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
283 i386_extract_return_value ((TYPE),(REGBUF),(VALBUF))
284
c5aa993b 285extern void i386_extract_return_value PARAMS ((struct type *, char[], char *));
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286
287/* Write into appropriate registers a function return value of type TYPE, given
288 in virtual format. */
289
290#define STORE_RETURN_VALUE(TYPE,VALBUF) \
291 { \
292 if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
293 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), (VALBUF), \
294 TYPE_LENGTH (TYPE)); \
295 else \
296 write_register_bytes (0, (VALBUF), TYPE_LENGTH (TYPE)); \
297 }
298
299/* Extract from an array REGBUF containing the (raw) register state the address
300 in which a function should return its structure value, as a CORE_ADDR (or an
301 expression that can be used as one). */
302
303#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
304
305/* The following redefines make backtracing through sigtramp work.
306 They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp
307 from the sigcontext structure which is pushed by the kernel on the
308 user stack, along with a pointer to it. */
309
310/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
311 chain-pointer.
312 In the case of the i386, the frame's nominal address
313 is the address of a 4-byte word containing the calling frame's address. */
314
315#define FRAME_CHAIN(thisframe) \
316 ((thisframe)->signal_handler_caller \
317 ? (thisframe)->frame \
318 : (!inside_entry_file ((thisframe)->pc) \
319 ? read_memory_integer ((thisframe)->frame, 4) \
320 : 0))
321
322/* A macro that tells us whether the function invocation represented
323 by FI does not have a frame on the stack associated with it. If it
324 does not, FRAMELESS is set to 1, else 0. */
325
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326#define FRAMELESS_FUNCTION_INVOCATION(FI) \
327 (((FI)->signal_handler_caller) ? 0 : frameless_look_for_prologue(FI))
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328
329/* Saved Pc. Get it from sigcontext if within sigtramp. */
330
331#define FRAME_SAVED_PC(FRAME) \
332 (((FRAME)->signal_handler_caller \
333 ? sigtramp_saved_pc (FRAME) \
334 : read_memory_integer ((FRAME)->frame + 4, 4)) \
335 )
336
337extern CORE_ADDR sigtramp_saved_pc PARAMS ((struct frame_info *));
338
339#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
340
341#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
342
343/* Return number of args passed to a frame. Can return -1, meaning no way
344 to tell, which is typical now that the C compiler delays popping them. */
345
392a587b 346#define FRAME_NUM_ARGS(fi) (i386_frame_num_args(fi))
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347
348extern int i386_frame_num_args PARAMS ((struct frame_info *));
349
350/* Return number of bytes at start of arglist that are not really args. */
351
352#define FRAME_ARGS_SKIP 8
353
354/* Put here the code to store, into a struct frame_saved_regs,
355 the addresses of the saved registers of frame described by FRAME_INFO.
356 This includes special registers such as pc and fp saved in special
357 ways in the stack frame. sp is even more special:
358 the address we return for it IS the sp for the next frame. */
359
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360extern void i386_frame_init_saved_regs PARAMS ((struct frame_info *));
361#define FRAME_INIT_SAVED_REGS(FI) i386_frame_init_saved_regs (FI)
c906108c 362
c906108c 363\f
c5aa993b 364
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365/* Things needed for making the inferior call functions. */
366
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367/* "An argument's size is increased, if necessary, to make it a
368 multiple of [32 bit] words. This may require tail padding,
369 depending on the size of the argument" - from the x86 ABI. */
370#define PARM_BOUNDARY 32
371
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372/* Push an empty stack frame, to record the current PC, etc. */
373
374#define PUSH_DUMMY_FRAME { i386_push_dummy_frame (); }
375
376extern void i386_push_dummy_frame PARAMS ((void));
377
378/* Discard from the stack the innermost frame, restoring all registers. */
379
380#define POP_FRAME { i386_pop_frame (); }
381
382extern void i386_pop_frame PARAMS ((void));
c906108c 383\f
c5aa993b 384
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385/* this is
386 * call 11223344 (32 bit relative)
387 * int3
388 */
389
390#define CALL_DUMMY { 0x223344e8, 0xcc11 }
391
392#define CALL_DUMMY_LENGTH 8
393
c5aa993b 394#define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */
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395
396#define CALL_DUMMY_BREAKPOINT_OFFSET 5
397
398/* Insert the specified number of args and function address
399 into a call sequence of the above form stored at DUMMYNAME. */
400
401#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
402{ \
403 int from, to, delta, loc; \
404 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); \
405 from = loc + 5; \
406 to = (int)(fun); \
407 delta = to - from; \
408 *((char *)(dummyname) + 1) = (delta & 0xff); \
409 *((char *)(dummyname) + 2) = ((delta >> 8) & 0xff); \
410 *((char *)(dummyname) + 3) = ((delta >> 16) & 0xff); \
411 *((char *)(dummyname) + 4) = ((delta >> 24) & 0xff); \
412}
413
414extern void print_387_control_word PARAMS ((unsigned int));
415extern void print_387_status_word PARAMS ((unsigned int));
416
417/* Offset from SP to first arg on stack at first instruction of a function */
418
419#define SP_ARG0 (1 * 4)
420
421#endif /* ifndef TM_I386_H */
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