[deliverable/binutils-gdb.git] / gdb / config / mips / tm-irix5.h

/* Target machine description for SGI Iris under Irix 5, for GDB.
   Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000
   Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "mips/tm-mips.h"

/* Redefine register numbers for SGI. */

#undef MIPS_REGISTER_NAMES
#undef FP0_REGNUM
#undef PC_REGNUM
#undef HI_REGNUM
#undef LO_REGNUM
#undef CAUSE_REGNUM
#undef BADVADDR_REGNUM
#undef FCRCS_REGNUM
#undef FCRIR_REGNUM

/* Initializer for an array of names for registers 32 and above.
   There should be NUM_REGS-32 strings in this initializer.  */

#define MIPS_REGISTER_NAMES 	\
    {	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
	"f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
	"f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
	"pc",	"cause", "bad",	"hi",	"lo",	"fsr",  "fir" \
    }

/* Register numbers of various important registers.
   Note that some of these values are "real" register numbers,
   and correspond to the general registers of the machine,
   and some are "phony" register numbers which are too large
   to be actual register numbers as far as the user is concerned
   but do serve to get the desired values when passed to read_register.  */

#define FP0_REGNUM 32		/* Floating point register 0 (single float) */
#define PC_REGNUM 64		/* Contains program counter */
#define CAUSE_REGNUM 65		/* describes last exception */
#define BADVADDR_REGNUM 66	/* bad vaddr for addressing exception */
#define HI_REGNUM 67		/* Multiple/divide temp */
#define LO_REGNUM 68		/* ... */
#define FCRCS_REGNUM 69		/* FP control/status */
#define FCRIR_REGNUM 70		/* FP implementation/revision */

/* Offsets for register values in _sigtramp frame.
   sigcontext is immediately above the _sigtramp frame on Irix.  */
#define SIGFRAME_BASE		0x0
#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 2 * 4)
#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 3 * 4)
#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 3 * 4 + 32 * 4 + 4)

/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
   _MIPS_SIM in a tm-*.h file is simply wrong!  Those are
   host-dependant macros (provided by /usr/include) and stop any
   chance of the target being cross compiled */
#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
/*
 * Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
 */

#undef  MIPS_REGISTER_BYTE
#define MIPS_REGISTER_BYTE(N) \
     (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
      ((N) < FP0_REGNUM + 32) ?     \
      FP0_REGNUM * MIPS_REGSIZE + \
      ((N) - FP0_REGNUM) * sizeof(double) : \
      32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)

#undef  MIPS_REGISTER_TYPE
#define MIPS_REGISTER_TYPE(N) \
	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
	 : builtin_type_int)

#endif /* N32 */


/* The signal handler trampoline is called _sigtramp.  */
#undef IN_SIGTRAMP
#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))

/* Irix 5 saves a full 64 bits for each register.  We skip 2 * 4 to
   get to the saved PC (the register mask and status register are both
   32 bits) and then another 4 to get to the lower 32 bits.  We skip
   the same 4 bytes, plus the 8 bytes for the PC to get to the
   registers, and add another 4 to get to the lower 32 bits.  We skip
   8 bytes per register.  */
#undef SIGFRAME_PC_OFF
#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 2 * 4 + 4)
#undef SIGFRAME_REGSAVE_OFF
#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 4)
#undef SIGFRAME_FPREGSAVE_OFF
#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
#define SIGFRAME_REG_SIZE	8
Commit	Line	Data
c906108c	1	/* Target machine description for SGI Iris under Irix 5, for GDB.
b6ba6518 KB	2	Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000
b6ba6518 KB	3	Free Software Foundation, Inc.
c906108c	4
c5aa993b	5	This file is part of GDB.
c906108c	6
c5aa993b JM	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
c906108c	11
c5aa993b JM	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
c906108c	16
c5aa993b JM	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 59 Temple Place - Suite 330,
	20	Boston, MA 02111-1307, USA. */
c906108c	21
0ddabb4c AC	22	#include "mips/tm-mips.h"
	23
	24	/* Redefine register numbers for SGI. */
	25
	26	#undef MIPS_REGISTER_NAMES
	27	#undef FP0_REGNUM
	28	#undef PC_REGNUM
	29	#undef HI_REGNUM
	30	#undef LO_REGNUM
	31	#undef CAUSE_REGNUM
	32	#undef BADVADDR_REGNUM
	33	#undef FCRCS_REGNUM
	34	#undef FCRIR_REGNUM
	35
	36	/* Initializer for an array of names for registers 32 and above.
	37	There should be NUM_REGS-32 strings in this initializer. */
	38
	39	#define MIPS_REGISTER_NAMES \
	40	{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
	41	"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
	42	"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
	43	"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
	44	"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
	45	}
	46
	47	/* Register numbers of various important registers.
	48	Note that some of these values are "real" register numbers,
	49	and correspond to the general registers of the machine,
	50	and some are "phony" register numbers which are too large
	51	to be actual register numbers as far as the user is concerned
	52	but do serve to get the desired values when passed to read_register. */
	53
	54	#define FP0_REGNUM 32 /* Floating point register 0 (single float) */
	55	#define PC_REGNUM 64 /* Contains program counter */
	56	#define CAUSE_REGNUM 65 /* describes last exception */
	57	#define BADVADDR_REGNUM 66 /* bad vaddr for addressing exception */
	58	#define HI_REGNUM 67 /* Multiple/divide temp */
	59	#define LO_REGNUM 68 /* ... */
	60	#define FCRCS_REGNUM 69 /* FP control/status */
	61	#define FCRIR_REGNUM 70 /* FP implementation/revision */
	62
	63	/* Offsets for register values in _sigtramp frame.
	64	sigcontext is immediately above the _sigtramp frame on Irix. */
	65	#define SIGFRAME_BASE 0x0
	66	#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
	67	#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
	68	#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 3 * 4 + 32 * 4 + 4)
c906108c	69
d929b26f AC	70	/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
	71	_MIPS_SIM in a tm-*.h file is simply wrong! Those are
	72	host-dependant macros (provided by /usr/include) and stop any
	73	chance of the target being cross compiled */
c906108c SS	74	#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
	75	/*
	76	* Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
	77	*/
	78
a4b8ebc8 AC	79	#undef MIPS_REGISTER_BYTE
a4b8ebc8 AC	80	#define MIPS_REGISTER_BYTE(N) \
c906108c SS	81	(((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
	82	((N) < FP0_REGNUM + 32) ? \
	83	FP0_REGNUM * MIPS_REGSIZE + \
	84	((N) - FP0_REGNUM) * sizeof(double) : \
	85	32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
	86
a4b8ebc8 AC	87	#undef MIPS_REGISTER_TYPE
a4b8ebc8 AC	88	#define MIPS_REGISTER_TYPE(N) \
c906108c SS	89	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
	90	: ((N) == 32 /SR/) ? builtin_type_uint32 \
	91	: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
	92	: builtin_type_int)
	93
c906108c SS	94	#endif /* N32 */
c906108c SS	95
c906108c SS	96
	97	/* The signal handler trampoline is called _sigtramp. */
	98	#undef IN_SIGTRAMP
	99	#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
	100
	101	/* Irix 5 saves a full 64 bits for each register. We skip 2 * 4 to
	102	get to the saved PC (the register mask and status register are both
	103	32 bits) and then another 4 to get to the lower 32 bits. We skip
	104	the same 4 bytes, plus the 8 bytes for the PC to get to the
	105	registers, and add another 4 to get to the lower 32 bits. We skip
	106	8 bytes per register. */
	107	#undef SIGFRAME_PC_OFF
	108	#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4 + 4)
	109	#undef SIGFRAME_REGSAVE_OFF
	110	#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 4)
	111	#undef SIGFRAME_FPREGSAVE_OFF
	112	#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
	113	#define SIGFRAME_REG_SIZE 8