[deliverable/binutils-gdb.git] / gdb / config / mips / tm-irix6.h

/* Target machine description for SGI Iris under Irix 6.x, for GDB.

   Copyright 2001, 2002 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "mips/tm-mips64.h"
#include "solib.h"

/* Redefine register numbers for SGI. */

#undef MIPS_REGISTER_NAMES
#undef FP0_REGNUM
#undef PC_REGNUM
#undef HI_REGNUM
#undef LO_REGNUM
#undef CAUSE_REGNUM
#undef BADVADDR_REGNUM
#undef FCRCS_REGNUM
#undef FCRIR_REGNUM

/* Initializer for an array of names for registers 32 and above.
   There should be NUM_REGS-32 strings in this initializer.  */

#define MIPS_REGISTER_NAMES 	\
    {	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
	"f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
	"f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
	"pc",	"cause", "bad",	"hi",	"lo",	"fsr",  "fir" \
    }

/* Register numbers of various important registers.
   Note that some of these values are "real" register numbers,
   and correspond to the general registers of the machine,
   and some are "phony" register numbers which are too large
   to be actual register numbers as far as the user is concerned
   but do serve to get the desired values when passed to read_register.  */

#define FP0_REGNUM 32		/* Floating point register 0 (single float) */
#define PC_REGNUM 64		/* Contains program counter */
#define CAUSE_REGNUM 65		/* describes last exception */
#define BADVADDR_REGNUM 66	/* bad vaddr for addressing exception */
#define HI_REGNUM 67		/* Multiple/divide temp */
#define LO_REGNUM 68		/* ... */
#define FCRCS_REGNUM 69		/* FP control/status */
#define FCRIR_REGNUM 70		/* FP implementation/revision */


#undef  MIPS_REGISTER_BYTE
#define MIPS_REGISTER_BYTE(N) \
     (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
      ((N) < FP0_REGNUM + 32) ?     \
      FP0_REGNUM * MIPS_REGSIZE + \
      ((N) - FP0_REGNUM) * sizeof(double) : \
      32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)

/* The signal handler trampoline is called _sigtramp.  */
#undef IN_SIGTRAMP
#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))

/* Offsets for register values in _sigtramp frame.
   sigcontext is immediately above the _sigtramp frame on Irix.  */
#undef SIGFRAME_BASE
#define SIGFRAME_BASE		0

/* Irix 5 saves a full 64 bits for each register.  We skip 2 * 4 to
   get to the saved PC (the register mask and status register are both
   32 bits) and then another 4 to get to the lower 32 bits.  We skip
   the same 4 bytes, plus the 8 bytes for the PC to get to the
   registers, and add another 4 to get to the lower 32 bits.  We skip
   8 bytes per register.  */
#undef SIGFRAME_PC_OFF
#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 2 * 4 + 4)
#undef SIGFRAME_REGSAVE_OFF
#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 4)
#undef SIGFRAME_FPREGSAVE_OFF
#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
#define SIGFRAME_REG_SIZE	8

/* Undefine those methods which have been multiarched.  */

/* Undefine MIPS_REGISTER_TYPE, so that GDB uses real C code in
   mips_register_type() to return the register type, instead of
   relying on this macro.  */
#undef MIPS_REGISTER_TYPE
Commit	Line	Data
1d06468c	1	/* Target machine description for SGI Iris under Irix 6.x, for GDB.
a094c6fb AC	2
a094c6fb AC	3	Copyright 2001, 2002 Free Software Foundation, Inc.
1d06468c EZ	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 59 Temple Place - Suite 330,
	20	Boston, MA 02111-1307, USA. */
	21
5e045346	22	#include "mips/tm-mips64.h"
d154bee2	23	#include "solib.h"
7fe7e44e	24
1d06468c EZ	25	/* Redefine register numbers for SGI. */
1d06468c EZ	26
1d06468c EZ	27	#undef MIPS_REGISTER_NAMES
	28	#undef FP0_REGNUM
	29	#undef PC_REGNUM
	30	#undef HI_REGNUM
	31	#undef LO_REGNUM
	32	#undef CAUSE_REGNUM
	33	#undef BADVADDR_REGNUM
	34	#undef FCRCS_REGNUM
	35	#undef FCRIR_REGNUM
1d06468c	36
5e2e9765 KB	37	/* Initializer for an array of names for registers 32 and above.
5e2e9765 KB	38	There should be NUM_REGS-32 strings in this initializer. */
1d06468c EZ	39
1d06468c EZ	40	#define MIPS_REGISTER_NAMES \
5e2e9765	41	{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
1d06468c EZ	42	"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
	43	"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
	44	"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
	45	"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
	46	}
	47
	48	/* Register numbers of various important registers.
	49	Note that some of these values are "real" register numbers,
	50	and correspond to the general registers of the machine,
	51	and some are "phony" register numbers which are too large
	52	to be actual register numbers as far as the user is concerned
	53	but do serve to get the desired values when passed to read_register. */
	54
	55	#define FP0_REGNUM 32 /* Floating point register 0 (single float) */
	56	#define PC_REGNUM 64 /* Contains program counter */
	57	#define CAUSE_REGNUM 65 /* describes last exception */
	58	#define BADVADDR_REGNUM 66 /* bad vaddr for addressing exception */
	59	#define HI_REGNUM 67 /* Multiple/divide temp */
	60	#define LO_REGNUM 68 /* ... */
	61	#define FCRCS_REGNUM 69 /* FP control/status */
	62	#define FCRIR_REGNUM 70 /* FP implementation/revision */
1d06468c EZ	63
1d06468c EZ	64
a4b8ebc8 AC	65	#undef MIPS_REGISTER_BYTE
a4b8ebc8 AC	66	#define MIPS_REGISTER_BYTE(N) \
1d06468c EZ	67	(((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
	68	((N) < FP0_REGNUM + 32) ? \
	69	FP0_REGNUM * MIPS_REGSIZE + \
	70	((N) - FP0_REGNUM) * sizeof(double) : \
	71	32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
	72
1d06468c EZ	73	/* The signal handler trampoline is called _sigtramp. */
	74	#undef IN_SIGTRAMP
	75	#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
	76
	77	/* Offsets for register values in _sigtramp frame.
	78	sigcontext is immediately above the _sigtramp frame on Irix. */
	79	#undef SIGFRAME_BASE
	80	#define SIGFRAME_BASE 0
	81
	82	/* Irix 5 saves a full 64 bits for each register. We skip 2 * 4 to
	83	get to the saved PC (the register mask and status register are both
	84	32 bits) and then another 4 to get to the lower 32 bits. We skip
	85	the same 4 bytes, plus the 8 bytes for the PC to get to the
	86	registers, and add another 4 to get to the lower 32 bits. We skip
	87	8 bytes per register. */
	88	#undef SIGFRAME_PC_OFF
	89	#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4 + 4)
	90	#undef SIGFRAME_REGSAVE_OFF
	91	#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 4)
	92	#undef SIGFRAME_FPREGSAVE_OFF
	93	#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
	94	#define SIGFRAME_REG_SIZE 8
	95
78fde5f8	96	/* Undefine those methods which have been multiarched. */
22b4a9ad JB	97
	98	/* Undefine MIPS_REGISTER_TYPE, so that GDB uses real C code in
	99	mips_register_type() to return the register type, instead of
	100	relying on this macro. */
a4b8ebc8	101	#undef MIPS_REGISTER_TYPE