Fix whitespace problem in my most recent entry.
[deliverable/binutils-gdb.git] / gdb / config / sparc / tm-sparc.h
CommitLineData
c906108c
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1/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
2 This is included by other tm-*.h files to define SPARC cpu-related info.
3 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
4 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@mcc.com)
6
c5aa993b 7 This file is part of GDB.
c906108c 8
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9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
c906108c 13
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14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
c906108c 18
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19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
c906108c 23
c906108c
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24struct type;
25struct value;
5af923b0 26struct frame_info;
c906108c 27
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28/*
29 * The following enums are purely for the convenience of the GDB
30 * developer, when debugging GDB.
31 */
c906108c 32
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33enum { /* Sparc general registers, for all sparc versions. */
34 G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM,
35 G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM,
36 O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM,
37 O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
38 L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM,
39 L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM,
40 I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM,
41 I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
42 FP0_REGNUM /* Floating point register 0 */
43};
44
45enum { /* Sparc general registers, alternate names. */
46 R0_REGNUM, R1_REGNUM, R2_REGNUM, R3_REGNUM,
47 R4_REGNUM, R5_REGNUM, R6_REGNUM, R7_REGNUM,
48 R8_REGNUM, R9_REGNUM, R10_REGNUM, R11_REGNUM,
49 R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM,
50 R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM,
51 R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM,
52 R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM,
53 R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
54};
55
56enum { /* Sparc32 control registers. */
57 PS_REGNUM = 65, /* PC, NPC, and Y are omitted because */
58 WIM_REGNUM = 66, /* they have different values depending on */
59 TBR_REGNUM = 67, /* 32-bit / 64-bit mode. */
60 FPS_REGNUM = 70,
61 CPS_REGNUM = 71
62};
63
64/* v9 misc. and priv. regs */
65
66/* Note: specifying values explicitly for documentation purposes. */
67enum { /* Sparc64 control registers, excluding Y, PC, and NPC. */
68 CCR_REGNUM = 82, /* Condition Code Register (%xcc,%icc) */
69 FSR_REGNUM = 83, /* Floating Point State */
70 FPRS_REGNUM = 84, /* Floating Point Registers State */
71 ASI_REGNUM = 86, /* Alternate Space Identifier */
72 VER_REGNUM = 87, /* Version register */
73 TICK_REGNUM = 88, /* Tick register */
74 PIL_REGNUM = 89, /* Processor Interrupt Level */
75 PSTATE_REGNUM = 90, /* Processor State */
76 TSTATE_REGNUM = 91, /* Trap State */
77 TBA_REGNUM = 92, /* Trap Base Address */
78 TL_REGNUM = 93, /* Trap Level */
79 TT_REGNUM = 94, /* Trap Type */
80 TPC_REGNUM = 95, /* Trap pc */
81 TNPC_REGNUM = 96, /* Trap npc */
82 WSTATE_REGNUM = 97, /* Window State */
83 CWP_REGNUM = 98, /* Current Window Pointer */
84 CANSAVE_REGNUM = 99, /* Savable Windows */
85 CANRESTORE_REGNUM = 100, /* Restorable Windows */
86 CLEANWIN_REGNUM = 101, /* Clean Windows */
87 OTHERWIN_REGNUM = 102, /* Other Windows */
88 ASR16_REGNUM = 103, /* Ancillary State Registers */
89 ASR17_REGNUM = 104,
90 ASR18_REGNUM = 105,
91 ASR19_REGNUM = 106,
92 ASR20_REGNUM = 107,
93 ASR21_REGNUM = 108,
94 ASR22_REGNUM = 109,
95 ASR23_REGNUM = 110,
96 ASR24_REGNUM = 111,
97 ASR25_REGNUM = 112,
98 ASR26_REGNUM = 113,
99 ASR27_REGNUM = 114,
100 ASR28_REGNUM = 115,
101 ASR29_REGNUM = 116,
102 ASR30_REGNUM = 117,
103 ASR31_REGNUM = 118,
104 ICC_REGNUM = 119, /* 32 bit condition codes */
105 XCC_REGNUM = 120, /* 64 bit condition codes */
106 FCC0_REGNUM = 121, /* fp cc reg 0 */
107 FCC1_REGNUM = 122, /* fp cc reg 1 */
108 FCC2_REGNUM = 123, /* fp cc reg 2 */
109 FCC3_REGNUM = 124 /* fp cc reg 3 */
110};
c906108c 111
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112/*
113 * Make sparc target multi-archable: April 2000
114 */
c906108c 115
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116#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
117
118/* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
119#undef GDB_TARGET_IS_SPARC64
120#define GDB_TARGET_IS_SPARC64 \
121 (sparc_intreg_size () == 8)
122#undef TARGET_ELF64
123#define TARGET_ELF64 \
124 (sparc_intreg_size () == 8)
125extern int sparc_intreg_size (void);
126#else
127
128/* Non-multi-arch: if it isn't defined, define it to zero. */
129#ifndef GDB_TARGET_IS_SPARC64
130#define GDB_TARGET_IS_SPARC64 0
131#endif
132#ifndef TARGET_ELF64
133#define TARGET_ELF64 0
134#endif
135#endif
c906108c 136
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137#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
138/*
139 * The following defines must go away for MULTI_ARCH
140 */
c906108c 141
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142/* Initializer for an array of names of registers.
143 There should be NUM_REGS strings in this initializer. */
c906108c 144
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145#define REGISTER_NAMES \
146{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
147 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
148 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
149 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
150 \
151 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
152 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
153 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
154 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
155 \
156 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" \
157}
c906108c 158
5af923b0 159#define TARGET_BYTE_ORDER BIG_ENDIAN
c906108c
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160
161/* Offset from address of function to start of its code.
162 Zero on most machines. */
163
164#define FUNCTION_START_OFFSET 0
165
c906108c
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166/* Amount PC must be decremented by after a breakpoint.
167 This is often the number of bytes in BREAKPOINT
168 but not always. */
169
170#define DECR_PC_AFTER_BREAK 0
171
172/* Say how long (ordinary) registers are. This is a piece of bogosity
173 used in push_word and a few other places; REGISTER_RAW_SIZE is the
174 real way to know how big a register is. */
175
176#define REGISTER_SIZE 4
177
178/* Number of machine registers */
179
180#define NUM_REGS 72
181
c906108c
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182#define SP_REGNUM 14 /* Contains address of top of stack, \
183 which is also the bottom of the frame. */
c906108c 184#define FP_REGNUM 30 /* Contains address of executing stack frame */
5af923b0 185
c906108c 186#define FP0_REGNUM 32 /* Floating point register 0 */
5af923b0 187
c906108c 188#define Y_REGNUM 64 /* Temp register for multiplication, etc. */
5af923b0 189
c906108c 190#define PC_REGNUM 68 /* Contains program counter */
5af923b0 191
c5aa993b 192#define NPC_REGNUM 69 /* Contains next PC */
5af923b0 193
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194
195/* Total amount of space needed to store our copies of the machine's
196 register state, the array `registers'. On the sparc, `registers'
197 contains the ins and locals, even though they are saved on the
198 stack rather than with the other registers, and this causes hair
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199 and confusion in places like pop_frame. It might be better to
200 remove the ins and locals from `registers', make sure that
201 get_saved_register can get them from the stack (even in the
c906108c 202 innermost frame), and make this the way to access them. For the
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203 frame pointer we would do that via TARGET_READ_FP. On the other
204 hand, that is likely to be confusing or worse for flat frames. */
c906108c
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205
206#define REGISTER_BYTES (32*4+32*4+8*4)
207
208/* Index within `registers' of the first byte of the space for
209 register N. */
c906108c 210
5af923b0 211#define REGISTER_BYTE(N) ((N)*4)
c906108c 212
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213/* Number of bytes of storage in the actual machine representation for
214 register N. */
c906108c 215
5af923b0 216/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8). */
c906108c
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217
218#define REGISTER_RAW_SIZE(N) (4)
219
220/* Number of bytes of storage in the program's representation
221 for register N. */
222
5af923b0 223/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8). */
c906108c
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224
225#define REGISTER_VIRTUAL_SIZE(N) (4)
226
227/* Largest value REGISTER_RAW_SIZE can have. */
228
229#define MAX_REGISTER_RAW_SIZE 8
230
231/* Largest value REGISTER_VIRTUAL_SIZE can have. */
232
233#define MAX_REGISTER_VIRTUAL_SIZE 8
234
235/* Return the GDB type object for the "standard" data type
236 of data in register N. */
237
238#define REGISTER_VIRTUAL_TYPE(N) \
5af923b0
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239 ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
240 builtin_type_int)
c906108c 241
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242/* Sun /bin/cc gets this right as of SunOS 4.1.x. We need to define
243 BELIEVE_PCC_PROMOTION to get this right now that the code which
244 detects gcc2_compiled. is broken. This loses for SunOS 4.0.x and
245 earlier. */
c906108c 246
5af923b0 247#define BELIEVE_PCC_PROMOTION 1
c906108c 248
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249/* Advance PC across any function entry prologue instructions
250 to reach some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances
251 the PC past some of the prologue, but stops as soon as it
252 knows that the function has a frame. Its result is equal
253 to its input PC if the function is frameless, unequal otherwise. */
c906108c 254
5af923b0 255#define SKIP_PROLOGUE(PC) sparc_skip_prologue (PC, 0)
c906108c 256
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257/* Immediately after a function call, return the saved pc.
258 Can't go through the frames for this because on some machines
259 the new frame is not set up until the new function executes
260 some instructions. */
c906108c 261
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262#define SAVED_PC_AFTER_CALL(FRAME) PC_ADJUST (read_register (RP_REGNUM))
263
264/* Stack grows downward. */
265
266#define INNER_THAN(LHS,RHS) ((LHS) < (RHS))
267
268/* Write into appropriate registers a function return value of type
269 TYPE, given in virtual format. */
c906108c 270
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271#define STORE_RETURN_VALUE(TYPE, VALBUF) \
272 sparc_store_return_value (TYPE, VALBUF)
a14ed312 273extern void sparc_store_return_value (struct type *, char *);
c906108c
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274
275/* Extract from an array REGBUF containing the (raw) register state
276 the address in which a function should return its structure value,
277 as a CORE_ADDR (or an expression that can be used as one). */
278
279#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
5af923b0 280 sparc_extract_struct_value_address (REGBUF)
c906108c 281
a14ed312 282extern CORE_ADDR sparc_extract_struct_value_address (char *);
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283
284/* If the current gcc for for this target does not produce correct
285 debugging information for float parameters, both prototyped and
286 unprototyped, then define this macro. This forces gdb to always
287 assume that floats are passed as doubles and then converted in the
288 callee. */
289
290#define COERCE_FLOAT_TO_DOUBLE(FORMAL, ACTUAL) (1)
291
292/* Stack must be aligned on 64-bit boundaries when synthesizing
293 function calls (128-bit for sparc64). */
294
295#define STACK_ALIGN(ADDR) sparc32_stack_align (ADDR)
296extern CORE_ADDR sparc32_stack_align (CORE_ADDR addr);
297
298/* Floating point is IEEE compatible. */
299#define IEEE_FLOAT (1)
300
301/* The Sparc returns long doubles on the stack. */
302
303#define RETURN_VALUE_ON_STACK(TYPE) \
304 (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
305 && TYPE_LENGTH(TYPE) > 8)
306
307/* When passing a structure to a function, Sun cc passes the address
308 not the structure itself. It (under SunOS4) creates two symbols,
309 which we need to combine to a LOC_REGPARM. Gcc version two (as of
310 1.92) behaves like sun cc. REG_STRUCT_HAS_ADDR is smart enough to
311 distinguish between Sun cc, gcc version 1 and gcc version 2. */
312
313#define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) \
314 sparc_reg_struct_has_addr (GCC_P, TYPE)
315extern int sparc_reg_struct_has_addr (int, struct type *);
316
317#endif /* GDB_MULTI_ARCH */
318
319#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
320/*
321 * The following defines should ONLY appear for MULTI_ARCH.
322 */
323
324/* Multi-arch the nPC and Y registers. */
325#define Y_REGNUM (sparc_y_regnum ())
326extern int sparc_npc_regnum (void);
327extern int sparc_y_regnum (void);
328
329#endif /* GDB_MULTI_ARCH */
330
331/* On the Sun 4 under SunOS, the compile will leave a fake insn which
332 encodes the structure size being returned. If we detect such
333 a fake insn, step past it. */
334
335#define PC_ADJUST(PC) sparc_pc_adjust (PC)
a14ed312 336extern CORE_ADDR sparc_pc_adjust (CORE_ADDR);
5af923b0
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337
338/* Advance PC across any function entry prologue instructions to reach
339 some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances the PC past
340 some of the prologue, but stops as soon as it knows that the
341 function has a frame. Its result is equal to its input PC if the
342 function is frameless, unequal otherwise. */
343
344#define SKIP_PROLOGUE_FRAMELESS_P(PC) sparc_skip_prologue (PC, 1)
a14ed312 345extern CORE_ADDR sparc_skip_prologue (CORE_ADDR, int);
5af923b0
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346
347/* If an argument is declared "register", Sun cc will keep it in a register,
348 never saving it onto the stack. So we better not believe the "p" symbol
349 descriptor stab. */
350
351#define USE_REGISTER_NOT_ARG
352
353/* For acc, there's no need to correct LBRAC entries by guessing how
354 they should work. In fact, this is harmful because the LBRAC
355 entries now all appear at the end of the function, not intermixed
356 with the SLINE entries. n_opt_found detects acc for Solaris binaries;
357 function_stab_type detects acc for SunOS4 binaries.
358
359 For binary from SunOS4 /bin/cc, need to correct LBRAC's.
360
361 For gcc, like acc, don't correct. */
362
363#define SUN_FIXED_LBRAC_BUG \
364 (n_opt_found \
365 || function_stab_type == N_STSYM \
366 || function_stab_type == N_GSYM \
367 || processing_gcc_compilation)
368
369/* Do variables in the debug stabs occur after the N_LBRAC or before it?
370 acc: after, gcc: before, SunOS4 /bin/cc: before. */
371
372#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
373 (!(gcc_p) \
374 && (n_opt_found \
375 || function_stab_type == N_STSYM \
376 || function_stab_type == N_GSYM))
377
378/* Sequence of bytes for breakpoint instruction (ta 1). */
379
380#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
381
382/* Register numbers of various important registers.
383 Note that some of these values are "real" register numbers,
384 and correspond to the general registers of the machine,
385 and some are "phony" register numbers which are too large
386 to be actual register numbers as far as the user is concerned
387 but do serve to get the desired values when passed to read_register. */
388
389#define G0_REGNUM 0 /* %g0 */
390#define G1_REGNUM 1 /* %g1 */
391#define O0_REGNUM 8 /* %o0 */
392#define RP_REGNUM 15 /* Contains return address value, *before* \
393 any windows get switched. */
394#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
395#define L0_REGNUM 16 /* First local reg that's saved on stack frame
396 rather than in machine registers */
397#define I0_REGNUM 24 /* %i0 */
398#define I7_REGNUM 31 /* Last local reg saved on stack frame */
399#define PS_REGNUM 65 /* Contains processor status */
400#define PS_FLAG_CARRY 0x100000 /* Carry bit in PS */
401#define WIM_REGNUM 66 /* Window Invalid Mask (not really supported) */
402#define TBR_REGNUM 67 /* Trap Base Register (not really supported) */
403#define FPS_REGNUM 70 /* Floating point status register */
404#define CPS_REGNUM 71 /* Coprocessor status register */
405
406/* Writing to %g0 is a noop (not an error or exception or anything like
407 that, however). */
408
409#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
410
411/*
412 * FRAME_CHAIN and FRAME_INFO definitions, collected here for convenience.
413 */
414
415#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
416/*
417 * The following defines must go away for MULTI_ARCH.
418 */
c5aa993b 419
c906108c
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420/* Describe the pointer in each stack frame to the previous stack frame
421 (its caller). */
422
423/* FRAME_CHAIN takes a frame's nominal address
424 and produces the frame's chain-pointer. */
425
426/* In the case of the Sun 4, the frame-chain's nominal address
427 is held in the frame pointer register.
428
429 On the Sun4, the frame (in %fp) is %sp for the previous frame.
430 From the previous frame's %sp, we can find the previous frame's
431 %fp: it is in the save area just above the previous frame's %sp.
432
433 If we are setting up an arbitrary frame, we'll need to know where
434 it ends. Hence the following. This part of the frame cache
435 structure should be checked before it is assumed that this frame's
436 bottom is in the stack pointer.
437
438 If there isn't a frame below this one, the bottom of this frame is
439 in the stack pointer.
440
441 If there is a frame below this one, and the frame pointers are
442 identical, it's a leaf frame and the bottoms are the same also.
443
444 Otherwise the bottom of this frame is the top of the next frame.
445
446 The bottom field is misnamed, since it might imply that memory from
447 bottom to frame contains this frame. That need not be true if
448 stack frames are allocated in different segments (e.g. some on a
449 stack, some on a heap in the data segment).
450
451 GCC 2.6 and later can generate ``flat register window'' code that
452 makes frames by explicitly saving those registers that need to be
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453 saved. %i7 is used as the frame pointer, and the frame is laid out
454 so that flat and non-flat calls can be intermixed freely within a
455 program. Unfortunately for GDB, this means it must detect and
456 record the flatness of frames.
c906108c
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457
458 Since the prologue in a flat frame also tells us where fp and pc
459 have been stashed (the frame is of variable size, so their location
460 is not fixed), it's convenient to record them in the frame info. */
461
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462#define EXTRA_FRAME_INFO \
463 CORE_ADDR bottom; \
464 int in_prologue; \
465 int flat; \
c906108c 466 /* Following fields only relevant for flat frames. */ \
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467 CORE_ADDR pc_addr; \
468 CORE_ADDR fp_addr; \
c906108c
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469 /* Add this to ->frame to get the value of the stack pointer at the */ \
470 /* time of the register saves. */ \
471 int sp_offset;
472
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473/* We need to override GET_SAVED_REGISTER so that we can deal with the way
474 outs change into ins in different frames. HAVE_REGISTER_WINDOWS can't
475 deal with this case and also handle flat frames at the same time. */
c906108c 476
a14ed312
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477void sparc_get_saved_register (char *raw_buffer,
478 int *optimized,
479 CORE_ADDR * addrp,
480 struct frame_info *frame,
481 int regnum, enum lval_type *lvalp);
c906108c 482
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483#define GET_SAVED_REGISTER(RAW_BUFFER, OPTIMIZED, ADDRP, FRAME, REGNUM, LVAL) \
484 sparc_get_saved_register (RAW_BUFFER, OPTIMIZED, ADDRP, \
485 FRAME, REGNUM, LVAL)
c906108c 486
5af923b0 487#define FRAME_INIT_SAVED_REGS(FP) /*no-op */
c906108c 488
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489#define INIT_EXTRA_FRAME_INFO(FROMLEAF, FCI) \
490 sparc_init_extra_frame_info (FROMLEAF, FCI)
a14ed312 491extern void sparc_init_extra_frame_info (int, struct frame_info *);
c906108c 492
5af923b0 493#define FRAME_CHAIN(THISFRAME) (sparc_frame_chain (THISFRAME))
a14ed312 494extern CORE_ADDR sparc_frame_chain (struct frame_info *);
c906108c
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495
496/* A macro that tells us whether the function invocation represented
497 by FI does not have a frame on the stack associated with it. If it
498 does not, FRAMELESS is set to 1, else 0. */
c906108c 499
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500#define FRAMELESS_FUNCTION_INVOCATION(FI) \
501 frameless_look_for_prologue (FI)
c906108c
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502
503/* Where is the PC for a specific frame */
504
505#define FRAME_SAVED_PC(FRAME) sparc_frame_saved_pc (FRAME)
a14ed312 506extern CORE_ADDR sparc_frame_saved_pc (struct frame_info *);
c906108c
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507
508/* If the argument is on the stack, it will be here. */
5af923b0 509#define FRAME_ARGS_ADDRESS(FI) ((FI)->frame)
c906108c 510
5af923b0 511#define FRAME_LOCALS_ADDRESS(FI) ((FI)->frame)
c906108c
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512
513/* Set VAL to the number of args passed to frame described by FI.
514 Can set VAL to -1, meaning no way to tell. */
515
516/* We can't tell how many args there are
517 now that the C compiler delays popping them. */
5af923b0 518#define FRAME_NUM_ARGS(FI) (-1)
c906108c
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519
520/* Return number of bytes at start of arglist that are not really args. */
521
522#define FRAME_ARGS_SKIP 68
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523
524#endif /* GDB_MULTI_ARCH */
525
526#define PRINT_EXTRA_FRAME_INFO(FI) \
527 sparc_print_extra_frame_info (FI)
528extern void sparc_print_extra_frame_info (struct frame_info *);
529
530/* INIT_EXTRA_FRAME_INFO needs the PC to detect flat frames. */
531
532#define INIT_FRAME_PC(FROMLEAF, PREV) /* nothing */
533#define INIT_FRAME_PC_FIRST(FROMLEAF, PREV) \
534 (PREV)->pc = ((FROMLEAF) ? SAVED_PC_AFTER_CALL ((PREV)->next) : \
535 (PREV)->next ? FRAME_SAVED_PC ((PREV)->next) : read_pc ());
536
537/* Define other aspects of the stack frame. */
538
539/* The location of I0 w.r.t SP. This is actually dependent on how the
540 system's window overflow/underflow routines are written. Most
541 vendors save the L regs followed by the I regs (at the higher
542 address). Some vendors get it wrong. */
543
544#define FRAME_SAVED_L0 0
545#define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (L0_REGNUM))
546
547#define FRAME_STRUCT_ARGS_ADDRESS(FI) ((FI)->frame)
548
c906108c
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549/* Things needed for making the inferior call functions. */
550/*
551 * First of all, let me give my opinion of what the DUMMY_FRAME
552 * actually looks like.
553 *
554 * | |
555 * | |
556 * + - - - - - - - - - - - - - - - - +<-- fp (level 0)
557 * | |
558 * | |
559 * | |
560 * | |
561 * | Frame of innermost program |
562 * | function |
563 * | |
564 * | |
565 * | |
566 * | |
567 * | |
568 * |---------------------------------|<-- sp (level 0), fp (c)
569 * | |
570 * DUMMY | fp0-31 |
571 * | |
572 * | ------ |<-- fp - 0x80
573 * FRAME | g0-7 |<-- fp - 0xa0
574 * | i0-7 |<-- fp - 0xc0
575 * | other |<-- fp - 0xe0
576 * | ? |
577 * | ? |
578 * |---------------------------------|<-- sp' = fp - 0x140
579 * | |
580 * xcution start | |
581 * sp' + 0x94 -->| CALL_DUMMY (x code) |
582 * | |
583 * | |
584 * |---------------------------------|<-- sp'' = fp - 0x200
585 * | align sp to 8 byte boundary |
586 * | ==> args to fn <== |
587 * Room for | |
588 * i & l's + agg | CALL_DUMMY_STACK_ADJUST = 0x0x44|
589 * |---------------------------------|<-- final sp (variable)
590 * | |
591 * | Where function called will |
592 * | build frame. |
593 * | |
594 * | |
595 *
596 * I understand everything in this picture except what the space
597 * between fp - 0xe0 and fp - 0x140 is used for. Oh, and I don't
598 * understand why there's a large chunk of CALL_DUMMY that never gets
599 * executed (its function is superceeded by PUSH_DUMMY_FRAME; they
600 * are designed to do the same thing).
601 *
602 * PUSH_DUMMY_FRAME saves the registers above sp' and pushes the
603 * register file stack down one.
604 *
605 * call_function then writes CALL_DUMMY, pushes the args onto the
606 * stack, and adjusts the stack pointer.
607 *
608 * run_stack_dummy then starts execution (in the middle of
609 * CALL_DUMMY, as directed by call_function).
610 */
611
c906108c
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612#ifndef CALL_DUMMY
613/* This sequence of words is the instructions
614
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615 00: bc 10 00 01 mov %g1, %fp
616 04: 9d e3 80 00 save %sp, %g0, %sp
617 08: bc 10 00 02 mov %g2, %fp
618 0c: be 10 00 03 mov %g3, %i7
c5aa993b
JM
619 10: da 03 a0 58 ld [ %sp + 0x58 ], %o5
620 14: d8 03 a0 54 ld [ %sp + 0x54 ], %o4
621 18: d6 03 a0 50 ld [ %sp + 0x50 ], %o3
622 1c: d4 03 a0 4c ld [ %sp + 0x4c ], %o2
623 20: d2 03 a0 48 ld [ %sp + 0x48 ], %o1
624 24: 40 00 00 00 call <fun>
625 28: d0 03 a0 44 ld [ %sp + 0x44 ], %o0
626 2c: 01 00 00 00 nop
627 30: 91 d0 20 01 ta 1
628 34: 01 00 00 00 nop
c906108c
SS
629
630 NOTES:
c5aa993b
JM
631 * the first four instructions are necessary only on the simulator.
632 * this is a multiple of 8 (not only 4) bytes.
633 * the `call' insn is a relative, not an absolute call.
634 * the `nop' at the end is needed to keep the trap from
5af923b0
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635 clobbering things (if NPC pointed to garbage instead).
636 */
637
638#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
639/*
640 * The following defines must go away for MULTI_ARCH.
c5aa993b 641 */
c906108c
SS
642
643#define CALL_DUMMY { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003, \
644 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c, \
645 0xd203a048, 0x40000000, 0xd003a044, 0x01000000, \
646 0x91d02001, 0x01000000 }
647
648
649/* Size of the call dummy in bytes. */
650
651#define CALL_DUMMY_LENGTH 0x38
652
653/* Offset within call dummy of first instruction to execute. */
654
655#define CALL_DUMMY_START_OFFSET 0
656
657/* Offset within CALL_DUMMY of the 'call' instruction. */
658
659#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + 0x24)
660
5af923b0 661/* Offset within CALL_DUMMY of the 'ta 1' trap instruction. */
c906108c
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662
663#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 0x30)
664
665#define CALL_DUMMY_STACK_ADJUST 68
666
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667/* Call dummy method (eg. on stack, at entry point, etc.) */
668
669#define CALL_DUMMY_LOCATION ON_STACK
670
671/* Method for detecting dummy frames. */
672
673#define PC_IN_CALL_DUMMY(PC, SP, FRAME_ADDRESS) \
674 pc_in_call_dummy_on_stack (PC, SP, FRAME_ADDRESS)
675
676#endif /* GDB_MULTI_ARCH */
677
678#endif /* CALL_DUMMY */
679
680#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
681/*
682 * The following defines must go away for MULTI_ARCH.
683 */
684
c906108c
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685/* Insert the specified number of args and function address
686 into a call sequence of the above form stored at DUMMYNAME. */
687
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688#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P) \
689 sparc_fix_call_dummy (DUMMYNAME, PC, FUN, TYPE, GCC_P)
a14ed312
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690void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
691 struct type *value_type, int using_gcc);
c906108c 692
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693/* Arguments smaller than an int must be promoted to ints when
694 synthesizing function calls. */
695
696/* Push an empty stack frame, to record the current PC, etc. */
697
698#define PUSH_DUMMY_FRAME sparc_push_dummy_frame ()
699#define POP_FRAME sparc_pop_frame ()
700
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701void sparc_push_dummy_frame (void);
702void sparc_pop_frame (void);
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703
704#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
705 sparc32_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
706
707extern CORE_ADDR
a14ed312 708sparc32_push_arguments (int, struct value **, CORE_ADDR, int, CORE_ADDR);
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709
710/* Store the address of the place in which to copy the structure the
711 subroutine will return. This is called from call_function_by_hand.
712 The ultimate mystery is, tho, what is the value "16"? */
713
714#define STORE_STRUCT_RETURN(ADDR, SP) \
715 { char val[4]; \
716 store_unsigned_integer (val, 4, (ADDR)); \
717 write_memory ((SP)+(16*4), val, 4); }
718
719/* Default definition of USE_STRUCT_CONVENTION. */
720
721#ifndef USE_STRUCT_CONVENTION
722#define USE_STRUCT_CONVENTION(GCC_P, TYPE) \
723 generic_use_struct_convention (GCC_P, TYPE)
724#endif
725
726/* Extract from an array REGBUF containing the (raw) register state a
727 function return value of type TYPE, and copy that, in virtual
728 format, into VALBUF. */
729
730#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
731 sparc32_extract_return_value (TYPE, REGBUF, VALBUF)
a14ed312 732extern void sparc32_extract_return_value (struct type *, char[], char *);
5af923b0
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733
734#endif /* GDB_MULTI_ARCH */
c906108c 735
c906108c
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736\f
737/* Sparc has no reliable single step ptrace call */
738
739#define SOFTWARE_SINGLE_STEP_P 1
a14ed312 740extern void sparc_software_single_step (unsigned int, int);
c906108c
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741#define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)
742
743/* We need more arguments in a frame specification for the
744 "frame" or "info frame" command. */
745
746#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
a14ed312 747extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
c906108c
SS
748
749/* To print every pair of float registers as a double, we use this hook.
750 We also print the condition code registers in a readable format
751 (FIXME: can expand this to all control regs). */
752
753#undef PRINT_REGISTER_HOOK
754#define PRINT_REGISTER_HOOK(regno) \
755 sparc_print_register_hook (regno)
a14ed312 756extern void sparc_print_register_hook (int regno);
c906108c 757
c906108c
SS
758/* Optimization for storing registers to the inferior. The hook
759 DO_DEFERRED_STORES
760 actually executes any deferred stores. It is called any time
761 we are going to proceed the child, or read its registers.
762 The hook CLEAR_DEFERRED_STORES is called when we want to throw
763 away the inferior process, e.g. when it dies or we kill it.
764 FIXME, this does not handle remote debugging cleanly. */
765
766extern int deferred_stores;
767#define DO_DEFERRED_STORES \
768 if (deferred_stores) \
769 target_store_registers (-2);
770#define CLEAR_DEFERRED_STORES \
771 deferred_stores = 0;
772
c906108c
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773/* Select the sparc disassembler */
774
775#define TM_PRINT_INSN_MACH bfd_mach_sparc
776
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