Commit | Line | Data |
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c906108c | 1 | /* Target machine definitions for GDB for an embedded SPARC. |
b6ba6518 | 2 | Copyright 1996, 1997, 2000 Free Software Foundation, Inc. |
c906108c | 3 | |
c5aa993b | 4 | This file is part of GDB. |
c906108c | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
c906108c | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
c906108c | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
c906108c | 20 | |
5af923b0 MS |
21 | #define TARGET_SPARCLET 1 /* Still needed for non-multi-arch case */ |
22 | ||
c906108c SS |
23 | #include "sparc/tm-sparc.h" |
24 | ||
5af923b0 MS |
25 | /* Note: we are not defining GDB_MULTI_ARCH for the sparclet target |
26 | at this time, because we have not figured out how to detect the | |
27 | sparclet target from the bfd structure. */ | |
28 | ||
29 | /* Sparclet regs, for debugging purposes. */ | |
30 | ||
31 | enum { | |
32 | CCSR_REGNUM = 72, | |
33 | CCPR_REGNUM = 73, | |
34 | CCCRCR_REGNUM = 74, | |
35 | CCOR_REGNUM = 75, | |
36 | CCOBR_REGNUM = 76, | |
37 | CCIBR_REGNUM = 77, | |
38 | CCIR_REGNUM = 78 | |
39 | }; | |
c906108c SS |
40 | |
41 | /* Select the sparclet disassembler. Slightly different instruction set from | |
42 | the V8 sparc. */ | |
43 | ||
44 | #undef TM_PRINT_INSN_MACH | |
45 | #define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclet | |
46 | ||
47 | /* overrides of tm-sparc.h */ | |
48 | ||
49 | #undef TARGET_BYTE_ORDER | |
50 | #define TARGET_BYTE_ORDER_SELECTABLE | |
51 | ||
52 | /* Sequence of bytes for breakpoint instruction (ta 1). */ | |
53 | #undef BREAKPOINT | |
54 | #define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01} | |
55 | #define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91} | |
56 | ||
5af923b0 MS |
57 | #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0) |
58 | /* | |
59 | * The following defines must go away for MULTI_ARCH. | |
60 | */ | |
61 | ||
c5aa993b | 62 | #undef NUM_REGS /* formerly "72" */ |
c906108c SS |
63 | /* WIN FP CPU CCP ASR AWR APSR */ |
64 | #define NUM_REGS (32 + 32 + 8 + 8 + 8/*+ 32 + 1*/) | |
65 | ||
c5aa993b | 66 | #undef REGISTER_BYTES /* formerly "(32*4 + 32*4 + 8*4)" */ |
c906108c SS |
67 | #define REGISTER_BYTES (32*4 + 32*4 + 8*4 + 8*4 + 8*4/* + 32*4 + 1*4*/) |
68 | ||
69 | /* Initializer for an array of names of registers. | |
70 | There should be NUM_REGS strings in this initializer. */ | |
71 | /* Sparclet has no fp! */ | |
72 | /* Compiler maps types for floats by number, so can't | |
73 | change the numbers here. */ | |
74 | ||
75 | #undef REGISTER_NAMES | |
76 | #define REGISTER_NAMES \ | |
77 | { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \ | |
78 | "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7", \ | |
79 | "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ | |
80 | "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7", \ | |
81 | \ | |
82 | "", "", "", "", "", "", "", "", /* no FPU regs */ \ | |
83 | "", "", "", "", "", "", "", "", \ | |
84 | "", "", "", "", "", "", "", "", \ | |
85 | "", "", "", "", "", "", "", "", \ | |
86 | /* no CPSR, FPSR */ \ | |
87 | "y", "psr", "wim", "tbr", "pc", "npc", "", "", \ | |
88 | \ | |
89 | "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "", \ | |
90 | \ | |
91 | /* ASR15 ASR19 (don't display them) */ \ | |
92 | "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22", \ | |
93 | /* \ | |
94 | "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7", \ | |
95 | "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15", \ | |
96 | "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23", \ | |
97 | "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31", \ | |
98 | "apsr", \ | |
99 | */ \ | |
100 | } | |
101 | ||
102 | /* Remove FP dependant code which was defined in tm-sparc.h */ | |
c5aa993b | 103 | #undef FP0_REGNUM /* Floating point register 0 */ |
5af923b0 | 104 | #undef FPS_REGNUM /* Floating point status register */ |
c5aa993b | 105 | #undef CPS_REGNUM /* Coprocessor status register */ |
c906108c SS |
106 | |
107 | /* sparclet register numbers */ | |
108 | #define CCSR_REGNUM 72 | |
109 | ||
110 | #undef EXTRACT_RETURN_VALUE | |
111 | #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ | |
112 | { \ | |
113 | memcpy ((VALBUF), \ | |
114 | (char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 + \ | |
115 | (TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM) \ | |
116 | ? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \ | |
117 | TYPE_LENGTH(TYPE)); \ | |
118 | } | |
119 | #undef STORE_RETURN_VALUE | |
120 | #define STORE_RETURN_VALUE(TYPE,VALBUF) \ | |
121 | { \ | |
122 | /* Other values are returned in register %o0. */ \ | |
123 | write_register_bytes (REGISTER_BYTE (O0_REGNUM), (VALBUF), \ | |
124 | TYPE_LENGTH (TYPE)); \ | |
125 | } | |
126 | ||
5af923b0 MS |
127 | #endif /* GDB_MULTI_ARCH */ |
128 | ||
c906108c SS |
129 | #undef PRINT_REGISTER_HOOK |
130 | #define PRINT_REGISTER_HOOK(regno) | |
131 | ||
132 | /* Offsets into jmp_buf. Not defined by Sun, but at least documented in a | |
133 | comment in <machine/setjmp.h>! */ | |
134 | ||
135 | #define JB_ELEMENT_SIZE 4 /* Size of each element in jmp_buf */ | |
136 | ||
137 | #define JB_ONSSTACK 0 | |
138 | #define JB_SIGMASK 1 | |
139 | #define JB_SP 2 | |
140 | #define JB_PC 3 | |
141 | #define JB_NPC 4 | |
142 | #define JB_PSR 5 | |
143 | #define JB_G1 6 | |
144 | #define JB_O0 7 | |
145 | #define JB_WBCNT 8 | |
146 | ||
147 | /* Figure out where the longjmp will land. We expect that we have just entered | |
148 | longjmp and haven't yet setup the stack frame, so the args are still in the | |
149 | output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we | |
150 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. | |
151 | This routine returns true on success */ | |
152 | ||
a14ed312 | 153 | extern int get_longjmp_target (CORE_ADDR *); |
c906108c SS |
154 | |
155 | #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR) |