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[deliverable/binutils-gdb.git] / gdb / csky-tdep.c
CommitLineData
9d24df82
HAQ		 1/* Target-dependent code for the CSKY architecture, for GDB.
2
42a4f53d 3 Copyright (C) 2010-2019 Free Software Foundation, Inc.
9d24df82
HAQ		 4
5 Contributed by C-SKY Microsystems and Mentor Graphics.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22#include "defs.h"
d55e5aa6
TT		 23
24/* Standard C++ includes. */
25#include <algorithm>
26#include <vector>
27
28/* Local non-gdb includes. */
29#include "arch-utils.h"
30#include "block.h"
0747795c 31#include "common/gdb_assert.h"
d55e5aa6
TT		 32#include "csky-tdep.h"
33#include "dis-asm.h"
34#include "dwarf2-frame.h"
35#include "elf-bfd.h"
36#include "elf/csky.h"
37#include "floatformat.h"
38#include "frame-base.h"
39#include "frame-unwind.h"
9d24df82 40#include "frame.h"
9d24df82 41#include "gdbcmd.h"
9d24df82 42#include "gdbcore.h"
9d24df82 43#include "gdbtypes.h"
d55e5aa6
TT		 44#include "infcall.h"
45#include "inferior.h"
46#include "language.h"
47#include "objfiles.h"
48#include "opcode/csky.h"
9d24df82 49#include "osabi.h"
d55e5aa6 50#include "regcache.h"
9d24df82 51#include "reggroups.h"
d55e5aa6 52#include "regset.h"
9d24df82 53#include "remote.h"
d55e5aa6
TT		 54#include "sim-regno.h"
55#include "symcat.h"
56#include "symfile.h"
57#include "symtab.h"
9d24df82 58#include "target-descriptions.h"
d55e5aa6
TT		 59#include "target.h"
60#include "trad-frame.h"
9d24df82
HAQ		 61#include "user-regs.h"
62#include "valprint.h"
d55e5aa6 63#include "value.h"
9d24df82
HAQ		 64
65/* Control debugging information emitted in this file. */
66static int csky_debug = 0;
67
68static struct reggroup *cr_reggroup;
69static struct reggroup *fr_reggroup;
70static struct reggroup *vr_reggroup;
71static struct reggroup *mmu_reggroup;
72static struct reggroup *prof_reggroup;
73
74/* Convenience function to print debug messages in prologue analysis. */
75
76static void
77print_savedreg_msg (int regno, int offsets[], bool print_continuing)
78{
79 fprintf_unfiltered (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
80 regno, offsets[regno]);
81 if (print_continuing)
82 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
83}
84
85/* Check whether the instruction at ADDR is 16-bit or not. */
86
87static int
88csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
89{
90 gdb_byte target_mem[2];
91 int status;
92 unsigned int insn;
93 int ret = 1;
94 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
95
96 status = target_read_memory (addr, target_mem, 2);
97 /* Assume a 16-bit instruction if we can't read memory. */
98 if (status)
99 return 1;
100
101 /* Get instruction from memory. */
102 insn = extract_unsigned_integer (target_mem, 2, byte_order);
103 if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
104 ret = 0;
105 else if (insn == CSKY_BKPT_INSN)
106 {
107 /* Check for 32-bit bkpt instruction which is all 0. */
108 status = target_read_memory (addr + 2, target_mem, 2);
109 if (status)
110 return 1;
111
112 insn = extract_unsigned_integer (target_mem, 2, byte_order);
113 if (insn == CSKY_BKPT_INSN)
114 ret = 0;
115 }
116 return ret;
117}
118
119/* Get one instruction at ADDR and store it in INSN. Return 2 for
120 a 16-bit instruction or 4 for a 32-bit instruction. */
121
122static int
123csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
124{
125 gdb_byte target_mem[2];
126 unsigned int insn_type;
127 int status;
128 int insn_len = 2;
129 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
130
131 status = target_read_memory (addr, target_mem, 2);
132 if (status)
133 memory_error (TARGET_XFER_E_IO, addr);
134
135 insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
136 if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
137 {
138 status = target_read_memory (addr + 2, target_mem, 2);
139 if (status)
140 memory_error (TARGET_XFER_E_IO, addr);
141 insn_type = ((insn_type << 16)
142 | extract_unsigned_integer (target_mem, 2, byte_order));
143 insn_len = 4;
144 }
145 *insn = insn_type;
146 return insn_len;
147}
148
149/* Implement the read_pc gdbarch method. */
150
151static CORE_ADDR
152csky_read_pc (readable_regcache *regcache)
153{
154 ULONGEST pc;
155 regcache->cooked_read (CSKY_PC_REGNUM, &pc);
156 return pc;
157}
158
159/* Implement the write_pc gdbarch method. */
160
161static void
162csky_write_pc (regcache *regcache, CORE_ADDR val)
163{
164 regcache_cooked_write_unsigned (regcache, CSKY_PC_REGNUM, val);
165}
166
9d24df82
HAQ		 167/* C-Sky ABI register names. */
168
169static const char *csky_register_names[] =
170{
171 /* General registers 0 - 31. */
172 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
173 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
174 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
175 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
176
177 /* DSP hilo registers 36 and 37. */
178 "", "", "", "", "hi", "lo", "", "",
179
180 /* FPU/VPU general registers 40 - 71. */
181 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
182 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
183 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
184 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
185
186 /* Program counter 72. */
187 "pc",
188
189 /* Optional registers (ar) 73 - 88. */
190 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
191 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
192
193 /* Control registers (cr) 89 - 119. */
194 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
195 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
196 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
197 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
198
199 /* FPU/VPU control registers 121 ~ 123. */
200 /* User sp 127. */
201 "fid", "fcr", "fesr", "", "", "", "usp",
202
203 /* MMU control registers: 128 - 136. */
204 "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
205 "mcr31", "", "", "",
206
207 /* Profiling control registers 140 - 143. */
208 /* Profiling software general registers 144 - 157. */
209 "profcr0", "profcr1", "profcr2", "profcr3", "profsgr0", "profsgr1",
210 "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6", "profsgr7",
211 "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
212 "", "",
213
214 /* Profiling architecture general registers 160 - 174. */
215 "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
216 "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
217 "profagr12","profagr13","profagr14", "",
218
219 /* Profiling extension general registers 176 - 188. */
220 "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
221 "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
222 "profxgr12",
223
224 /* Control registers in bank1. */
225 "", "", "", "", "", "", "", "",
226 "", "", "", "", "", "", "", "",
227 "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
228 "", "", "", "", "", "", "", "",
229
230 /* Control registers in bank3 (ICE). */
231 "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
232 "sedcr", "", "", "", "", "", "", "",
233 "", "", "", "", "", "", "", "",
234 "", "", "", "", "", "", "", ""
235};
236
237/* Implement the register_name gdbarch method. */
238
239static const char *
240csky_register_name (struct gdbarch *gdbarch, int reg_nr)
241{
242 if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
243 return tdesc_register_name (gdbarch, reg_nr);
244
245 if (reg_nr < 0)
246 return NULL;
247
248 if (reg_nr >= gdbarch_num_regs (gdbarch))
249 return NULL;
250
251 return csky_register_names[reg_nr];
252}
253
254/* Construct vector type for vrx registers. */
255
256static struct type *
257csky_vector_type (struct gdbarch *gdbarch)
258{
259 const struct builtin_type *bt = builtin_type (gdbarch);
260
261 struct type *t;
262
263 t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
264 TYPE_CODE_UNION);
265
266 append_composite_type_field (t, "u32",
267 init_vector_type (bt->builtin_int32, 4));
268 append_composite_type_field (t, "u16",
269 init_vector_type (bt->builtin_int16, 8));
270 append_composite_type_field (t, "u8",
271 init_vector_type (bt->builtin_int8, 16));
272
273 TYPE_VECTOR (t) = 1;
274 TYPE_NAME (t) = "builtin_type_vec128i";
275
276 return t;
277}
278
279/* Return the GDB type object for the "standard" data type
280 of data in register N. */
281
282static struct type *
283csky_register_type (struct gdbarch *gdbarch, int reg_nr)
284{
285 /* PC, EPC, FPC is a text pointer. */
286 if ((reg_nr == CSKY_PC_REGNUM) || (reg_nr == CSKY_EPC_REGNUM)
287 || (reg_nr == CSKY_FPC_REGNUM))
288 return builtin_type (gdbarch)->builtin_func_ptr;
289
290 /* VBR is a data pointer. */
291 if (reg_nr == CSKY_VBR_REGNUM)
292 return builtin_type (gdbarch)->builtin_data_ptr;
293
294 /* Float register has 64 bits, and only in ck810. */
295 if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
296 return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
297 floatformats_ieee_double);
298
299 /* Vector register has 128 bits, and only in ck810. */
300 if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
301 return csky_vector_type (gdbarch);
302
303 /* Profiling general register has 48 bits, we use 64bit. */
304 if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
305 return builtin_type (gdbarch)->builtin_uint64;
306
307 if (reg_nr == CSKY_SP_REGNUM)
308 return builtin_type (gdbarch)->builtin_data_ptr;
309
310 /* Others are 32 bits. */
311 return builtin_type (gdbarch)->builtin_int32;
312}
313
314/* Data structure to marshall items in a dummy stack frame when
315 calling a function in the inferior. */
316
317struct stack_item
318{
319 stack_item (int len_, const gdb_byte *data_)
320 : len (len_), data (data_)
321 {}
322
323 int len;
324 const gdb_byte *data;
325};
326
327/* Implement the push_dummy_call gdbarch method. */
328
329static CORE_ADDR
330csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
331 struct regcache *regcache, CORE_ADDR bp_addr,
332 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH		 333 function_call_return_method return_method,
334 CORE_ADDR struct_addr)
9d24df82
HAQ		 335{
336 int argnum;
337 int argreg = CSKY_ABI_A0_REGNUM;
338 int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
339 int need_dummy_stack = 0;
340 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
341 std::vector<stack_item> stack_items;
342
343 /* Set the return address. For CSKY, the return breakpoint is
344 always at BP_ADDR. */
345 regcache_cooked_write_unsigned (regcache, CSKY_LR_REGNUM, bp_addr);
346
347 /* The struct_return pointer occupies the first parameter
348 passing register. */
cf84fa6b 349 if (return_method == return_method_struct)
9d24df82
HAQ		 350 {
351 if (csky_debug)
352 {
353 fprintf_unfiltered (gdb_stdlog,
354 "csky: struct return in %s = %s\n",
355 gdbarch_register_name (gdbarch, argreg),
356 paddress (gdbarch, struct_addr));
357 }
358 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
359 argreg++;
360 }
361
362 /* Put parameters into argument registers in REGCACHE.
363 In ABI argument registers are r0 through r3. */
364 for (argnum = 0; argnum < nargs; argnum++)
365 {
366 int len;
367 struct type *arg_type;
368 const gdb_byte *val;
369
370 arg_type = check_typedef (value_type (args[argnum]));
371 len = TYPE_LENGTH (arg_type);
372 val = value_contents (args[argnum]);
373
374 /* Copy the argument to argument registers or the dummy stack.
375 Large arguments are split between registers and stack.
376
377 If len < 4, there is no need to worry about endianness since
378 the arguments will always be stored in the low address. */
379 if (len < 4)
380 {
381 CORE_ADDR regval
382 = extract_unsigned_integer (val, len, byte_order);
383 regcache_cooked_write_unsigned (regcache, argreg, regval);
384 argreg++;
385 }
386 else
387 {
388 while (len > 0)
389 {
390 int partial_len = len < 4 ? len : 4;
391 if (argreg <= last_arg_regnum)
392 {
393 /* The argument is passed in an argument register. */
394 CORE_ADDR regval
395 = extract_unsigned_integer (val, partial_len,
396 byte_order);
397 if (byte_order == BFD_ENDIAN_BIG)
398 regval <<= (4 - partial_len) * 8;
399
400 /* Put regval into register in REGCACHE. */
401 regcache_cooked_write_unsigned (regcache, argreg,
402 regval);
403 argreg++;
404 }
405 else
406 {
407 /* The argument should be pushed onto the dummy stack. */
408 stack_items.emplace_back (4, val);
409 need_dummy_stack += 4;
410 }
411 len -= partial_len;
412 val += partial_len;
413 }
414 }
415 }
416
417 /* Transfer the dummy stack frame to the target. */
418 std::vector<stack_item>::reverse_iterator iter;
419 for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
420 {
421 sp -= iter->len;
422 write_memory (sp, iter->data, iter->len);
423 }
424
425 /* Finally, update the SP register. */
426 regcache_cooked_write_unsigned (regcache, CSKY_SP_REGNUM, sp);
427 return sp;
428}
429
430/* Implement the return_value gdbarch method. */
431
432static enum return_value_convention
433csky_return_value (struct gdbarch *gdbarch, struct value *function,
434 struct type *valtype, struct regcache *regcache,
435 gdb_byte *readbuf, const gdb_byte *writebuf)
436{
437 CORE_ADDR regval;
438 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
439 int len = TYPE_LENGTH (valtype);
440 unsigned int ret_regnum = CSKY_RET_REGNUM;
441
442 /* Csky abi specifies that return values larger than 8 bytes
443 are put on the stack. */
444 if (len > 8)
445 return RETURN_VALUE_STRUCT_CONVENTION;
446 else
447 {
448 if (readbuf != NULL)
449 {
450 ULONGEST tmp;
451 /* By using store_unsigned_integer we avoid having to do
452 anything special for small big-endian values. */
453 regcache->cooked_read (ret_regnum, &tmp);
454 store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
455 byte_order, tmp);
456 if (len > 4)
457 {
458 regcache->cooked_read (ret_regnum + 1, &tmp);
459 store_unsigned_integer (readbuf + 4, 4, byte_order, tmp);
460 }
461 }
462 if (writebuf != NULL)
463 {
464 regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
465 byte_order);
466 regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
467 if (len > 4)
468 {
469 regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
470 4, byte_order);
471 regcache_cooked_write_unsigned (regcache, ret_regnum + 1,
472 regval);
473 }
474
475 }
476 return RETURN_VALUE_REGISTER_CONVENTION;
477 }
478}
479
480/* Implement the frame_align gdbarch method.
481
482 Adjust the address downward (direction of stack growth) so that it
483 is correctly aligned for a new stack frame. */
484
485static CORE_ADDR
486csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
487{
488 return align_down (addr, 4);
489}
490
491/* Unwind cache used for gdbarch fallback unwinder. */
492
493struct csky_unwind_cache
494{
495 /* The stack pointer at the time this frame was created; i.e. the
496 caller's stack pointer when this function was called. It is used
497 to identify this frame. */
498 CORE_ADDR prev_sp;
499
500 /* The frame base for this frame is just prev_sp - frame size.
501 FRAMESIZE is the distance from the frame pointer to the
502 initial stack pointer. */
503 int framesize;
504
505 /* The register used to hold the frame pointer for this frame. */
506 int framereg;
507
508 /* Saved register offsets. */
509 struct trad_frame_saved_reg *saved_regs;
510};
511
512/* Do prologue analysis, returning the PC of the first instruction
513 after the function prologue. */
514
515static CORE_ADDR
516csky_analyze_prologue (struct gdbarch *gdbarch,
517 CORE_ADDR start_pc,
518 CORE_ADDR limit_pc,
519 CORE_ADDR end_pc,
520 struct frame_info *this_frame,
521 struct csky_unwind_cache *this_cache,
522 lr_type_t lr_type)
523{
524 CORE_ADDR addr;
525 unsigned int insn, rn;
526 int framesize = 0;
527 int stacksize = 0;
528 int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
529 int insn_len;
530 /* For adjusting fp. */
531 int is_fp_saved = 0;
532 int adjust_fp = 0;
533
534 /* REGISTER_OFFSETS will contain offsets from the top of the frame
535 (NOT the frame pointer) for the various saved registers, or -1
536 if the register is not saved. */
537 for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
538 register_offsets[rn] = -1;
539
540 /* Analyze the prologue. Things we determine from analyzing the
541 prologue include the size of the frame and which registers are
542 saved (and where). */
543 if (csky_debug)
544 {
545 fprintf_unfiltered (gdb_stdlog,
546 "csky: Scanning prologue: start_pc = 0x%x,"
547 "limit_pc = 0x%x\n", (unsigned int) start_pc,
548 (unsigned int) limit_pc);
549 }
550
551 /* Default to 16 bit instruction. */
552 insn_len = 2;
553 stacksize = 0;
554 for (addr = start_pc; addr < limit_pc; addr += insn_len)
555 {
556 /* Get next insn. */
557 insn_len = csky_get_insn (gdbarch, addr, &insn);
558
559 /* Check if 32 bit. */
560 if (insn_len == 4)
561 {
562 /* subi32 sp,sp oimm12. */
563 if (CSKY_32_IS_SUBI0 (insn))
564 {
565 /* Got oimm12. */
566 int offset = CSKY_32_SUBI_IMM (insn);
567 if (csky_debug)
568 {
569 fprintf_unfiltered (gdb_stdlog,
570 "csky: got subi sp,%d; continuing\n",
571 offset);
572 }
573 stacksize += offset;
574 continue;
575 }
576 /* stm32 ry-rz,(sp). */
577 else if (CSKY_32_IS_STMx0 (insn))
578 {
579 /* Spill register(s). */
580 int start_register;
581 int reg_count;
582 int offset;
583
584 /* BIG WARNING! The CKCore ABI does not restrict functions
585 to taking only one stack allocation. Therefore, when
586 we save a register, we record the offset of where it was
587 saved relative to the current stacksize. This will
588 then give an offset from the SP upon entry to our
589 function. Remember, stacksize is NOT constant until
590 we're done scanning the prologue. */
591 start_register = CSKY_32_STM_VAL_REGNUM (insn);
592 reg_count = CSKY_32_STM_SIZE (insn);
593 if (csky_debug)
594 {
595 fprintf_unfiltered (gdb_stdlog,
596 "csky: got stm r%d-r%d,(sp)\n",
597 start_register,
598 start_register + reg_count);
599 }
600
601 for (rn = start_register, offset = 0;
602 rn <= start_register + reg_count;
603 rn++, offset += 4)
604 {
605 register_offsets[rn] = stacksize - offset;
606 if (csky_debug)
607 {
608 fprintf_unfiltered (gdb_stdlog,
609 "csky: r%d saved at 0x%x"
610 " (offset %d)\n",
611 rn, register_offsets[rn],
612 offset);
613 }
614 }
615 if (csky_debug)
616 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
617 continue;
618 }
619 /* stw ry,(sp,disp). */
620 else if (CSKY_32_IS_STWx0 (insn))
621 {
622 /* Spill register: see note for IS_STM above. */
623 int disp;
624
625 rn = CSKY_32_ST_VAL_REGNUM (insn);
626 disp = CSKY_32_ST_OFFSET (insn);
627 register_offsets[rn] = stacksize - disp;
628 if (csky_debug)
629 print_savedreg_msg (rn, register_offsets, true);
630 continue;
631 }
632 else if (CSKY_32_IS_MOV_FP_SP (insn))
633 {
634 /* SP is saved to FP reg, means code afer prologue may
635 modify SP. */
636 is_fp_saved = 1;
637 adjust_fp = stacksize;
638 continue;
639 }
640 else if (CSKY_32_IS_MFCR_EPSR (insn))
641 {
642 unsigned int insn2;
643 addr += 4;
644 int mfcr_regnum = insn & 0x1f;
645 insn_len = csky_get_insn (gdbarch, addr, &insn2);
646 if (insn_len == 2)
647 {
648 int stw_regnum = (insn2 >> 5) & 0x7;
649 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
650 {
651 int offset;
652
653 /* CSKY_EPSR_REGNUM. */
654 rn = CSKY_NUM_GREGS;
655 offset = CSKY_16_STWx0_OFFSET (insn2);
656 register_offsets[rn] = stacksize - offset;
657 if (csky_debug)
658 print_savedreg_msg (rn, register_offsets, true);
659 continue;
660 }
661 break;
662 }
663 else
664 {
665 /* INSN_LEN == 4. */
666 int stw_regnum = (insn2 >> 21) & 0x1f;
667 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
668 {
669 int offset;
670
671 /* CSKY_EPSR_REGNUM. */
672 rn = CSKY_NUM_GREGS;
673 offset = CSKY_32_ST_OFFSET (insn2);
674 register_offsets[rn] = framesize - offset;
675 if (csky_debug)
676 print_savedreg_msg (rn, register_offsets, true);
677 continue;
678 }
679 break;
680 }
681 }
682 else if (CSKY_32_IS_MFCR_FPSR (insn))
683 {
684 unsigned int insn2;
685 addr += 4;
686 int mfcr_regnum = insn & 0x1f;
687 insn_len = csky_get_insn (gdbarch, addr, &insn2);
688 if (insn_len == 2)
689 {
690 int stw_regnum = (insn2 >> 5) & 0x7;
691 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
692 == stw_regnum))
693 {
694 int offset;
695
696 /* CSKY_FPSR_REGNUM. */
697 rn = CSKY_NUM_GREGS + 1;
698 offset = CSKY_16_STWx0_OFFSET (insn2);
699 register_offsets[rn] = stacksize - offset;
700 if (csky_debug)
701 print_savedreg_msg (rn, register_offsets, true);
702 continue;
703 }
704 break;
705 }
706 else
707 {
708 /* INSN_LEN == 4. */
709 int stw_regnum = (insn2 >> 21) & 0x1f;
710 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
711 {
712 int offset;
713
714 /* CSKY_FPSR_REGNUM. */
715 rn = CSKY_NUM_GREGS + 1;
716 offset = CSKY_32_ST_OFFSET (insn2);
717 register_offsets[rn] = framesize - offset;
718 if (csky_debug)
719 print_savedreg_msg (rn, register_offsets, true);
720 continue;
721 }
722 break;
723 }
724 }
725 else if (CSKY_32_IS_MFCR_EPC (insn))
726 {
727 unsigned int insn2;
728 addr += 4;
729 int mfcr_regnum = insn & 0x1f;
730 insn_len = csky_get_insn (gdbarch, addr, &insn2);
731 if (insn_len == 2)
732 {
733 int stw_regnum = (insn2 >> 5) & 0x7;
734 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
735 {
736 int offset;
737
738 /* CSKY_EPC_REGNUM. */
739 rn = CSKY_NUM_GREGS + 2;
740 offset = CSKY_16_STWx0_OFFSET (insn2);
741 register_offsets[rn] = stacksize - offset;
742 if (csky_debug)
743 print_savedreg_msg (rn, register_offsets, true);
744 continue;
745 }
746 break;
747 }
748 else
749 {
750 /* INSN_LEN == 4. */
751 int stw_regnum = (insn2 >> 21) & 0x1f;
752 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
753 {
754 int offset;
755
756 /* CSKY_EPC_REGNUM. */
757 rn = CSKY_NUM_GREGS + 2;
758 offset = CSKY_32_ST_OFFSET (insn2);
759 register_offsets[rn] = framesize - offset;
760 if (csky_debug)
761 print_savedreg_msg (rn, register_offsets, true);
762 continue;
763 }
764 break;
765 }
766 }
767 else if (CSKY_32_IS_MFCR_FPC (insn))
768 {
769 unsigned int insn2;
770 addr += 4;
771 int mfcr_regnum = insn & 0x1f;
772 insn_len = csky_get_insn (gdbarch, addr, &insn2);
773 if (insn_len == 2)
774 {
775 int stw_regnum = (insn2 >> 5) & 0x7;
776 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
777 {
778 int offset;
779
780 /* CSKY_FPC_REGNUM. */
781 rn = CSKY_NUM_GREGS + 3;
782 offset = CSKY_16_STWx0_OFFSET (insn2);
783 register_offsets[rn] = stacksize - offset;
784 if (csky_debug)
785 print_savedreg_msg (rn, register_offsets, true);
786 continue;
787 }
788 break;
789 }
790 else
791 {
792 /* INSN_LEN == 4. */
793 int stw_regnum = (insn2 >> 21) & 0x1f;
794 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
795 {
796 int offset;
797
798 /* CSKY_FPC_REGNUM. */
799 rn = CSKY_NUM_GREGS + 3;
800 offset = CSKY_32_ST_OFFSET (insn2);
801 register_offsets[rn] = framesize - offset;
802 if (csky_debug)
803 print_savedreg_msg (rn, register_offsets, true);
804 continue;
805 }
806 break;
807 }
808 }
809 else if (CSKY_32_IS_PUSH (insn))
810 {
811 /* Push for 32_bit. */
812 int offset = 0;
813 if (CSKY_32_IS_PUSH_R29 (insn))
814 {
815 stacksize += 4;
816 register_offsets[29] = stacksize;
817 if (csky_debug)
818 print_savedreg_msg (29, register_offsets, false);
819 offset += 4;
820 }
821 if (CSKY_32_PUSH_LIST2 (insn))
822 {
823 int num = CSKY_32_PUSH_LIST2 (insn);
824 int tmp = 0;
825 stacksize += num * 4;
826 offset += num * 4;
827 if (csky_debug)
828 {
829 fprintf_unfiltered (gdb_stdlog,
830 "csky: push regs_array: r16-r%d\n",
831 16 + num - 1);
832 }
833 for (rn = 16; rn <= 16 + num - 1; rn++)
834 {
835 register_offsets[rn] = stacksize - tmp;
836 if (csky_debug)
837 {
838 fprintf_unfiltered (gdb_stdlog,
839 "csky: r%d saved at 0x%x"
840 " (offset %d)\n", rn,
841 register_offsets[rn], tmp);
842 }
843 tmp += 4;
844 }
845 }
846 if (CSKY_32_IS_PUSH_R15 (insn))
847 {
848 stacksize += 4;
849 register_offsets[15] = stacksize;
850 if (csky_debug)
851 print_savedreg_msg (15, register_offsets, false);
852 offset += 4;
853 }
854 if (CSKY_32_PUSH_LIST1 (insn))
855 {
856 int num = CSKY_32_PUSH_LIST1 (insn);
857 int tmp = 0;
858 stacksize += num * 4;
859 offset += num * 4;
860 if (csky_debug)
861 {
862 fprintf_unfiltered (gdb_stdlog,
863 "csky: push regs_array: r4-r%d\n",
864 4 + num - 1);
865 }
866 for (rn = 4; rn <= 4 + num - 1; rn++)
867 {
868 register_offsets[rn] = stacksize - tmp;
869 if (csky_debug)
870 {
871 fprintf_unfiltered (gdb_stdlog,
872 "csky: r%d saved at 0x%x"
873 " (offset %d)\n", rn,
874 register_offsets[rn], tmp);
875 }
876 tmp += 4;
877 }
878 }
879
880 framesize = stacksize;
881 if (csky_debug)
882 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
883 continue;
884 }
885 else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
886 || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
887 {
888 int adjust = 0;
889 int offset = 0;
890 unsigned int insn2;
891
892 if (csky_debug)
893 {
894 fprintf_unfiltered (gdb_stdlog,
895 "csky: looking at large frame\n");
896 }
897 if (CSKY_32_IS_LRW4 (insn))
898 {
899 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
900 int literal_addr = (addr + ((insn & 0xffff) << 2))
901 & 0xfffffffc;
902 adjust = read_memory_unsigned_integer (literal_addr, 4,
903 byte_order);
904 }
905 else if (CSKY_32_IS_MOVI4 (insn))
906 adjust = (insn & 0xffff);
907 else if (CSKY_32_IS_MOVIH4 (insn))
908 adjust = (insn & 0xffff) << 16;
909 else
910 {
911 /* CSKY_32_IS_BMASKI4 (insn). */
912 adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
913 }
914
915 if (csky_debug)
916 {
917 fprintf_unfiltered (gdb_stdlog,
918 "csky: base stacksize=0x%x\n", adjust);
919
920 /* May have zero or more insns which modify r4. */
921 fprintf_unfiltered (gdb_stdlog,
922 "csky: looking for r4 adjusters...\n");
923 }
924
925 offset = 4;
926 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
927 while (CSKY_IS_R4_ADJUSTER (insn2))
928 {
929 if (CSKY_32_IS_ADDI4 (insn2))
930 {
931 int imm = (insn2 & 0xfff) + 1;
932 adjust += imm;
933 if (csky_debug)
934 {
935 fprintf_unfiltered (gdb_stdlog,
936 "csky: addi r4,%d\n", imm);
937 }
938 }
939 else if (CSKY_32_IS_SUBI4 (insn2))
940 {
941 int imm = (insn2 & 0xfff) + 1;
942 adjust -= imm;
943 if (csky_debug)
944 {
945 fprintf_unfiltered (gdb_stdlog,
946 "csky: subi r4,%d\n", imm);
947 }
948 }
949 else if (CSKY_32_IS_NOR4 (insn2))
950 {
951 adjust = ~adjust;
952 if (csky_debug)
953 {
954 fprintf_unfiltered (gdb_stdlog,
955 "csky: nor r4,r4,r4\n");
956 }
957 }
958 else if (CSKY_32_IS_ROTLI4 (insn2))
959 {
960 int imm = ((insn2 >> 21) & 0x1f);
961 int temp = adjust >> (32 - imm);
962 adjust <<= imm;
963 adjust |= temp;
964 if (csky_debug)
965 {
966 fprintf_unfiltered (gdb_stdlog,
967 "csky: rotli r4,r4,%d\n", imm);
968 }
969 }
970 else if (CSKY_32_IS_LISI4 (insn2))
971 {
972 int imm = ((insn2 >> 21) & 0x1f);
973 adjust <<= imm;
974 if (csky_debug)
975 {
976 fprintf_unfiltered (gdb_stdlog,
977 "csky: lsli r4,r4,%d\n", imm);
978 }
979 }
980 else if (CSKY_32_IS_BSETI4 (insn2))
981 {
982 int imm = ((insn2 >> 21) & 0x1f);
983 adjust |= (1 << imm);
984 if (csky_debug)
985 {
986 fprintf_unfiltered (gdb_stdlog,
987 "csky: bseti r4,r4 %d\n", imm);
988 }
989 }
990 else if (CSKY_32_IS_BCLRI4 (insn2))
991 {
992 int imm = ((insn2 >> 21) & 0x1f);
993 adjust &= ~(1 << imm);
994 if (csky_debug)
995 {
996 fprintf_unfiltered (gdb_stdlog,
997 "csky: bclri r4,r4 %d\n", imm);
998 }
999 }
1000 else if (CSKY_32_IS_IXH4 (insn2))
1001 {
1002 adjust *= 3;
1003 if (csky_debug)
1004 {
1005 fprintf_unfiltered (gdb_stdlog,
1006 "csky: ixh r4,r4,r4\n");
1007 }
1008 }
1009 else if (CSKY_32_IS_IXW4 (insn2))
1010 {
1011 adjust *= 5;
1012 if (csky_debug)
1013 {
1014 fprintf_unfiltered (gdb_stdlog,
1015 "csky: ixw r4,r4,r4\n");
1016 }
1017 }
1018 else if (CSKY_16_IS_ADDI4 (insn2))
1019 {
1020 int imm = (insn2 & 0xff) + 1;
1021 adjust += imm;
1022 if (csky_debug)
1023 {
1024 fprintf_unfiltered (gdb_stdlog,
1025 "csky: addi r4,%d\n", imm);
1026 }
1027 }
1028 else if (CSKY_16_IS_SUBI4 (insn2))
1029 {
1030 int imm = (insn2 & 0xff) + 1;
1031 adjust -= imm;
1032 if (csky_debug)
1033 {
1034 fprintf_unfiltered (gdb_stdlog,
1035 "csky: subi r4,%d\n", imm);
1036 }
1037 }
1038 else if (CSKY_16_IS_NOR4 (insn2))
1039 {
1040 adjust = ~adjust;
1041 if (csky_debug)
1042 {
1043 fprintf_unfiltered (gdb_stdlog,
1044 "csky: nor r4,r4\n");
1045 }
1046 }
1047 else if (CSKY_16_IS_BSETI4 (insn2))
1048 {
1049 int imm = (insn2 & 0x1f);
1050 adjust |= (1 << imm);
1051 if (csky_debug)
1052 {
1053 fprintf_unfiltered (gdb_stdlog,
1054 "csky: bseti r4, %d\n", imm);
1055 }
1056 }
1057 else if (CSKY_16_IS_BCLRI4 (insn2))
1058 {
1059 int imm = (insn2 & 0x1f);
1060 adjust &= ~(1 << imm);
1061 if (csky_debug)
1062 {
1063 fprintf_unfiltered (gdb_stdlog,
1064 "csky: bclri r4, %d\n", imm);
1065 }
1066 }
1067 else if (CSKY_16_IS_LSLI4 (insn2))
1068 {
1069 int imm = (insn2 & 0x1f);
1070 adjust <<= imm;
1071 if (csky_debug)
1072 {
1073 fprintf_unfiltered (gdb_stdlog,
1074 "csky: lsli r4,r4, %d\n", imm);
1075 }
1076 }
1077
1078 offset += insn_len;
1079 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1080 };
1081
1082 if (csky_debug)
1083 {
1084 fprintf_unfiltered (gdb_stdlog, "csky: done looking for"
1085 " r4 adjusters\n");
1086 }
1087
1088 /* If the next insn adjusts the stack pointer, we keep
1089 everything; if not, we scrap it and we've found the
1090 end of the prologue. */
1091 if (CSKY_IS_SUBU4 (insn2))
1092 {
1093 addr += offset;
1094 stacksize += adjust;
1095 if (csky_debug)
1096 {
1097 fprintf_unfiltered (gdb_stdlog,
1098 "csky: found stack adjustment of"
1099 " 0x%x bytes.\n", adjust);
1100 fprintf_unfiltered (gdb_stdlog,
f6c4e3e8
TT		 1101 "csky: skipping to new address %s\n",
1102 core_addr_to_string_nz (addr));
9d24df82
HAQ		 1103 fprintf_unfiltered (gdb_stdlog,
1104 "csky: continuing\n");
1105 }
1106 continue;
1107 }
1108
1109 /* None of these instructions are prologue, so don't touch
1110 anything. */
1111 if (csky_debug)
1112 {
1113 fprintf_unfiltered (gdb_stdlog,
1114 "csky: no subu sp,sp,r4; NOT altering"
1115 " stacksize.\n");
1116 }
1117 break;
1118 }
1119 }
1120 else
1121 {
1122 /* insn_len != 4. */
1123
1124 /* subi.sp sp,disp. */
1125 if (CSKY_16_IS_SUBI0 (insn))
1126 {
1127 int offset = CSKY_16_SUBI_IMM (insn);
1128 if (csky_debug)
1129 {
1130 fprintf_unfiltered (gdb_stdlog,
1131 "csky: got subi r0,%d; continuing\n",
1132 offset);
1133 }
1134 stacksize += offset;
1135 continue;
1136 }
1137 /* stw.16 rz,(sp,disp). */
1138 else if (CSKY_16_IS_STWx0 (insn))
1139 {
1140 /* Spill register: see note for IS_STM above. */
1141 int disp;
1142
1143 rn = CSKY_16_ST_VAL_REGNUM (insn);
1144 disp = CSKY_16_ST_OFFSET (insn);
1145 register_offsets[rn] = stacksize - disp;
1146 if (csky_debug)
1147 print_savedreg_msg (rn, register_offsets, true);
1148 continue;
1149 }
1150 else if (CSKY_16_IS_MOV_FP_SP (insn))
1151 {
1152 /* SP is saved to FP reg, means prologue may modify SP. */
1153 is_fp_saved = 1;
1154 adjust_fp = stacksize;
1155 continue;
1156 }
1157 else if (CSKY_16_IS_PUSH (insn))
1158 {
1159 /* Push for 16_bit. */
1160 int offset = 0;
1161 if (CSKY_16_IS_PUSH_R15 (insn))
1162 {
1163 stacksize += 4;
1164 register_offsets[15] = stacksize;
1165 if (csky_debug)
1166 print_savedreg_msg (15, register_offsets, false);
1167 offset += 4;
1168 }
1169 if (CSKY_16_PUSH_LIST1 (insn))
1170 {
1171 int num = CSKY_16_PUSH_LIST1 (insn);
1172 int tmp = 0;
1173 stacksize += num * 4;
1174 offset += num * 4;
1175 if (csky_debug)
1176 {
1177 fprintf_unfiltered (gdb_stdlog,
1178 "csky: push regs_array: r4-r%d\n",
1179 4 + num - 1);
1180 }
1181 for (rn = 4; rn <= 4 + num - 1; rn++)
1182 {
1183 register_offsets[rn] = stacksize - tmp;
1184 if (csky_debug)
1185 {
1186 fprintf_unfiltered (gdb_stdlog,
1187 "csky: r%d saved at 0x%x"
1188 " (offset %d)\n", rn,
1189 register_offsets[rn], offset);
1190 }
1191 tmp += 4;
1192 }
1193 }
1194
1195 framesize = stacksize;
1196 if (csky_debug)
1197 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1198 continue;
1199 }
1200 else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1201 {
1202 int adjust = 0;
9d24df82
HAQ		 1203 unsigned int insn2;
1204
1205 if (csky_debug)
1206 {
1207 fprintf_unfiltered (gdb_stdlog,
1208 "csky: looking at large frame\n");
1209 }
1210 if (CSKY_16_IS_LRW4 (insn))
1211 {
1212 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1213 int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1214 int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1215 adjust = read_memory_unsigned_integer (literal_addr, 4,
1216 byte_order);
1217 }
1218 else
1219 {
1220 /* CSKY_16_IS_MOVI4 (insn). */
1221 adjust = (insn & 0xff);
1222 }
1223
1224 if (csky_debug)
1225 {
1226 fprintf_unfiltered (gdb_stdlog,
1227 "csky: base stacksize=0x%x\n", adjust);
1228 }
1229
1230 /* May have zero or more instructions which modify r4. */
1231 if (csky_debug)
1232 {
1233 fprintf_unfiltered (gdb_stdlog,
1234 "csky: looking for r4 adjusters...\n");
1235 }
b926417a 1236 int offset = 2;
9d24df82
HAQ		 1237 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1238 while (CSKY_IS_R4_ADJUSTER (insn2))
1239 {
1240 if (CSKY_32_IS_ADDI4 (insn2))
1241 {
1242 int imm = (insn2 & 0xfff) + 1;
1243 adjust += imm;
1244 if (csky_debug)
1245 {
1246 fprintf_unfiltered (gdb_stdlog,
1247 "csky: addi r4,%d\n", imm);
1248 }
1249 }
1250 else if (CSKY_32_IS_SUBI4 (insn2))
1251 {
1252 int imm = (insn2 & 0xfff) + 1;
1253 adjust -= imm;
1254 if (csky_debug)
1255 {
1256 fprintf_unfiltered (gdb_stdlog,
1257 "csky: subi r4,%d\n", imm);
1258 }
1259 }
1260 else if (CSKY_32_IS_NOR4 (insn2))
1261 {
1262 adjust = ~adjust;
1263 if (csky_debug)
1264 {
1265 fprintf_unfiltered (gdb_stdlog,
1266 "csky: nor r4,r4,r4\n");
1267 }
1268 }
1269 else if (CSKY_32_IS_ROTLI4 (insn2))
1270 {
1271 int imm = ((insn2 >> 21) & 0x1f);
1272 int temp = adjust >> (32 - imm);
1273 adjust <<= imm;
1274 adjust |= temp;
1275 if (csky_debug)
1276 {
1277 fprintf_unfiltered (gdb_stdlog,
1278 "csky: rotli r4,r4,%d\n", imm);
1279 }
1280 }
1281 else if (CSKY_32_IS_LISI4 (insn2))
1282 {
1283 int imm = ((insn2 >> 21) & 0x1f);
1284 adjust <<= imm;
1285 if (csky_debug)
1286 {
1287 fprintf_unfiltered (gdb_stdlog,
1288 "csky: lsli r4,r4,%d\n", imm);
1289 }
1290 }
1291 else if (CSKY_32_IS_BSETI4 (insn2))
1292 {
1293 int imm = ((insn2 >> 21) & 0x1f);
1294 adjust |= (1 << imm);
1295 if (csky_debug)
1296 {
1297 fprintf_unfiltered (gdb_stdlog,
1298 "csky: bseti r4,r4 %d\n", imm);
1299 }
1300 }
1301 else if (CSKY_32_IS_BCLRI4 (insn2))
1302 {
1303 int imm = ((insn2 >> 21) & 0x1f);
1304 adjust &= ~(1 << imm);
1305 if (csky_debug)
1306 {
1307 fprintf_unfiltered (gdb_stdlog,
1308 "csky: bclri r4,r4 %d\n", imm);
1309 }
1310 }
1311 else if (CSKY_32_IS_IXH4 (insn2))
1312 {
1313 adjust *= 3;
1314 if (csky_debug)
1315 {
1316 fprintf_unfiltered (gdb_stdlog,
1317 "csky: ixh r4,r4,r4\n");
1318 }
1319 }
1320 else if (CSKY_32_IS_IXW4 (insn2))
1321 {
1322 adjust *= 5;
1323 if (csky_debug)
1324 {
1325 fprintf_unfiltered (gdb_stdlog,
1326 "csky: ixw r4,r4,r4\n");
1327 }
1328 }
1329 else if (CSKY_16_IS_ADDI4 (insn2))
1330 {
1331 int imm = (insn2 & 0xff) + 1;
1332 adjust += imm;
1333 if (csky_debug)
1334 {
1335 fprintf_unfiltered (gdb_stdlog,
1336 "csky: addi r4,%d\n", imm);
1337 }
1338 }
1339 else if (CSKY_16_IS_SUBI4 (insn2))
1340 {
1341 int imm = (insn2 & 0xff) + 1;
1342 adjust -= imm;
1343 if (csky_debug)
1344 {
1345 fprintf_unfiltered (gdb_stdlog,
1346 "csky: subi r4,%d\n", imm);
1347 }
1348 }
1349 else if (CSKY_16_IS_NOR4 (insn2))
1350 {
1351 adjust = ~adjust;
1352 if (csky_debug)
1353 {
1354 fprintf_unfiltered (gdb_stdlog,
1355 "csky: nor r4,r4\n");
1356 }
1357 }
1358 else if (CSKY_16_IS_BSETI4 (insn2))
1359 {
1360 int imm = (insn2 & 0x1f);
1361 adjust |= (1 << imm);
1362 if (csky_debug)
1363 {
1364 fprintf_unfiltered (gdb_stdlog,
1365 "csky: bseti r4, %d\n", imm);
1366 }
1367 }
1368 else if (CSKY_16_IS_BCLRI4 (insn2))
1369 {
1370 int imm = (insn2 & 0x1f);
1371 adjust &= ~(1 << imm);
1372 if (csky_debug)
1373 {
1374 fprintf_unfiltered (gdb_stdlog,
1375 "csky: bclri r4, %d\n", imm);
1376 }
1377 }
1378 else if (CSKY_16_IS_LSLI4 (insn2))
1379 {
1380 int imm = (insn2 & 0x1f);
1381 adjust <<= imm;
1382 if (csky_debug)
1383 {
1384 fprintf_unfiltered (gdb_stdlog,
1385 "csky: lsli r4,r4, %d\n", imm);
1386 }
1387 }
1388
1389 offset += insn_len;
1390 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1391 };
1392
1393 if (csky_debug)
1394 {
1395 fprintf_unfiltered (gdb_stdlog, "csky: "
1396 "done looking for r4 adjusters\n");
1397 }
1398
1399 /* If the next instruction adjusts the stack pointer, we keep
1400 everything; if not, we scrap it and we've found the end
1401 of the prologue. */
1402 if (CSKY_IS_SUBU4 (insn2))
1403 {
1404 addr += offset;
1405 stacksize += adjust;
1406 if (csky_debug)
1407 {
1408 fprintf_unfiltered (gdb_stdlog, "csky: "
1409 "found stack adjustment of 0x%x"
1410 " bytes.\n", adjust);
1411 fprintf_unfiltered (gdb_stdlog, "csky: "
f6c4e3e8
TT		 1412 "skipping to new address %s\n",
1413 core_addr_to_string_nz (addr));
9d24df82
HAQ		 1414 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1415 }
1416 continue;
1417 }
1418
1419 /* None of these instructions are prologue, so don't touch
1420 anything. */
1421 if (csky_debug)
1422 {
1423 fprintf_unfiltered (gdb_stdlog, "csky: no subu sp,r4; "
1424 "NOT altering stacksize.\n");
1425 }
1426 break;
1427 }
1428 }
1429
1430 /* This is not a prologue instruction, so stop here. */
1431 if (csky_debug)
1432 {
1433 fprintf_unfiltered (gdb_stdlog, "csky: insn is not a prologue"
1434 " insn -- ending scan\n");
1435 }
1436 break;
1437 }
1438
1439 if (this_cache)
1440 {
1441 CORE_ADDR unwound_fp;
1442 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1443 this_cache->framesize = framesize;
1444
1445 if (is_fp_saved)
1446 {
1447 this_cache->framereg = CSKY_FP_REGNUM;
1448 unwound_fp = get_frame_register_unsigned (this_frame,
1449 this_cache->framereg);
1450 this_cache->prev_sp = unwound_fp + adjust_fp;
1451 }
1452 else
1453 {
1454 this_cache->framereg = CSKY_SP_REGNUM;
1455 unwound_fp = get_frame_register_unsigned (this_frame,
1456 this_cache->framereg);
1457 this_cache->prev_sp = unwound_fp + stacksize;
1458 }
1459
1460 /* Note where saved registers are stored. The offsets in
1461 REGISTER_OFFSETS are computed relative to the top of the frame. */
1462 for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1463 {
1464 if (register_offsets[rn] >= 0)
1465 {
1466 this_cache->saved_regs[rn].addr
1467 = this_cache->prev_sp - register_offsets[rn];
1468 if (csky_debug)
1469 {
1470 CORE_ADDR rn_value = read_memory_unsigned_integer (
1471 this_cache->saved_regs[rn].addr, 4, byte_order);
1472 fprintf_unfiltered (gdb_stdlog, "Saved register %s "
1473 "stored at 0x%08lx, value=0x%08lx\n",
1474 csky_register_names[rn],
1475 (unsigned long)
1476 this_cache->saved_regs[rn].addr,
1477 (unsigned long) rn_value);
1478 }
1479 }
1480 }
1481 if (lr_type == LR_TYPE_EPC)
1482 {
1483 /* rte || epc . */
1484 this_cache->saved_regs[CSKY_PC_REGNUM]
1485 = this_cache->saved_regs[CSKY_EPC_REGNUM];
1486 }
1487 else if (lr_type == LR_TYPE_FPC)
1488 {
1489 /* rfi || fpc . */
1490 this_cache->saved_regs[CSKY_PC_REGNUM]
1491 = this_cache->saved_regs[CSKY_FPC_REGNUM];
1492 }
1493 else
1494 {
1495 this_cache->saved_regs[CSKY_PC_REGNUM]
1496 = this_cache->saved_regs[CSKY_LR_REGNUM];
1497 }
1498 }
1499
1500 return addr;
1501}
1502
1503/* Detect whether PC is at a point where the stack frame has been
1504 destroyed. */
1505
1506static int
1507csky_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1508{
1509 unsigned int insn;
1510 CORE_ADDR addr;
1511 CORE_ADDR func_start, func_end;
1512
1513 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1514 return 0;
1515
1516 bool fp_saved = false;
1517 int insn_len;
1518 for (addr = func_start; addr < func_end; addr += insn_len)
1519 {
1520 /* Get next insn. */
1521 insn_len = csky_get_insn (gdbarch, addr, &insn);
1522
1523 if (insn_len == 2)
1524 {
1525 /* Is sp is saved to fp. */
1526 if (CSKY_16_IS_MOV_FP_SP (insn))
1527 fp_saved = true;
1528 /* If sp was saved to fp and now being restored from
1529 fp then it indicates the start of epilog. */
1530 else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1531 return pc >= addr;
1532 }
1533 }
1534 return 0;
1535}
1536
1537/* Implement the skip_prologue gdbarch hook. */
1538
1539static CORE_ADDR
1540csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1541{
1542 CORE_ADDR func_addr, func_end;
1543 struct symtab_and_line sal;
1544 const int default_search_limit = 128;
1545
1546 /* See if we can find the end of the prologue using the symbol table. */
1547 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1548 {
1549 CORE_ADDR post_prologue_pc
1550 = skip_prologue_using_sal (gdbarch, func_addr);
1551
1552 if (post_prologue_pc != 0)
1553 return std::max (pc, post_prologue_pc);
1554 }
1555 else
1556 func_end = pc + default_search_limit;
1557
1558 /* Find the end of prologue. Default lr_type. */
1559 return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1560 NULL, NULL, LR_TYPE_R15);
1561}
1562
1563/* Implement the breakpoint_kind_from_pc gdbarch method. */
1564
1565static int
1566csky_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1567{
1568 if (csky_pc_is_csky16 (gdbarch, *pcptr))
1569 return CSKY_INSN_SIZE16;
1570 else
1571 return CSKY_INSN_SIZE32;
1572}
1573
1574/* Implement the sw_breakpoint_from_kind gdbarch method. */
1575
1576static const gdb_byte *
1577csky_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1578{
1579 *size = kind;
1580 if (kind == CSKY_INSN_SIZE16)
1581 {
1582 static gdb_byte csky_16_breakpoint[] = { 0, 0 };
1583 return csky_16_breakpoint;
1584 }
1585 else
1586 {
1587 static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
1588 return csky_32_breakpoint;
1589 }
1590}
1591
1592/* Implement the memory_insert_breakpoint gdbarch method. */
1593
1594static int
1595csky_memory_insert_breakpoint (struct gdbarch *gdbarch,
1596 struct bp_target_info *bp_tgt)
1597{
1598 int val;
1599 const unsigned char *bp;
1600 gdb_byte bp_write_record1[] = { 0, 0, 0, 0 };
1601 gdb_byte bp_write_record2[] = { 0, 0, 0, 0 };
1602 gdb_byte bp_record[] = { 0, 0, 0, 0 };
1603
1604 /* Sanity-check bp_address. */
1605 if (bp_tgt->reqstd_address % 2)
2362e7f7 1606 warning (_("Invalid breakpoint address 0x%x is an odd number."),
9d24df82
HAQ		 1607 (unsigned int) bp_tgt->reqstd_address);
1608 scoped_restore restore_memory
1609 = make_scoped_restore_show_memory_breakpoints (1);
1610
1611 /* Determine appropriate breakpoint_kind for this address. */
1612 bp_tgt->kind = csky_breakpoint_kind_from_pc (gdbarch,
1613 &bp_tgt->reqstd_address);
1614
1615 /* Save the memory contents. */
1616 bp_tgt->shadow_len = bp_tgt->kind;
1617
1618 /* Fill bp_tgt->placed_address. */
1619 bp_tgt->placed_address = bp_tgt->reqstd_address;
1620
1621 if (bp_tgt->kind == CSKY_INSN_SIZE16)
1622 {
1623 if ((bp_tgt->reqstd_address % 4) == 0)
1624 {
1625 /* Read two bytes. */
1626 val = target_read_memory (bp_tgt->reqstd_address,
1627 bp_tgt->shadow_contents, 2);
1628 if (val)
1629 return val;
1630
1631 /* Read two bytes. */
1632 val = target_read_memory (bp_tgt->reqstd_address + 2,
1633 bp_record, 2);
1634 if (val)
1635 return val;
1636
1637 /* Write the breakpoint. */
1638 bp_write_record1[2] = bp_record[0];
1639 bp_write_record1[3] = bp_record[1];
1640 bp = bp_write_record1;
1641 val = target_write_raw_memory (bp_tgt->reqstd_address, bp,
1642 CSKY_WR_BKPT_MODE);
1643 }
1644 else
1645 {
1646 val = target_read_memory (bp_tgt->reqstd_address,
1647 bp_tgt->shadow_contents, 2);
1648 if (val)
1649 return val;
1650
1651 val = target_read_memory (bp_tgt->reqstd_address - 2,
1652 bp_record, 2);
1653 if (val)
1654 return val;
1655
1656 /* Write the breakpoint. */
1657 bp_write_record1[0] = bp_record[0];
1658 bp_write_record1[1] = bp_record[1];
1659 bp = bp_write_record1;
1660 val = target_write_raw_memory (bp_tgt->reqstd_address - 2,
1661 bp, CSKY_WR_BKPT_MODE);
1662 }
1663 }
1664 else
1665 {
1666 if (bp_tgt->placed_address % 4 == 0)
1667 {
1668 val = target_read_memory (bp_tgt->reqstd_address,
1669 bp_tgt->shadow_contents,
1670 CSKY_WR_BKPT_MODE);
1671 if (val)
1672 return val;
1673
1674 /* Write the breakpoint. */
1675 bp = bp_write_record1;
1676 val = target_write_raw_memory (bp_tgt->reqstd_address,
1677 bp, CSKY_WR_BKPT_MODE);
1678 }
1679 else
1680 {
1681 val = target_read_memory (bp_tgt->reqstd_address,
1682 bp_tgt->shadow_contents,
1683 CSKY_WR_BKPT_MODE);
1684 if (val)
1685 return val;
1686
1687 val = target_read_memory (bp_tgt->reqstd_address - 2,
1688 bp_record, 2);
1689 if (val)
1690 return val;
1691
1692 val = target_read_memory (bp_tgt->reqstd_address + 4,
1693 bp_record + 2, 2);
1694 if (val)
1695 return val;
1696
1697 bp_write_record1[0] = bp_record[0];
1698 bp_write_record1[1] = bp_record[1];
1699 bp_write_record2[2] = bp_record[2];
1700 bp_write_record2[3] = bp_record[3];
1701
1702 /* Write the breakpoint. */
1703 bp = bp_write_record1;
1704 val = target_write_raw_memory (bp_tgt->reqstd_address - 2, bp,
1705 CSKY_WR_BKPT_MODE);
1706 if (val)
1707 return val;
1708
1709 /* Write the breakpoint. */
1710 bp = bp_write_record2;
1711 val = target_write_raw_memory (bp_tgt->reqstd_address + 2, bp,
1712 CSKY_WR_BKPT_MODE);
1713 }
1714 }
1715 return val;
1716}
1717
1718/* Restore the breakpoint shadow_contents to the target. */
1719
1720static int
1721csky_memory_remove_breakpoint (struct gdbarch *gdbarch,
1722 struct bp_target_info *bp_tgt)
1723{
1724 int val;
1725 gdb_byte bp_record[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1726 /* Different for shadow_len 2 or 4. */
1727 if (bp_tgt->shadow_len == 2)
1728 {
1729 /* Do word-sized writes on word-aligned boundaries and read
1730 padding bytes as necessary. */
1731 if (bp_tgt->reqstd_address % 4 == 0)
1732 {
1733 val = target_read_memory (bp_tgt->reqstd_address + 2,
1734 bp_record + 2, 2);
1735 if (val)
1736 return val;
1737 bp_record[0] = bp_tgt->shadow_contents[0];
1738 bp_record[1] = bp_tgt->shadow_contents[1];
1739 return target_write_raw_memory (bp_tgt->reqstd_address,
1740 bp_record, CSKY_WR_BKPT_MODE);
1741 }
1742 else
1743 {
1744 val = target_read_memory (bp_tgt->reqstd_address - 2,
1745 bp_record, 2);
1746 if (val)
1747 return val;
1748 bp_record[2] = bp_tgt->shadow_contents[0];
1749 bp_record[3] = bp_tgt->shadow_contents[1];
1750 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1751 bp_record, CSKY_WR_BKPT_MODE);
1752 }
1753 }
1754 else
1755 {
1756 /* Do word-sized writes on word-aligned boundaries and read
1757 padding bytes as necessary. */
1758 if (bp_tgt->placed_address % 4 == 0)
1759 {
1760 return target_write_raw_memory (bp_tgt->reqstd_address,
1761 bp_tgt->shadow_contents,
1762 CSKY_WR_BKPT_MODE);
1763 }
1764 else
1765 {
1766 val = target_read_memory (bp_tgt->reqstd_address - 2,
1767 bp_record, 2);
1768 if (val)
1769 return val;
1770 val = target_read_memory (bp_tgt->reqstd_address + 4,
1771 bp_record+6, 2);
1772 if (val)
1773 return val;
1774
1775 bp_record[2] = bp_tgt->shadow_contents[0];
1776 bp_record[3] = bp_tgt->shadow_contents[1];
1777 bp_record[4] = bp_tgt->shadow_contents[2];
1778 bp_record[5] = bp_tgt->shadow_contents[3];
1779
1780 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1781 bp_record,
1782 CSKY_WR_BKPT_MODE * 2);
1783 }
1784 }
1785}
1786
1787/* Determine link register type. */
1788
1789static lr_type_t
1790csky_analyze_lr_type (struct gdbarch *gdbarch,
1791 CORE_ADDR start_pc, CORE_ADDR end_pc)
1792{
1793 CORE_ADDR addr;
1794 unsigned int insn, insn_len;
1795 insn_len = 2;
1796
1797 for (addr = start_pc; addr < end_pc; addr += insn_len)
1798 {
1799 insn_len = csky_get_insn (gdbarch, addr, &insn);
1800 if (insn_len == 4)
1801 {
1802 if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
1803 || CSKY_32_IS_RTE (insn))
1804 return LR_TYPE_EPC;
1805 }
1806 else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
1807 || CSKY_32_IS_RFI (insn))
1808 return LR_TYPE_FPC;
1809 else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
1810 || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
1811 return LR_TYPE_R15;
1812 else
1813 {
1814 /* 16 bit instruction. */
1815 if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
1816 || CSKY_16_IS_JMPIX (insn))
1817 return LR_TYPE_R15;
1818 }
1819 }
1820 return LR_TYPE_R15;
1821}
1822
1823/* Heuristic unwinder. */
1824
1825static struct csky_unwind_cache *
1826csky_frame_unwind_cache (struct frame_info *this_frame)
1827{
1828 CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
1829 struct csky_unwind_cache *cache;
1830 const struct block *bl;
1831 unsigned long func_size = 0;
1832 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1833 unsigned int sp_regnum = CSKY_SP_REGNUM;
1834
1835 /* Default lr type is r15. */
1836 lr_type_t lr_type = LR_TYPE_R15;
1837
1838 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1839 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1840
1841 /* Assume there is no frame until proven otherwise. */
1842 cache->framereg = sp_regnum;
1843
1844 cache->framesize = 0;
1845
1846 prev_pc = get_frame_pc (this_frame);
1847 block_addr = get_frame_address_in_block (this_frame);
1848 if (find_pc_partial_function (block_addr, NULL, &prologue_start,
1849 &func_end) == 0)
1850 /* We couldn't find a function containing block_addr, so bail out
1851 and hope for the best. */
1852 return cache;
1853
1854 /* Get the (function) symbol matching prologue_start. */
1855 bl = block_for_pc (prologue_start);
1856 if (bl != NULL)
1857 func_size = bl->endaddr - bl->startaddr;
1858 else
1859 {
1860 struct bound_minimal_symbol msymbol
1861 = lookup_minimal_symbol_by_pc (prologue_start);
1862 if (msymbol.minsym != NULL)
1863 func_size = MSYMBOL_SIZE (msymbol.minsym);
1864 }
1865
1866 /* If FUNC_SIZE is 0 we may have a special-case use of lr
1867 e.g. exception or interrupt. */
1868 if (func_size == 0)
1869 lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
1870
1871 prologue_end = std::min (func_end, prev_pc);
1872
1873 /* Analyze the function prologue. */
1874 csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
1875 func_end, this_frame, cache, lr_type);
1876
1877 /* gdbarch_sp_regnum contains the value and not the address. */
1878 trad_frame_set_value (cache->saved_regs, sp_regnum, cache->prev_sp);
1879 return cache;
1880}
1881
9d24df82
HAQ		 1882/* Implement the this_id function for the normal unwinder. */
1883
1884static void
1885csky_frame_this_id (struct frame_info *this_frame,
1886 void **this_prologue_cache, struct frame_id *this_id)
1887{
1888 struct csky_unwind_cache *cache;
1889 struct frame_id id;
1890
1891 if (*this_prologue_cache == NULL)
1892 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1893 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1894
1895 /* This marks the outermost frame. */
1896 if (cache->prev_sp == 0)
1897 return;
1898
1899 id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
1900 *this_id = id;
1901}
1902
1903/* Implement the prev_register function for the normal unwinder. */
1904
1905static struct value *
1906csky_frame_prev_register (struct frame_info *this_frame,
1907 void **this_prologue_cache, int regnum)
1908{
1909 struct csky_unwind_cache *cache;
1910
1911 if (*this_prologue_cache == NULL)
1912 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1913 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1914
1915 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1916 regnum);
1917}
1918
1919/* Data structures for the normal prologue-analysis-based
1920 unwinder. */
1921
1922static const struct frame_unwind csky_unwind_cache = {
1923 NORMAL_FRAME,
1924 default_frame_unwind_stop_reason,
1925 csky_frame_this_id,
1926 csky_frame_prev_register,
1927 NULL,
1928 default_frame_sniffer,
1929 NULL,
1930 NULL
1931};
1932
1933
1934
1935static int
1936csky_stub_unwind_sniffer (const struct frame_unwind *self,
1937 struct frame_info *this_frame,
1938 void **this_prologue_cache)
1939{
1940 CORE_ADDR addr_in_block;
1941
1942 addr_in_block = get_frame_address_in_block (this_frame);
1943
1944 if (find_pc_partial_function (addr_in_block, NULL, NULL, NULL) == 0
1945 || in_plt_section (addr_in_block))
1946 return 1;
1947
1948 return 0;
1949}
1950
1951static struct csky_unwind_cache *
1952csky_make_stub_cache (struct frame_info *this_frame)
1953{
1954 struct csky_unwind_cache *cache;
1955
1956 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1957 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1958 cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
1959
1960 return cache;
1961}
1962
1963static void
1964csky_stub_this_id (struct frame_info *this_frame,
1965 void **this_cache,
1966 struct frame_id *this_id)
1967{
1968 struct csky_unwind_cache *cache;
1969
1970 if (*this_cache == NULL)
1971 *this_cache = csky_make_stub_cache (this_frame);
1972 cache = (struct csky_unwind_cache *) *this_cache;
1973
1974 /* Our frame ID for a stub frame is the current SP and LR. */
1975 *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
1976}
1977
1978static struct value *
1979csky_stub_prev_register (struct frame_info *this_frame,
1980 void **this_cache,
1981 int prev_regnum)
1982{
1983 struct csky_unwind_cache *cache;
1984
1985 if (*this_cache == NULL)
1986 *this_cache = csky_make_stub_cache (this_frame);
1987 cache = (struct csky_unwind_cache *) *this_cache;
1988
1989 /* If we are asked to unwind the PC, then return the LR. */
1990 if (prev_regnum == CSKY_PC_REGNUM)
1991 {
1992 CORE_ADDR lr;
1993
1994 lr = frame_unwind_register_unsigned (this_frame, CSKY_LR_REGNUM);
1995 return frame_unwind_got_constant (this_frame, prev_regnum, lr);
1996 }
1997
1998 if (prev_regnum == CSKY_SP_REGNUM)
1999 return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
2000
2001 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
2002 prev_regnum);
2003}
2004
2005struct frame_unwind csky_stub_unwind = {
2006 NORMAL_FRAME,
2007 default_frame_unwind_stop_reason,
2008 csky_stub_this_id,
2009 csky_stub_prev_register,
2010 NULL,
2011 csky_stub_unwind_sniffer
2012};
2013
2014/* Implement the this_base, this_locals, and this_args hooks
2015 for the normal unwinder. */
2016
2017static CORE_ADDR
2018csky_frame_base_address (struct frame_info *this_frame, void **this_cache)
2019{
2020 struct csky_unwind_cache *cache;
2021
2022 if (*this_cache == NULL)
2023 *this_cache = csky_frame_unwind_cache (this_frame);
2024 cache = (struct csky_unwind_cache *) *this_cache;
2025
2026 return cache->prev_sp - cache->framesize;
2027}
2028
2029static const struct frame_base csky_frame_base = {
2030 &csky_unwind_cache,
2031 csky_frame_base_address,
2032 csky_frame_base_address,
2033 csky_frame_base_address
2034};
2035
9d24df82
HAQ		 2036/* Initialize register access method. */
2037
2038static void
2039csky_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2040 struct dwarf2_frame_state_reg *reg,
2041 struct frame_info *this_frame)
2042{
2043 if (regnum == gdbarch_pc_regnum (gdbarch))
2044 reg->how = DWARF2_FRAME_REG_RA;
2045 else if (regnum == gdbarch_sp_regnum (gdbarch))
2046 reg->how = DWARF2_FRAME_REG_CFA;
2047}
2048
2049/* Create csky register groups. */
2050
2051static void
2052csky_init_reggroup ()
2053{
2054 cr_reggroup = reggroup_new ("cr", USER_REGGROUP);
2055 fr_reggroup = reggroup_new ("fr", USER_REGGROUP);
2056 vr_reggroup = reggroup_new ("vr", USER_REGGROUP);
2057 mmu_reggroup = reggroup_new ("mmu", USER_REGGROUP);
2058 prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2059}
2060
2061/* Add register groups into reggroup list. */
2062
2063static void
2064csky_add_reggroups (struct gdbarch *gdbarch)
2065{
2066 reggroup_add (gdbarch, all_reggroup);
2067 reggroup_add (gdbarch, general_reggroup);
2068 reggroup_add (gdbarch, cr_reggroup);
2069 reggroup_add (gdbarch, fr_reggroup);
2070 reggroup_add (gdbarch, vr_reggroup);
2071 reggroup_add (gdbarch, mmu_reggroup);
2072 reggroup_add (gdbarch, prof_reggroup);
2073}
2074
2075/* Return the groups that a CSKY register can be categorised into. */
2076
2077static int
2078csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2079 struct reggroup *reggroup)
2080{
2081 int raw_p;
2082
2083 if (gdbarch_register_name (gdbarch, regnum) == NULL
2084 || gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2085 return 0;
2086
2087 if (reggroup == all_reggroup)
2088 return 1;
2089
2090 raw_p = regnum < gdbarch_num_regs (gdbarch);
2091 if (reggroup == save_reggroup || reggroup == restore_reggroup)
2092 return raw_p;
2093
2094 if (((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2095 && (reggroup == general_reggroup))
2096 return 1;
2097
2098 if (((regnum == CSKY_PC_REGNUM)
2099 || ((regnum >= CSKY_CR0_REGNUM)
2100 && (regnum <= CSKY_CR0_REGNUM + 30)))
2101 && (reggroup == cr_reggroup))
2102 return 2;
2103
2104 if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2105 || ((regnum >= CSKY_VCR0_REGNUM)
2106 && (regnum <= CSKY_VCR0_REGNUM + 2)))
2107 && (reggroup == vr_reggroup))
2108 return 3;
2109
2110 if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2111 && (reggroup == mmu_reggroup))
2112 return 4;
2113
2114 if (((regnum >= CSKY_PROFCR_REGNUM)
2115 && (regnum <= CSKY_PROFCR_REGNUM + 48))
2116 && (reggroup == prof_reggroup))
2117 return 5;
2118
2119 if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2120 || ((regnum >= CSKY_VCR0_REGNUM) && (regnum <= CSKY_VCR0_REGNUM + 2)))
2121 && (reggroup == fr_reggroup))
2122 return 6;
2123
2124 return 0;
2125}
2126
2127/* Implement the dwarf2_reg_to_regnum gdbarch method. */
2128
2129static int
2130csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
2131{
2132 if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS)
2133 return -1;
2134 return dw_reg;
2135}
2136
2137/* Override interface for command: info register. */
2138
2139static void
2140csky_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
2141 struct frame_info *frame, int regnum, int all)
2142{
2143 /* Call default print_registers_info function. */
2144 default_print_registers_info (gdbarch, file, frame, regnum, all);
2145
2146 /* For command: info register. */
2147 if (regnum == -1 && all == 0)
2148 {
2149 default_print_registers_info (gdbarch, file, frame,
2150 CSKY_PC_REGNUM, 0);
2151 default_print_registers_info (gdbarch, file, frame,
2152 CSKY_EPC_REGNUM, 0);
2153 default_print_registers_info (gdbarch, file, frame,
2154 CSKY_CR0_REGNUM, 0);
2155 default_print_registers_info (gdbarch, file, frame,
2156 CSKY_EPSR_REGNUM, 0);
2157 }
2158 return;
2159}
2160
2161/* Initialize the current architecture based on INFO. If possible,
2162 re-use an architecture from ARCHES, which is a list of
2163 architectures already created during this debugging session.
2164
2165 Called at program startup, when reading a core file, and when
2166 reading a binary file. */
2167
2168static struct gdbarch *
2169csky_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2170{
2171 struct gdbarch *gdbarch;
2172 struct gdbarch_tdep *tdep;
2173
2174 /* Find a candidate among the list of pre-declared architectures. */
2175 arches = gdbarch_list_lookup_by_info (arches, &info);
2176 if (arches != NULL)
2177 return arches->gdbarch;
2178
2179 /* None found, create a new architecture from the information
2180 provided. */
2181 tdep = XCNEW (struct gdbarch_tdep);
2182 gdbarch = gdbarch_alloc (&info, tdep);
2183
2184 /* Target data types. */
2185 set_gdbarch_ptr_bit (gdbarch, 32);
2186 set_gdbarch_addr_bit (gdbarch, 32);
2187 set_gdbarch_short_bit (gdbarch, 16);
2188 set_gdbarch_int_bit (gdbarch, 32);
2189 set_gdbarch_long_bit (gdbarch, 32);
2190 set_gdbarch_long_long_bit (gdbarch, 64);
2191 set_gdbarch_float_bit (gdbarch, 32);
2192 set_gdbarch_double_bit (gdbarch, 64);
2193 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2194 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2195
2196 /* Information about the target architecture. */
2197 set_gdbarch_return_value (gdbarch, csky_return_value);
2198 set_gdbarch_breakpoint_kind_from_pc (gdbarch, csky_breakpoint_kind_from_pc);
2199 set_gdbarch_sw_breakpoint_from_kind (gdbarch, csky_sw_breakpoint_from_kind);
2200
2201 /* Register architecture. */
2202 set_gdbarch_num_regs (gdbarch, CSKY_NUM_REGS);
2203 set_gdbarch_pc_regnum (gdbarch, CSKY_PC_REGNUM);
2204 set_gdbarch_sp_regnum (gdbarch, CSKY_SP_REGNUM);
2205 set_gdbarch_register_name (gdbarch, csky_register_name);
2206 set_gdbarch_register_type (gdbarch, csky_register_type);
2207 set_gdbarch_read_pc (gdbarch, csky_read_pc);
2208 set_gdbarch_write_pc (gdbarch, csky_write_pc);
2209 set_gdbarch_print_registers_info (gdbarch, csky_print_registers_info);
2210 csky_add_reggroups (gdbarch);
2211 set_gdbarch_register_reggroup_p (gdbarch, csky_register_reggroup_p);
2212 set_gdbarch_stab_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2213 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2214 dwarf2_frame_set_init_reg (gdbarch, csky_dwarf2_frame_init_reg);
2215
2216 /* Functions to analyze frames. */
2217 frame_base_set_default (gdbarch, &csky_frame_base);
2218 set_gdbarch_skip_prologue (gdbarch, csky_skip_prologue);
2219 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2220 set_gdbarch_frame_align (gdbarch, csky_frame_align);
2221 set_gdbarch_stack_frame_destroyed_p (gdbarch, csky_stack_frame_destroyed_p);
2222
9d24df82
HAQ		 2223 /* Functions handling dummy frames. */
2224 set_gdbarch_push_dummy_call (gdbarch, csky_push_dummy_call);
9d24df82
HAQ		 2225
2226 /* Frame unwinders. Use DWARF debug info if available,
2227 otherwise use our own unwinder. */
2228 dwarf2_append_unwinders (gdbarch);
2229 frame_unwind_append_unwinder (gdbarch, &csky_stub_unwind);
2230 frame_unwind_append_unwinder (gdbarch, &csky_unwind_cache);
2231
2232 /* Breakpoints. */
2233 set_gdbarch_memory_insert_breakpoint (gdbarch,
2234 csky_memory_insert_breakpoint);
2235 set_gdbarch_memory_remove_breakpoint (gdbarch,
2236 csky_memory_remove_breakpoint);
2237
2238 /* Hook in ABI-specific overrides, if they have been registered. */
2239 gdbarch_init_osabi (info, gdbarch);
2240
2241 /* Support simple overlay manager. */
2242 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
2243 set_gdbarch_char_signed (gdbarch, 0);
2244 return gdbarch;
2245}
2246
2247void
2248_initialize_csky_tdep (void)
2249{
2250
2251 register_gdbarch_init (bfd_arch_csky, csky_gdbarch_init);
2252
2253 csky_init_reggroup ();
2254
2255 /* Allow debugging this file's internals. */
2256 add_setshow_boolean_cmd ("csky", class_maintenance, &csky_debug,
2257 _("Set C-Sky debugging."),
2258 _("Show C-Sky debugging."),
2259 _("When on, C-Sky specific debugging is enabled."),
2260 NULL,
2261 NULL,
2262 &setdebuglist, &showdebuglist);
2263}
GDB Binutils - Deliverables
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