Commit | Line | Data |
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c906108c SS |
1 | /* Target-dependent code for Mitsubishi D10V, for GDB. |
2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | ||
c5aa993b | 4 | This file is part of GDB. |
c906108c | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
c906108c | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
c906108c | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
20 | |
21 | /* Contributed by Martin Hunt, hunt@cygnus.com */ | |
22 | ||
23 | #include "defs.h" | |
24 | #include "frame.h" | |
25 | #include "obstack.h" | |
26 | #include "symtab.h" | |
27 | #include "gdbtypes.h" | |
28 | #include "gdbcmd.h" | |
29 | #include "gdbcore.h" | |
30 | #include "gdb_string.h" | |
31 | #include "value.h" | |
32 | #include "inferior.h" | |
c5aa993b | 33 | #include "dis-asm.h" |
c906108c SS |
34 | #include "symfile.h" |
35 | #include "objfiles.h" | |
104c1213 | 36 | #include "language.h" |
c906108c | 37 | |
cce74817 | 38 | struct frame_extra_info |
c5aa993b JM |
39 | { |
40 | CORE_ADDR return_pc; | |
41 | int frameless; | |
42 | int size; | |
43 | }; | |
cce74817 JM |
44 | |
45 | /* these are the addresses the D10V-EVA board maps data */ | |
46 | /* and instruction memory to. */ | |
47 | ||
48 | #define DMEM_START 0x0000000 | |
49 | #define IMEM_START 0x1000000 | |
50 | #define STACK_START 0x0007ffe | |
51 | ||
52 | /* d10v register naming conventions */ | |
53 | ||
54 | #define ARG1_REGNUM R0_REGNUM | |
55 | #define ARGN_REGNUM 3 | |
56 | #define RET1_REGNUM R0_REGNUM | |
57 | ||
392a587b JM |
58 | /* Local functions */ |
59 | ||
60 | extern void _initialize_d10v_tdep PARAMS ((void)); | |
61 | ||
62 | static void d10v_eva_prepare_to_trace PARAMS ((void)); | |
63 | ||
64 | static void d10v_eva_get_trace_data PARAMS ((void)); | |
c906108c | 65 | |
c5aa993b | 66 | static int prologue_find_regs PARAMS ((unsigned short op, struct frame_info * fi, CORE_ADDR addr)); |
cce74817 JM |
67 | |
68 | extern void d10v_frame_init_saved_regs PARAMS ((struct frame_info *)); | |
69 | ||
c5aa993b | 70 | static void do_d10v_pop_frame PARAMS ((struct frame_info * fi)); |
cce74817 JM |
71 | |
72 | /* FIXME */ | |
c5aa993b | 73 | extern void remote_d10v_translate_xfer_address PARAMS ((CORE_ADDR gdb_addr, int gdb_len, CORE_ADDR * rem_addr, int *rem_len)); |
cce74817 | 74 | |
c906108c SS |
75 | int |
76 | d10v_frame_chain_valid (chain, frame) | |
77 | CORE_ADDR chain; | |
c5aa993b | 78 | struct frame_info *frame; /* not used here */ |
c906108c SS |
79 | { |
80 | return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START); | |
81 | } | |
82 | ||
83 | ||
84 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of | |
85 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc | |
86 | and TYPE is the type (which is known to be struct, union or array). | |
87 | ||
88 | The d10v returns anything less than 8 bytes in size in | |
89 | registers. */ | |
90 | ||
91 | int | |
92 | d10v_use_struct_convention (gcc_p, type) | |
93 | int gcc_p; | |
94 | struct type *type; | |
95 | { | |
96 | return (TYPE_LENGTH (type) > 8); | |
97 | } | |
98 | ||
99 | ||
392a587b JM |
100 | unsigned char * |
101 | d10v_breakpoint_from_pc (pcptr, lenptr) | |
102 | CORE_ADDR *pcptr; | |
103 | int *lenptr; | |
104 | { | |
c5aa993b JM |
105 | static unsigned char breakpoint[] = |
106 | {0x2f, 0x90, 0x5e, 0x00}; | |
392a587b JM |
107 | *lenptr = sizeof (breakpoint); |
108 | return breakpoint; | |
109 | } | |
110 | ||
111 | char * | |
112 | d10v_register_name (reg_nr) | |
113 | int reg_nr; | |
114 | { | |
c5aa993b JM |
115 | static char *register_names[] = |
116 | { | |
117 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
118 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
119 | "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c", | |
120 | "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15", | |
121 | "imap0", "imap1", "dmap", "a0", "a1" | |
392a587b JM |
122 | }; |
123 | if (reg_nr < 0) | |
124 | return NULL; | |
125 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
126 | return NULL; | |
c5aa993b | 127 | return register_names[reg_nr]; |
392a587b JM |
128 | } |
129 | ||
130 | ||
131 | /* Index within `registers' of the first byte of the space for | |
132 | register REG_NR. */ | |
133 | ||
134 | int | |
135 | d10v_register_byte (reg_nr) | |
136 | int reg_nr; | |
137 | { | |
138 | if (reg_nr > A0_REGNUM) | |
139 | return ((reg_nr - A0_REGNUM) * 8 + (A0_REGNUM * 2)); | |
140 | else | |
141 | return (reg_nr * 2); | |
142 | } | |
143 | ||
144 | /* Number of bytes of storage in the actual machine representation for | |
145 | register REG_NR. */ | |
146 | ||
147 | int | |
148 | d10v_register_raw_size (reg_nr) | |
149 | int reg_nr; | |
150 | { | |
151 | if (reg_nr >= A0_REGNUM) | |
152 | return 8; | |
153 | else | |
154 | return 2; | |
155 | } | |
156 | ||
157 | /* Number of bytes of storage in the program's representation | |
158 | for register N. */ | |
159 | ||
160 | int | |
161 | d10v_register_virtual_size (reg_nr) | |
162 | int reg_nr; | |
163 | { | |
164 | if (reg_nr >= A0_REGNUM) | |
165 | return 8; | |
166 | else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM) | |
167 | return 4; | |
168 | else | |
169 | return 2; | |
170 | } | |
171 | ||
172 | /* Return the GDB type object for the "standard" data type | |
173 | of data in register N. */ | |
174 | ||
175 | struct type * | |
176 | d10v_register_virtual_type (reg_nr) | |
177 | int reg_nr; | |
178 | { | |
179 | if (reg_nr >= A0_REGNUM) | |
180 | return builtin_type_long_long; | |
181 | else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM) | |
182 | return builtin_type_long; | |
183 | else | |
184 | return builtin_type_short; | |
185 | } | |
186 | ||
392a587b | 187 | /* convert $pc and $sp to/from virtual addresses */ |
ac9a91a7 JM |
188 | int |
189 | d10v_register_convertible (nr) | |
190 | int nr; | |
191 | { | |
192 | return ((nr) == PC_REGNUM || (nr) == SP_REGNUM); | |
193 | } | |
194 | ||
195 | void | |
196 | d10v_register_convert_to_virtual (regnum, type, from, to) | |
197 | int regnum; | |
198 | struct type *type; | |
199 | char *from; | |
200 | char *to; | |
201 | { | |
202 | ULONGEST x = extract_unsigned_integer (from, REGISTER_RAW_SIZE (regnum)); | |
203 | if (regnum == PC_REGNUM) | |
204 | x = (x << 2) | IMEM_START; | |
205 | else | |
206 | x |= DMEM_START; | |
207 | store_unsigned_integer (to, TYPE_LENGTH (type), x); | |
392a587b | 208 | } |
ac9a91a7 JM |
209 | |
210 | void | |
211 | d10v_register_convert_to_raw (type, regnum, from, to) | |
212 | struct type *type; | |
213 | int regnum; | |
214 | char *from; | |
215 | char *to; | |
216 | { | |
217 | ULONGEST x = extract_unsigned_integer (from, TYPE_LENGTH (type)); | |
218 | x &= 0x3ffff; | |
219 | if (regnum == PC_REGNUM) | |
220 | x >>= 2; | |
221 | store_unsigned_integer (to, 2, x); | |
392a587b | 222 | } |
ac9a91a7 | 223 | |
392a587b JM |
224 | |
225 | CORE_ADDR | |
226 | d10v_make_daddr (x) | |
227 | CORE_ADDR x; | |
228 | { | |
229 | return ((x) | DMEM_START); | |
230 | } | |
231 | ||
232 | CORE_ADDR | |
233 | d10v_make_iaddr (x) | |
234 | CORE_ADDR x; | |
235 | { | |
236 | return (((x) << 2) | IMEM_START); | |
237 | } | |
238 | ||
239 | int | |
240 | d10v_daddr_p (x) | |
241 | CORE_ADDR x; | |
242 | { | |
243 | return (((x) & 0x3000000) == DMEM_START); | |
244 | } | |
245 | ||
246 | int | |
247 | d10v_iaddr_p (x) | |
248 | CORE_ADDR x; | |
249 | { | |
250 | return (((x) & 0x3000000) == IMEM_START); | |
251 | } | |
252 | ||
253 | ||
254 | CORE_ADDR | |
255 | d10v_convert_iaddr_to_raw (x) | |
256 | CORE_ADDR x; | |
257 | { | |
258 | return (((x) >> 2) & 0xffff); | |
259 | } | |
260 | ||
261 | CORE_ADDR | |
c5aa993b | 262 | d10v_convert_daddr_to_raw (x) |
392a587b JM |
263 | CORE_ADDR x; |
264 | { | |
265 | return ((x) & 0xffff); | |
266 | } | |
267 | ||
268 | /* Store the address of the place in which to copy the structure the | |
269 | subroutine will return. This is called from call_function. | |
270 | ||
271 | We store structs through a pointer passed in the first Argument | |
272 | register. */ | |
273 | ||
274 | void | |
275 | d10v_store_struct_return (addr, sp) | |
276 | CORE_ADDR addr; | |
277 | CORE_ADDR sp; | |
278 | { | |
279 | write_register (ARG1_REGNUM, (addr)); | |
280 | } | |
281 | ||
282 | /* Write into appropriate registers a function return value | |
283 | of type TYPE, given in virtual format. | |
284 | ||
285 | Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */ | |
286 | ||
287 | void | |
c5aa993b | 288 | d10v_store_return_value (type, valbuf) |
392a587b JM |
289 | struct type *type; |
290 | char *valbuf; | |
291 | { | |
292 | write_register_bytes (REGISTER_BYTE (RET1_REGNUM), | |
293 | valbuf, | |
294 | TYPE_LENGTH (type)); | |
295 | } | |
296 | ||
297 | /* Extract from an array REGBUF containing the (raw) register state | |
298 | the address in which a function should return its structure value, | |
299 | as a CORE_ADDR (or an expression that can be used as one). */ | |
300 | ||
301 | CORE_ADDR | |
302 | d10v_extract_struct_value_address (regbuf) | |
303 | char *regbuf; | |
304 | { | |
305 | return (extract_address ((regbuf) + REGISTER_BYTE (ARG1_REGNUM), | |
306 | REGISTER_RAW_SIZE (ARG1_REGNUM)) | |
307 | | DMEM_START); | |
308 | } | |
309 | ||
310 | CORE_ADDR | |
311 | d10v_frame_saved_pc (frame) | |
312 | struct frame_info *frame; | |
313 | { | |
cce74817 | 314 | return ((frame)->extra_info->return_pc); |
392a587b JM |
315 | } |
316 | ||
317 | CORE_ADDR | |
318 | d10v_frame_args_address (fi) | |
319 | struct frame_info *fi; | |
320 | { | |
321 | return (fi)->frame; | |
322 | } | |
323 | ||
324 | CORE_ADDR | |
325 | d10v_frame_locals_address (fi) | |
326 | struct frame_info *fi; | |
327 | { | |
328 | return (fi)->frame; | |
329 | } | |
330 | ||
331 | /* Immediately after a function call, return the saved pc. We can't | |
332 | use frame->return_pc beause that is determined by reading R13 off | |
333 | the stack and that may not be written yet. */ | |
334 | ||
335 | CORE_ADDR | |
336 | d10v_saved_pc_after_call (frame) | |
337 | struct frame_info *frame; | |
338 | { | |
c5aa993b | 339 | return ((read_register (LR_REGNUM) << 2) |
392a587b JM |
340 | | IMEM_START); |
341 | } | |
342 | ||
c906108c SS |
343 | /* Discard from the stack the innermost frame, restoring all saved |
344 | registers. */ | |
345 | ||
346 | void | |
cce74817 JM |
347 | d10v_pop_frame () |
348 | { | |
349 | generic_pop_current_frame (do_d10v_pop_frame); | |
350 | } | |
351 | ||
352 | static void | |
353 | do_d10v_pop_frame (fi) | |
354 | struct frame_info *fi; | |
c906108c SS |
355 | { |
356 | CORE_ADDR fp; | |
357 | int regnum; | |
c906108c SS |
358 | char raw_buffer[8]; |
359 | ||
cce74817 | 360 | fp = FRAME_FP (fi); |
c906108c SS |
361 | /* fill out fsr with the address of where each */ |
362 | /* register was stored in the frame */ | |
cce74817 | 363 | d10v_frame_init_saved_regs (fi); |
c5aa993b | 364 | |
c906108c | 365 | /* now update the current registers with the old values */ |
c5aa993b | 366 | for (regnum = A0_REGNUM; regnum < A0_REGNUM + 2; regnum++) |
c906108c | 367 | { |
cce74817 | 368 | if (fi->saved_regs[regnum]) |
c906108c | 369 | { |
c5aa993b JM |
370 | read_memory (fi->saved_regs[regnum], raw_buffer, REGISTER_RAW_SIZE (regnum)); |
371 | write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, REGISTER_RAW_SIZE (regnum)); | |
c906108c SS |
372 | } |
373 | } | |
374 | for (regnum = 0; regnum < SP_REGNUM; regnum++) | |
375 | { | |
cce74817 | 376 | if (fi->saved_regs[regnum]) |
c906108c | 377 | { |
c5aa993b | 378 | write_register (regnum, read_memory_unsigned_integer (fi->saved_regs[regnum], REGISTER_RAW_SIZE (regnum))); |
c906108c SS |
379 | } |
380 | } | |
cce74817 | 381 | if (fi->saved_regs[PSW_REGNUM]) |
c906108c | 382 | { |
c5aa993b | 383 | write_register (PSW_REGNUM, read_memory_unsigned_integer (fi->saved_regs[PSW_REGNUM], REGISTER_RAW_SIZE (PSW_REGNUM))); |
c906108c SS |
384 | } |
385 | ||
386 | write_register (PC_REGNUM, read_register (LR_REGNUM)); | |
cce74817 | 387 | write_register (SP_REGNUM, fp + fi->extra_info->size); |
c906108c SS |
388 | target_store_registers (-1); |
389 | flush_cached_frames (); | |
390 | } | |
391 | ||
c5aa993b | 392 | static int |
c906108c SS |
393 | check_prologue (op) |
394 | unsigned short op; | |
395 | { | |
396 | /* st rn, @-sp */ | |
397 | if ((op & 0x7E1F) == 0x6C1F) | |
398 | return 1; | |
399 | ||
400 | /* st2w rn, @-sp */ | |
401 | if ((op & 0x7E3F) == 0x6E1F) | |
402 | return 1; | |
403 | ||
404 | /* subi sp, n */ | |
405 | if ((op & 0x7FE1) == 0x01E1) | |
406 | return 1; | |
407 | ||
408 | /* mv r11, sp */ | |
409 | if (op == 0x417E) | |
410 | return 1; | |
411 | ||
412 | /* nop */ | |
413 | if (op == 0x5E00) | |
414 | return 1; | |
415 | ||
416 | /* st rn, @sp */ | |
417 | if ((op & 0x7E1F) == 0x681E) | |
418 | return 1; | |
419 | ||
420 | /* st2w rn, @sp */ | |
c5aa993b JM |
421 | if ((op & 0x7E3F) == 0x3A1E) |
422 | return 1; | |
c906108c SS |
423 | |
424 | return 0; | |
425 | } | |
426 | ||
427 | CORE_ADDR | |
428 | d10v_skip_prologue (pc) | |
429 | CORE_ADDR pc; | |
430 | { | |
431 | unsigned long op; | |
432 | unsigned short op1, op2; | |
433 | CORE_ADDR func_addr, func_end; | |
434 | struct symtab_and_line sal; | |
435 | ||
436 | /* If we have line debugging information, then the end of the */ | |
437 | /* prologue should the first assembly instruction of the first source line */ | |
438 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
439 | { | |
440 | sal = find_pc_line (func_addr, 0); | |
c5aa993b | 441 | if (sal.end && sal.end < func_end) |
c906108c SS |
442 | return sal.end; |
443 | } | |
c5aa993b JM |
444 | |
445 | if (target_read_memory (pc, (char *) &op, 4)) | |
c906108c SS |
446 | return pc; /* Can't access it -- assume no prologue. */ |
447 | ||
448 | while (1) | |
449 | { | |
c5aa993b | 450 | op = (unsigned long) read_memory_integer (pc, 4); |
c906108c SS |
451 | if ((op & 0xC0000000) == 0xC0000000) |
452 | { | |
453 | /* long instruction */ | |
c5aa993b JM |
454 | if (((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */ |
455 | ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */ | |
456 | ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */ | |
c906108c SS |
457 | break; |
458 | } | |
459 | else | |
460 | { | |
461 | /* short instructions */ | |
462 | if ((op & 0xC0000000) == 0x80000000) | |
463 | { | |
464 | op2 = (op & 0x3FFF8000) >> 15; | |
465 | op1 = op & 0x7FFF; | |
c5aa993b JM |
466 | } |
467 | else | |
c906108c SS |
468 | { |
469 | op1 = (op & 0x3FFF8000) >> 15; | |
470 | op2 = op & 0x7FFF; | |
471 | } | |
c5aa993b | 472 | if (check_prologue (op1)) |
c906108c | 473 | { |
c5aa993b | 474 | if (!check_prologue (op2)) |
c906108c SS |
475 | { |
476 | /* if the previous opcode was really part of the prologue */ | |
477 | /* and not just a NOP, then we want to break after both instructions */ | |
478 | if (op1 != 0x5E00) | |
479 | pc += 4; | |
480 | break; | |
481 | } | |
482 | } | |
483 | else | |
484 | break; | |
485 | } | |
486 | pc += 4; | |
487 | } | |
488 | return pc; | |
489 | } | |
490 | ||
491 | /* Given a GDB frame, determine the address of the calling function's frame. | |
492 | This will be used to create a new GDB frame struct, and then | |
493 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
c5aa993b | 494 | */ |
c906108c SS |
495 | |
496 | CORE_ADDR | |
cce74817 JM |
497 | d10v_frame_chain (fi) |
498 | struct frame_info *fi; | |
c906108c | 499 | { |
cce74817 | 500 | d10v_frame_init_saved_regs (fi); |
c906108c | 501 | |
cce74817 JM |
502 | if (fi->extra_info->return_pc == IMEM_START |
503 | || inside_entry_file (fi->extra_info->return_pc)) | |
c5aa993b | 504 | return (CORE_ADDR) 0; |
c906108c | 505 | |
cce74817 | 506 | if (!fi->saved_regs[FP_REGNUM]) |
c906108c | 507 | { |
cce74817 JM |
508 | if (!fi->saved_regs[SP_REGNUM] |
509 | || fi->saved_regs[SP_REGNUM] == STACK_START) | |
c5aa993b JM |
510 | return (CORE_ADDR) 0; |
511 | ||
cce74817 | 512 | return fi->saved_regs[SP_REGNUM]; |
c906108c SS |
513 | } |
514 | ||
c5aa993b JM |
515 | if (!read_memory_unsigned_integer (fi->saved_regs[FP_REGNUM], |
516 | REGISTER_RAW_SIZE (FP_REGNUM))) | |
517 | return (CORE_ADDR) 0; | |
c906108c | 518 | |
cce74817 | 519 | return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi->saved_regs[FP_REGNUM], |
c5aa993b JM |
520 | REGISTER_RAW_SIZE (FP_REGNUM))); |
521 | } | |
c906108c SS |
522 | |
523 | static int next_addr, uses_frame; | |
524 | ||
c5aa993b | 525 | static int |
cce74817 | 526 | prologue_find_regs (op, fi, addr) |
c906108c | 527 | unsigned short op; |
cce74817 | 528 | struct frame_info *fi; |
c906108c SS |
529 | CORE_ADDR addr; |
530 | { | |
531 | int n; | |
532 | ||
533 | /* st rn, @-sp */ | |
534 | if ((op & 0x7E1F) == 0x6C1F) | |
535 | { | |
536 | n = (op & 0x1E0) >> 5; | |
537 | next_addr -= 2; | |
cce74817 | 538 | fi->saved_regs[n] = next_addr; |
c906108c SS |
539 | return 1; |
540 | } | |
541 | ||
542 | /* st2w rn, @-sp */ | |
543 | else if ((op & 0x7E3F) == 0x6E1F) | |
544 | { | |
545 | n = (op & 0x1E0) >> 5; | |
546 | next_addr -= 4; | |
cce74817 | 547 | fi->saved_regs[n] = next_addr; |
c5aa993b | 548 | fi->saved_regs[n + 1] = next_addr + 2; |
c906108c SS |
549 | return 1; |
550 | } | |
551 | ||
552 | /* subi sp, n */ | |
553 | if ((op & 0x7FE1) == 0x01E1) | |
554 | { | |
555 | n = (op & 0x1E) >> 1; | |
556 | if (n == 0) | |
557 | n = 16; | |
558 | next_addr -= n; | |
559 | return 1; | |
560 | } | |
561 | ||
562 | /* mv r11, sp */ | |
563 | if (op == 0x417E) | |
564 | { | |
565 | uses_frame = 1; | |
566 | return 1; | |
567 | } | |
568 | ||
569 | /* nop */ | |
570 | if (op == 0x5E00) | |
571 | return 1; | |
572 | ||
573 | /* st rn, @sp */ | |
574 | if ((op & 0x7E1F) == 0x681E) | |
575 | { | |
576 | n = (op & 0x1E0) >> 5; | |
cce74817 | 577 | fi->saved_regs[n] = next_addr; |
c906108c SS |
578 | return 1; |
579 | } | |
580 | ||
581 | /* st2w rn, @sp */ | |
582 | if ((op & 0x7E3F) == 0x3A1E) | |
583 | { | |
584 | n = (op & 0x1E0) >> 5; | |
cce74817 | 585 | fi->saved_regs[n] = next_addr; |
c5aa993b | 586 | fi->saved_regs[n + 1] = next_addr + 2; |
c906108c SS |
587 | return 1; |
588 | } | |
589 | ||
590 | return 0; | |
591 | } | |
592 | ||
cce74817 JM |
593 | /* Put here the code to store, into fi->saved_regs, the addresses of |
594 | the saved registers of frame described by FRAME_INFO. This | |
595 | includes special registers such as pc and fp saved in special ways | |
596 | in the stack frame. sp is even more special: the address we return | |
597 | for it IS the sp for the next frame. */ | |
598 | ||
c906108c | 599 | void |
cce74817 | 600 | d10v_frame_init_saved_regs (fi) |
c906108c | 601 | struct frame_info *fi; |
c906108c SS |
602 | { |
603 | CORE_ADDR fp, pc; | |
604 | unsigned long op; | |
605 | unsigned short op1, op2; | |
606 | int i; | |
607 | ||
608 | fp = fi->frame; | |
cce74817 | 609 | memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS); |
c906108c SS |
610 | next_addr = 0; |
611 | ||
612 | pc = get_pc_function_start (fi->pc); | |
613 | ||
614 | uses_frame = 0; | |
615 | while (1) | |
616 | { | |
c5aa993b | 617 | op = (unsigned long) read_memory_integer (pc, 4); |
c906108c SS |
618 | if ((op & 0xC0000000) == 0xC0000000) |
619 | { | |
620 | /* long instruction */ | |
621 | if ((op & 0x3FFF0000) == 0x01FF0000) | |
622 | { | |
623 | /* add3 sp,sp,n */ | |
624 | short n = op & 0xFFFF; | |
625 | next_addr += n; | |
626 | } | |
627 | else if ((op & 0x3F0F0000) == 0x340F0000) | |
628 | { | |
629 | /* st rn, @(offset,sp) */ | |
630 | short offset = op & 0xFFFF; | |
631 | short n = (op >> 20) & 0xF; | |
cce74817 | 632 | fi->saved_regs[n] = next_addr + offset; |
c906108c SS |
633 | } |
634 | else if ((op & 0x3F1F0000) == 0x350F0000) | |
635 | { | |
636 | /* st2w rn, @(offset,sp) */ | |
637 | short offset = op & 0xFFFF; | |
638 | short n = (op >> 20) & 0xF; | |
cce74817 | 639 | fi->saved_regs[n] = next_addr + offset; |
c5aa993b | 640 | fi->saved_regs[n + 1] = next_addr + offset + 2; |
c906108c SS |
641 | } |
642 | else | |
643 | break; | |
644 | } | |
645 | else | |
646 | { | |
647 | /* short instructions */ | |
648 | if ((op & 0xC0000000) == 0x80000000) | |
649 | { | |
650 | op2 = (op & 0x3FFF8000) >> 15; | |
651 | op1 = op & 0x7FFF; | |
c5aa993b JM |
652 | } |
653 | else | |
c906108c SS |
654 | { |
655 | op1 = (op & 0x3FFF8000) >> 15; | |
656 | op2 = op & 0x7FFF; | |
657 | } | |
c5aa993b | 658 | if (!prologue_find_regs (op1, fi, pc) || !prologue_find_regs (op2, fi, pc)) |
c906108c SS |
659 | break; |
660 | } | |
661 | pc += 4; | |
662 | } | |
c5aa993b | 663 | |
cce74817 | 664 | fi->extra_info->size = -next_addr; |
c906108c SS |
665 | |
666 | if (!(fp & 0xffff)) | |
c5aa993b | 667 | fp = D10V_MAKE_DADDR (read_register (SP_REGNUM)); |
c906108c | 668 | |
c5aa993b | 669 | for (i = 0; i < NUM_REGS - 1; i++) |
cce74817 | 670 | if (fi->saved_regs[i]) |
c906108c | 671 | { |
c5aa993b | 672 | fi->saved_regs[i] = fp - (next_addr - fi->saved_regs[i]); |
c906108c SS |
673 | } |
674 | ||
cce74817 | 675 | if (fi->saved_regs[LR_REGNUM]) |
c906108c | 676 | { |
cce74817 JM |
677 | CORE_ADDR return_pc = read_memory_unsigned_integer (fi->saved_regs[LR_REGNUM], REGISTER_RAW_SIZE (LR_REGNUM)); |
678 | fi->extra_info->return_pc = D10V_MAKE_IADDR (return_pc); | |
c906108c SS |
679 | } |
680 | else | |
681 | { | |
c5aa993b | 682 | fi->extra_info->return_pc = D10V_MAKE_IADDR (read_register (LR_REGNUM)); |
c906108c | 683 | } |
c5aa993b | 684 | |
c906108c | 685 | /* th SP is not normally (ever?) saved, but check anyway */ |
cce74817 | 686 | if (!fi->saved_regs[SP_REGNUM]) |
c906108c SS |
687 | { |
688 | /* if the FP was saved, that means the current FP is valid, */ | |
689 | /* otherwise, it isn't being used, so we use the SP instead */ | |
690 | if (uses_frame) | |
c5aa993b | 691 | fi->saved_regs[SP_REGNUM] = read_register (FP_REGNUM) + fi->extra_info->size; |
c906108c SS |
692 | else |
693 | { | |
cce74817 JM |
694 | fi->saved_regs[SP_REGNUM] = fp + fi->extra_info->size; |
695 | fi->extra_info->frameless = 1; | |
696 | fi->saved_regs[FP_REGNUM] = 0; | |
c906108c SS |
697 | } |
698 | } | |
699 | } | |
700 | ||
701 | void | |
702 | d10v_init_extra_frame_info (fromleaf, fi) | |
703 | int fromleaf; | |
704 | struct frame_info *fi; | |
705 | { | |
cce74817 JM |
706 | fi->extra_info = (struct frame_extra_info *) |
707 | frame_obstack_alloc (sizeof (struct frame_extra_info)); | |
708 | frame_saved_regs_zalloc (fi); | |
709 | ||
710 | fi->extra_info->frameless = 0; | |
711 | fi->extra_info->size = 0; | |
712 | fi->extra_info->return_pc = 0; | |
c906108c SS |
713 | |
714 | /* The call dummy doesn't save any registers on the stack, so we can | |
715 | return now. */ | |
716 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
717 | { | |
718 | return; | |
719 | } | |
720 | else | |
721 | { | |
cce74817 | 722 | d10v_frame_init_saved_regs (fi); |
c906108c SS |
723 | } |
724 | } | |
725 | ||
726 | static void | |
727 | show_regs (args, from_tty) | |
728 | char *args; | |
729 | int from_tty; | |
730 | { | |
731 | int a; | |
732 | printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n", | |
c5aa993b JM |
733 | read_register (PC_REGNUM), D10V_MAKE_IADDR (read_register (PC_REGNUM)), |
734 | read_register (PSW_REGNUM), | |
735 | read_register (24), | |
736 | read_register (25), | |
737 | read_register (23)); | |
c906108c | 738 | printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n", |
c5aa993b JM |
739 | read_register (0), |
740 | read_register (1), | |
741 | read_register (2), | |
742 | read_register (3), | |
743 | read_register (4), | |
744 | read_register (5), | |
745 | read_register (6), | |
746 | read_register (7)); | |
c906108c | 747 | printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n", |
c5aa993b JM |
748 | read_register (8), |
749 | read_register (9), | |
750 | read_register (10), | |
751 | read_register (11), | |
752 | read_register (12), | |
753 | read_register (13), | |
754 | read_register (14), | |
755 | read_register (15)); | |
c906108c | 756 | printf_filtered ("IMAP0 %04x IMAP1 %04x DMAP %04x\n", |
c5aa993b JM |
757 | read_register (IMAP0_REGNUM), |
758 | read_register (IMAP1_REGNUM), | |
759 | read_register (DMAP_REGNUM)); | |
c906108c SS |
760 | printf_filtered ("A0-A1"); |
761 | for (a = A0_REGNUM; a <= A0_REGNUM + 1; a++) | |
762 | { | |
763 | char num[MAX_REGISTER_RAW_SIZE]; | |
764 | int i; | |
765 | printf_filtered (" "); | |
c5aa993b | 766 | read_register_gen (a, (char *) &num); |
c906108c SS |
767 | for (i = 0; i < MAX_REGISTER_RAW_SIZE; i++) |
768 | { | |
769 | printf_filtered ("%02x", (num[i] & 0xff)); | |
770 | } | |
771 | } | |
772 | printf_filtered ("\n"); | |
773 | } | |
774 | ||
775 | CORE_ADDR | |
776 | d10v_read_pc (pid) | |
777 | int pid; | |
778 | { | |
779 | int save_pid; | |
780 | CORE_ADDR pc; | |
781 | CORE_ADDR retval; | |
782 | ||
783 | save_pid = inferior_pid; | |
784 | inferior_pid = pid; | |
785 | pc = (int) read_register (PC_REGNUM); | |
786 | inferior_pid = save_pid; | |
787 | retval = D10V_MAKE_IADDR (pc); | |
788 | return retval; | |
789 | } | |
790 | ||
791 | void | |
792 | d10v_write_pc (val, pid) | |
793 | CORE_ADDR val; | |
794 | int pid; | |
795 | { | |
796 | int save_pid; | |
797 | ||
798 | save_pid = inferior_pid; | |
799 | inferior_pid = pid; | |
800 | write_register (PC_REGNUM, D10V_CONVERT_IADDR_TO_RAW (val)); | |
801 | inferior_pid = save_pid; | |
802 | } | |
803 | ||
804 | CORE_ADDR | |
805 | d10v_read_sp () | |
806 | { | |
807 | return (D10V_MAKE_DADDR (read_register (SP_REGNUM))); | |
808 | } | |
809 | ||
810 | void | |
811 | d10v_write_sp (val) | |
812 | CORE_ADDR val; | |
813 | { | |
814 | write_register (SP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val)); | |
815 | } | |
816 | ||
817 | void | |
818 | d10v_write_fp (val) | |
819 | CORE_ADDR val; | |
820 | { | |
821 | write_register (FP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val)); | |
822 | } | |
823 | ||
824 | CORE_ADDR | |
825 | d10v_read_fp () | |
826 | { | |
c5aa993b | 827 | return (D10V_MAKE_DADDR (read_register (FP_REGNUM))); |
c906108c SS |
828 | } |
829 | ||
830 | /* Function: push_return_address (pc) | |
831 | Set up the return address for the inferior function call. | |
832 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
c5aa993b | 833 | |
c906108c SS |
834 | CORE_ADDR |
835 | d10v_push_return_address (pc, sp) | |
836 | CORE_ADDR pc; | |
837 | CORE_ADDR sp; | |
838 | { | |
839 | write_register (LR_REGNUM, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ())); | |
840 | return sp; | |
841 | } | |
c5aa993b | 842 | |
c906108c | 843 | |
7a292a7a SS |
844 | /* When arguments must be pushed onto the stack, they go on in reverse |
845 | order. The below implements a FILO (stack) to do this. */ | |
846 | ||
847 | struct stack_item | |
848 | { | |
849 | int len; | |
850 | struct stack_item *prev; | |
851 | void *data; | |
852 | }; | |
853 | ||
c5aa993b | 854 | static struct stack_item *push_stack_item PARAMS ((struct stack_item * prev, void *contents, int len)); |
7a292a7a SS |
855 | static struct stack_item * |
856 | push_stack_item (prev, contents, len) | |
857 | struct stack_item *prev; | |
858 | void *contents; | |
859 | int len; | |
860 | { | |
861 | struct stack_item *si; | |
862 | si = xmalloc (sizeof (struct stack_item)); | |
863 | si->data = xmalloc (len); | |
864 | si->len = len; | |
865 | si->prev = prev; | |
866 | memcpy (si->data, contents, len); | |
867 | return si; | |
868 | } | |
869 | ||
c5aa993b | 870 | static struct stack_item *pop_stack_item PARAMS ((struct stack_item * si)); |
7a292a7a SS |
871 | static struct stack_item * |
872 | pop_stack_item (si) | |
873 | struct stack_item *si; | |
874 | { | |
875 | struct stack_item *dead = si; | |
876 | si = si->prev; | |
877 | free (dead->data); | |
878 | free (dead); | |
879 | return si; | |
880 | } | |
881 | ||
882 | ||
c906108c SS |
883 | CORE_ADDR |
884 | d10v_push_arguments (nargs, args, sp, struct_return, struct_addr) | |
885 | int nargs; | |
886 | value_ptr *args; | |
887 | CORE_ADDR sp; | |
888 | int struct_return; | |
889 | CORE_ADDR struct_addr; | |
890 | { | |
891 | int i; | |
892 | int regnum = ARG1_REGNUM; | |
7a292a7a | 893 | struct stack_item *si = NULL; |
c5aa993b | 894 | |
c906108c SS |
895 | /* Fill in registers and arg lists */ |
896 | for (i = 0; i < nargs; i++) | |
897 | { | |
898 | value_ptr arg = args[i]; | |
899 | struct type *type = check_typedef (VALUE_TYPE (arg)); | |
900 | char *contents = VALUE_CONTENTS (arg); | |
901 | int len = TYPE_LENGTH (type); | |
902 | /* printf ("push: type=%d len=%d\n", type->code, len); */ | |
903 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
904 | { | |
905 | /* pointers require special handling - first convert and | |
906 | then store */ | |
907 | long val = extract_signed_integer (contents, len); | |
908 | len = 2; | |
909 | if (TYPE_TARGET_TYPE (type) | |
910 | && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)) | |
911 | { | |
912 | /* function pointer */ | |
913 | val = D10V_CONVERT_IADDR_TO_RAW (val); | |
914 | } | |
915 | else if (D10V_IADDR_P (val)) | |
916 | { | |
917 | /* also function pointer! */ | |
918 | val = D10V_CONVERT_DADDR_TO_RAW (val); | |
919 | } | |
920 | else | |
921 | { | |
922 | /* data pointer */ | |
923 | val &= 0xFFFF; | |
924 | } | |
925 | if (regnum <= ARGN_REGNUM) | |
926 | write_register (regnum++, val & 0xffff); | |
927 | else | |
928 | { | |
929 | char ptr[2]; | |
7a292a7a | 930 | /* arg will go onto stack */ |
0f71a2f6 | 931 | store_address (ptr, 2, val & 0xffff); |
7a292a7a | 932 | si = push_stack_item (si, ptr, 2); |
c906108c SS |
933 | } |
934 | } | |
935 | else | |
936 | { | |
937 | int aligned_regnum = (regnum + 1) & ~1; | |
938 | if (len <= 2 && regnum <= ARGN_REGNUM) | |
939 | /* fits in a single register, do not align */ | |
940 | { | |
941 | long val = extract_unsigned_integer (contents, len); | |
942 | write_register (regnum++, val); | |
943 | } | |
944 | else if (len <= (ARGN_REGNUM - aligned_regnum + 1) * 2) | |
945 | /* value fits in remaining registers, store keeping left | |
c5aa993b | 946 | aligned */ |
c906108c SS |
947 | { |
948 | int b; | |
949 | regnum = aligned_regnum; | |
950 | for (b = 0; b < (len & ~1); b += 2) | |
951 | { | |
952 | long val = extract_unsigned_integer (&contents[b], 2); | |
953 | write_register (regnum++, val); | |
954 | } | |
955 | if (b < len) | |
956 | { | |
957 | long val = extract_unsigned_integer (&contents[b], 1); | |
958 | write_register (regnum++, (val << 8)); | |
959 | } | |
960 | } | |
961 | else | |
962 | { | |
7a292a7a | 963 | /* arg will go onto stack */ |
c5aa993b | 964 | regnum = ARGN_REGNUM + 1; |
7a292a7a | 965 | si = push_stack_item (si, contents, len); |
c906108c SS |
966 | } |
967 | } | |
968 | } | |
7a292a7a SS |
969 | |
970 | while (si) | |
971 | { | |
972 | sp = (sp - si->len) & ~1; | |
973 | write_memory (sp, si->data, si->len); | |
974 | si = pop_stack_item (si); | |
975 | } | |
c5aa993b | 976 | |
c906108c SS |
977 | return sp; |
978 | } | |
979 | ||
980 | ||
981 | /* Given a return value in `regbuf' with a type `valtype', | |
982 | extract and copy its value into `valbuf'. */ | |
983 | ||
984 | void | |
985 | d10v_extract_return_value (type, regbuf, valbuf) | |
986 | struct type *type; | |
987 | char regbuf[REGISTER_BYTES]; | |
988 | char *valbuf; | |
989 | { | |
990 | int len; | |
991 | /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */ | |
992 | if (TYPE_CODE (type) == TYPE_CODE_PTR | |
993 | && TYPE_TARGET_TYPE (type) | |
994 | && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)) | |
995 | { | |
996 | /* pointer to function */ | |
997 | int num; | |
998 | short snum; | |
999 | snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)); | |
c5aa993b | 1000 | store_address (valbuf, 4, D10V_MAKE_IADDR (snum)); |
c906108c | 1001 | } |
c5aa993b | 1002 | else if (TYPE_CODE (type) == TYPE_CODE_PTR) |
c906108c SS |
1003 | { |
1004 | /* pointer to data */ | |
1005 | int num; | |
1006 | short snum; | |
1007 | snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)); | |
c5aa993b | 1008 | store_address (valbuf, 4, D10V_MAKE_DADDR (snum)); |
c906108c SS |
1009 | } |
1010 | else | |
1011 | { | |
1012 | len = TYPE_LENGTH (type); | |
1013 | if (len == 1) | |
1014 | { | |
1015 | unsigned short c = extract_unsigned_integer (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)); | |
1016 | store_unsigned_integer (valbuf, 1, c); | |
1017 | } | |
1018 | else if ((len & 1) == 0) | |
1019 | memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM), len); | |
1020 | else | |
1021 | { | |
1022 | /* For return values of odd size, the first byte is in the | |
c5aa993b JM |
1023 | least significant part of the first register. The |
1024 | remaining bytes in remaining registers. Interestingly, | |
1025 | when such values are passed in, the last byte is in the | |
1026 | most significant byte of that same register - wierd. */ | |
c906108c SS |
1027 | memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM) + 1, len); |
1028 | } | |
1029 | } | |
1030 | } | |
1031 | ||
1032 | /* The following code implements access to, and display of, the D10V's | |
1033 | instruction trace buffer. The buffer consists of 64K or more | |
1034 | 4-byte words of data, of which each words includes an 8-bit count, | |
1035 | an 8-bit segment number, and a 16-bit instruction address. | |
1036 | ||
1037 | In theory, the trace buffer is continuously capturing instruction | |
1038 | data that the CPU presents on its "debug bus", but in practice, the | |
1039 | ROMified GDB stub only enables tracing when it continues or steps | |
1040 | the program, and stops tracing when the program stops; so it | |
1041 | actually works for GDB to read the buffer counter out of memory and | |
1042 | then read each trace word. The counter records where the tracing | |
1043 | stops, but there is no record of where it started, so we remember | |
1044 | the PC when we resumed and then search backwards in the trace | |
1045 | buffer for a word that includes that address. This is not perfect, | |
1046 | because you will miss trace data if the resumption PC is the target | |
1047 | of a branch. (The value of the buffer counter is semi-random, any | |
1048 | trace data from a previous program stop is gone.) */ | |
1049 | ||
1050 | /* The address of the last word recorded in the trace buffer. */ | |
1051 | ||
1052 | #define DBBC_ADDR (0xd80000) | |
1053 | ||
1054 | /* The base of the trace buffer, at least for the "Board_0". */ | |
1055 | ||
1056 | #define TRACE_BUFFER_BASE (0xf40000) | |
1057 | ||
1058 | static void trace_command PARAMS ((char *, int)); | |
1059 | ||
1060 | static void untrace_command PARAMS ((char *, int)); | |
1061 | ||
1062 | static void trace_info PARAMS ((char *, int)); | |
1063 | ||
1064 | static void tdisassemble_command PARAMS ((char *, int)); | |
1065 | ||
1066 | static void display_trace PARAMS ((int, int)); | |
1067 | ||
1068 | /* True when instruction traces are being collected. */ | |
1069 | ||
1070 | static int tracing; | |
1071 | ||
1072 | /* Remembered PC. */ | |
1073 | ||
1074 | static CORE_ADDR last_pc; | |
1075 | ||
1076 | /* True when trace output should be displayed whenever program stops. */ | |
1077 | ||
1078 | static int trace_display; | |
1079 | ||
1080 | /* True when trace listing should include source lines. */ | |
1081 | ||
1082 | static int default_trace_show_source = 1; | |
1083 | ||
c5aa993b JM |
1084 | struct trace_buffer |
1085 | { | |
1086 | int size; | |
1087 | short *counts; | |
1088 | CORE_ADDR *addrs; | |
1089 | } | |
1090 | trace_data; | |
c906108c SS |
1091 | |
1092 | static void | |
1093 | trace_command (args, from_tty) | |
1094 | char *args; | |
1095 | int from_tty; | |
1096 | { | |
1097 | /* Clear the host-side trace buffer, allocating space if needed. */ | |
1098 | trace_data.size = 0; | |
1099 | if (trace_data.counts == NULL) | |
c5aa993b | 1100 | trace_data.counts = (short *) xmalloc (65536 * sizeof (short)); |
c906108c | 1101 | if (trace_data.addrs == NULL) |
c5aa993b | 1102 | trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof (CORE_ADDR)); |
c906108c SS |
1103 | |
1104 | tracing = 1; | |
1105 | ||
1106 | printf_filtered ("Tracing is now on.\n"); | |
1107 | } | |
1108 | ||
1109 | static void | |
1110 | untrace_command (args, from_tty) | |
1111 | char *args; | |
1112 | int from_tty; | |
1113 | { | |
1114 | tracing = 0; | |
1115 | ||
1116 | printf_filtered ("Tracing is now off.\n"); | |
1117 | } | |
1118 | ||
1119 | static void | |
1120 | trace_info (args, from_tty) | |
1121 | char *args; | |
1122 | int from_tty; | |
1123 | { | |
1124 | int i; | |
1125 | ||
1126 | if (trace_data.size) | |
1127 | { | |
1128 | printf_filtered ("%d entries in trace buffer:\n", trace_data.size); | |
1129 | ||
1130 | for (i = 0; i < trace_data.size; ++i) | |
1131 | { | |
1132 | printf_filtered ("%d: %d instruction%s at 0x%x\n", | |
1133 | i, trace_data.counts[i], | |
1134 | (trace_data.counts[i] == 1 ? "" : "s"), | |
1135 | trace_data.addrs[i]); | |
1136 | } | |
1137 | } | |
1138 | else | |
1139 | printf_filtered ("No entries in trace buffer.\n"); | |
1140 | ||
1141 | printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off")); | |
1142 | } | |
1143 | ||
1144 | /* Print the instruction at address MEMADDR in debugged memory, | |
1145 | on STREAM. Returns length of the instruction, in bytes. */ | |
1146 | ||
1147 | static int | |
1148 | print_insn (memaddr, stream) | |
1149 | CORE_ADDR memaddr; | |
1150 | GDB_FILE *stream; | |
1151 | { | |
1152 | /* If there's no disassembler, something is very wrong. */ | |
1153 | if (tm_print_insn == NULL) | |
1154 | abort (); | |
1155 | ||
1156 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
1157 | tm_print_insn_info.endian = BFD_ENDIAN_BIG; | |
1158 | else | |
1159 | tm_print_insn_info.endian = BFD_ENDIAN_LITTLE; | |
1160 | return (*tm_print_insn) (memaddr, &tm_print_insn_info); | |
1161 | } | |
1162 | ||
392a587b | 1163 | static void |
c906108c SS |
1164 | d10v_eva_prepare_to_trace () |
1165 | { | |
1166 | if (!tracing) | |
1167 | return; | |
1168 | ||
1169 | last_pc = read_register (PC_REGNUM); | |
1170 | } | |
1171 | ||
1172 | /* Collect trace data from the target board and format it into a form | |
1173 | more useful for display. */ | |
1174 | ||
392a587b | 1175 | static void |
c906108c SS |
1176 | d10v_eva_get_trace_data () |
1177 | { | |
1178 | int count, i, j, oldsize; | |
1179 | int trace_addr, trace_seg, trace_cnt, next_cnt; | |
1180 | unsigned int last_trace, trace_word, next_word; | |
1181 | unsigned int *tmpspace; | |
1182 | ||
1183 | if (!tracing) | |
1184 | return; | |
1185 | ||
c5aa993b | 1186 | tmpspace = xmalloc (65536 * sizeof (unsigned int)); |
c906108c SS |
1187 | |
1188 | last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2; | |
1189 | ||
1190 | /* Collect buffer contents from the target, stopping when we reach | |
1191 | the word recorded when execution resumed. */ | |
1192 | ||
1193 | count = 0; | |
1194 | while (last_trace > 0) | |
1195 | { | |
1196 | QUIT; | |
1197 | trace_word = | |
1198 | read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4); | |
1199 | trace_addr = trace_word & 0xffff; | |
1200 | last_trace -= 4; | |
1201 | /* Ignore an apparently nonsensical entry. */ | |
1202 | if (trace_addr == 0xffd5) | |
1203 | continue; | |
1204 | tmpspace[count++] = trace_word; | |
1205 | if (trace_addr == last_pc) | |
1206 | break; | |
1207 | if (count > 65535) | |
1208 | break; | |
1209 | } | |
1210 | ||
1211 | /* Move the data to the host-side trace buffer, adjusting counts to | |
1212 | include the last instruction executed and transforming the address | |
1213 | into something that GDB likes. */ | |
1214 | ||
1215 | for (i = 0; i < count; ++i) | |
1216 | { | |
1217 | trace_word = tmpspace[i]; | |
1218 | next_word = ((i == 0) ? 0 : tmpspace[i - 1]); | |
1219 | trace_addr = trace_word & 0xffff; | |
1220 | next_cnt = (next_word >> 24) & 0xff; | |
1221 | j = trace_data.size + count - i - 1; | |
1222 | trace_data.addrs[j] = (trace_addr << 2) + 0x1000000; | |
1223 | trace_data.counts[j] = next_cnt + 1; | |
1224 | } | |
1225 | ||
1226 | oldsize = trace_data.size; | |
1227 | trace_data.size += count; | |
1228 | ||
1229 | free (tmpspace); | |
1230 | ||
1231 | if (trace_display) | |
1232 | display_trace (oldsize, trace_data.size); | |
1233 | } | |
1234 | ||
1235 | static void | |
1236 | tdisassemble_command (arg, from_tty) | |
1237 | char *arg; | |
1238 | int from_tty; | |
1239 | { | |
1240 | int i, count; | |
1241 | CORE_ADDR low, high; | |
1242 | char *space_index; | |
1243 | ||
1244 | if (!arg) | |
1245 | { | |
1246 | low = 0; | |
1247 | high = trace_data.size; | |
1248 | } | |
1249 | else if (!(space_index = (char *) strchr (arg, ' '))) | |
1250 | { | |
1251 | low = parse_and_eval_address (arg); | |
1252 | high = low + 5; | |
1253 | } | |
1254 | else | |
1255 | { | |
1256 | /* Two arguments. */ | |
1257 | *space_index = '\0'; | |
1258 | low = parse_and_eval_address (arg); | |
1259 | high = parse_and_eval_address (space_index + 1); | |
1260 | if (high < low) | |
1261 | high = low; | |
1262 | } | |
1263 | ||
1264 | printf_filtered ("Dump of trace from %d to %d:\n", low, high); | |
1265 | ||
1266 | display_trace (low, high); | |
1267 | ||
1268 | printf_filtered ("End of trace dump.\n"); | |
1269 | gdb_flush (gdb_stdout); | |
1270 | } | |
1271 | ||
1272 | static void | |
1273 | display_trace (low, high) | |
1274 | int low, high; | |
1275 | { | |
1276 | int i, count, trace_show_source, first, suppress; | |
1277 | CORE_ADDR next_address; | |
1278 | ||
1279 | trace_show_source = default_trace_show_source; | |
c5aa993b | 1280 | if (!have_full_symbols () && !have_partial_symbols ()) |
c906108c SS |
1281 | { |
1282 | trace_show_source = 0; | |
1283 | printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n"); | |
1284 | printf_filtered ("Trace will not display any source.\n"); | |
1285 | } | |
1286 | ||
1287 | first = 1; | |
1288 | suppress = 0; | |
1289 | for (i = low; i < high; ++i) | |
1290 | { | |
1291 | next_address = trace_data.addrs[i]; | |
c5aa993b | 1292 | count = trace_data.counts[i]; |
c906108c SS |
1293 | while (count-- > 0) |
1294 | { | |
1295 | QUIT; | |
1296 | if (trace_show_source) | |
1297 | { | |
1298 | struct symtab_and_line sal, sal_prev; | |
1299 | ||
1300 | sal_prev = find_pc_line (next_address - 4, 0); | |
1301 | sal = find_pc_line (next_address, 0); | |
1302 | ||
1303 | if (sal.symtab) | |
1304 | { | |
1305 | if (first || sal.line != sal_prev.line) | |
1306 | print_source_lines (sal.symtab, sal.line, sal.line + 1, 0); | |
1307 | suppress = 0; | |
1308 | } | |
1309 | else | |
1310 | { | |
1311 | if (!suppress) | |
1312 | /* FIXME-32x64--assumes sal.pc fits in long. */ | |
1313 | printf_filtered ("No source file for address %s.\n", | |
c5aa993b | 1314 | local_hex_string ((unsigned long) sal.pc)); |
c906108c SS |
1315 | suppress = 1; |
1316 | } | |
1317 | } | |
1318 | first = 0; | |
1319 | print_address (next_address, gdb_stdout); | |
1320 | printf_filtered (":"); | |
1321 | printf_filtered ("\t"); | |
1322 | wrap_here (" "); | |
1323 | next_address = next_address + print_insn (next_address, gdb_stdout); | |
1324 | printf_filtered ("\n"); | |
1325 | gdb_flush (gdb_stdout); | |
1326 | } | |
1327 | } | |
1328 | } | |
1329 | ||
ac9a91a7 | 1330 | |
0f71a2f6 JM |
1331 | static gdbarch_init_ftype d10v_gdbarch_init; |
1332 | static struct gdbarch * | |
1333 | d10v_gdbarch_init (info, arches) | |
1334 | struct gdbarch_info info; | |
1335 | struct gdbarch_list *arches; | |
1336 | { | |
c5aa993b JM |
1337 | static LONGEST d10v_call_dummy_words[] = |
1338 | {0}; | |
0f71a2f6 JM |
1339 | struct gdbarch *gdbarch; |
1340 | int d10v_num_regs = 37; | |
1341 | ||
1342 | /* there is only one d10v architecture */ | |
1343 | if (arches != NULL) | |
1344 | return arches->gdbarch; | |
1345 | gdbarch = gdbarch_alloc (&info, NULL); | |
1346 | ||
1347 | set_gdbarch_read_pc (gdbarch, d10v_read_pc); | |
1348 | set_gdbarch_write_pc (gdbarch, d10v_write_pc); | |
1349 | set_gdbarch_read_fp (gdbarch, d10v_read_fp); | |
1350 | set_gdbarch_write_fp (gdbarch, d10v_write_fp); | |
1351 | set_gdbarch_read_sp (gdbarch, d10v_read_sp); | |
1352 | set_gdbarch_write_sp (gdbarch, d10v_write_sp); | |
1353 | ||
1354 | set_gdbarch_num_regs (gdbarch, d10v_num_regs); | |
1355 | set_gdbarch_sp_regnum (gdbarch, 15); | |
1356 | set_gdbarch_fp_regnum (gdbarch, 11); | |
1357 | set_gdbarch_pc_regnum (gdbarch, 18); | |
1358 | set_gdbarch_register_name (gdbarch, d10v_register_name); | |
1359 | set_gdbarch_register_size (gdbarch, 2); | |
1360 | set_gdbarch_register_bytes (gdbarch, (d10v_num_regs - 2) * 2 + 16); | |
1361 | set_gdbarch_register_byte (gdbarch, d10v_register_byte); | |
1362 | set_gdbarch_register_raw_size (gdbarch, d10v_register_raw_size); | |
1363 | set_gdbarch_max_register_raw_size (gdbarch, 8); | |
1364 | set_gdbarch_register_virtual_size (gdbarch, d10v_register_virtual_size); | |
1365 | set_gdbarch_max_register_virtual_size (gdbarch, 8); | |
1366 | set_gdbarch_register_virtual_type (gdbarch, d10v_register_virtual_type); | |
1367 | ||
1368 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1369 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1370 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1371 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1372 | set_gdbarch_long_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1373 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1374 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1375 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1376 | ||
1377 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
1378 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
1379 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
1380 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
1381 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
1382 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
1383 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
1384 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); | |
1385 | set_gdbarch_call_dummy_words (gdbarch, d10v_call_dummy_words); | |
1386 | set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (d10v_call_dummy_words)); | |
1387 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
1388 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
1389 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1390 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
1391 | ||
1392 | set_gdbarch_register_convertible (gdbarch, d10v_register_convertible); | |
1393 | set_gdbarch_register_convert_to_virtual (gdbarch, d10v_register_convert_to_virtual); | |
1394 | set_gdbarch_register_convert_to_raw (gdbarch, d10v_register_convert_to_raw); | |
1395 | ||
1396 | set_gdbarch_extract_return_value (gdbarch, d10v_extract_return_value); | |
1397 | set_gdbarch_push_arguments (gdbarch, d10v_push_arguments); | |
1398 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
1399 | set_gdbarch_push_return_address (gdbarch, d10v_push_return_address); | |
1400 | ||
1401 | set_gdbarch_d10v_make_daddr (gdbarch, d10v_make_daddr); | |
1402 | set_gdbarch_d10v_make_iaddr (gdbarch, d10v_make_iaddr); | |
1403 | set_gdbarch_d10v_daddr_p (gdbarch, d10v_daddr_p); | |
1404 | set_gdbarch_d10v_iaddr_p (gdbarch, d10v_iaddr_p); | |
1405 | set_gdbarch_d10v_convert_daddr_to_raw (gdbarch, d10v_convert_daddr_to_raw); | |
1406 | set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch, d10v_convert_iaddr_to_raw); | |
1407 | ||
1408 | set_gdbarch_store_struct_return (gdbarch, d10v_store_struct_return); | |
1409 | set_gdbarch_store_return_value (gdbarch, d10v_store_return_value); | |
1410 | set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address); | |
1411 | set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention); | |
1412 | ||
1413 | set_gdbarch_frame_init_saved_regs (gdbarch, d10v_frame_init_saved_regs); | |
1414 | set_gdbarch_init_extra_frame_info (gdbarch, d10v_init_extra_frame_info); | |
1415 | ||
1416 | set_gdbarch_pop_frame (gdbarch, d10v_pop_frame); | |
1417 | ||
1418 | set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue); | |
1419 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1420 | set_gdbarch_decr_pc_after_break (gdbarch, 4); | |
1421 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1422 | set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc); | |
1423 | ||
1424 | set_gdbarch_remote_translate_xfer_address (gdbarch, remote_d10v_translate_xfer_address); | |
1425 | ||
1426 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
1427 | set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue); | |
1428 | set_gdbarch_frame_chain (gdbarch, d10v_frame_chain); | |
1429 | set_gdbarch_frame_chain_valid (gdbarch, d10v_frame_chain_valid); | |
1430 | set_gdbarch_frame_saved_pc (gdbarch, d10v_frame_saved_pc); | |
1431 | set_gdbarch_frame_args_address (gdbarch, d10v_frame_args_address); | |
1432 | set_gdbarch_frame_locals_address (gdbarch, d10v_frame_locals_address); | |
1433 | set_gdbarch_saved_pc_after_call (gdbarch, d10v_saved_pc_after_call); | |
1434 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
1435 | ||
1436 | return gdbarch; | |
1437 | } | |
1438 | ||
1439 | ||
c906108c SS |
1440 | extern void (*target_resume_hook) PARAMS ((void)); |
1441 | extern void (*target_wait_loop_hook) PARAMS ((void)); | |
1442 | ||
1443 | void | |
1444 | _initialize_d10v_tdep () | |
1445 | { | |
0f71a2f6 JM |
1446 | register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init); |
1447 | ||
c906108c SS |
1448 | tm_print_insn = print_insn_d10v; |
1449 | ||
1450 | target_resume_hook = d10v_eva_prepare_to_trace; | |
1451 | target_wait_loop_hook = d10v_eva_get_trace_data; | |
1452 | ||
1453 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1454 | ||
1455 | add_com ("trace", class_support, trace_command, | |
1456 | "Enable tracing of instruction execution."); | |
1457 | ||
1458 | add_com ("untrace", class_support, untrace_command, | |
1459 | "Disable tracing of instruction execution."); | |
1460 | ||
1461 | add_com ("tdisassemble", class_vars, tdisassemble_command, | |
1462 | "Disassemble the trace buffer.\n\ | |
1463 | Two optional arguments specify a range of trace buffer entries\n\ | |
1464 | as reported by info trace (NOT addresses!)."); | |
1465 | ||
1466 | add_info ("trace", trace_info, | |
1467 | "Display info about the trace data buffer."); | |
1468 | ||
1469 | add_show_from_set (add_set_cmd ("tracedisplay", no_class, | |
c5aa993b JM |
1470 | var_integer, (char *) &trace_display, |
1471 | "Set automatic display of trace.\n", &setlist), | |
c906108c SS |
1472 | &showlist); |
1473 | add_show_from_set (add_set_cmd ("tracesource", no_class, | |
c5aa993b JM |
1474 | var_integer, (char *) &default_trace_show_source, |
1475 | "Set display of source code with trace.\n", &setlist), | |
c906108c SS |
1476 | &showlist); |
1477 | ||
c5aa993b | 1478 | } |