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cfc14b3a MK |
1 | /* Frame unwinder for frames with DWARF Call Frame Information. |
2 | ||
b811d2c2 | 3 | Copyright (C) 2003-2020 Free Software Foundation, Inc. |
cfc14b3a MK |
4 | |
5 | Contributed by Mark Kettenis. | |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
cfc14b3a MK |
12 | (at your option) any later version. |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
cfc14b3a MK |
21 | |
22 | #ifndef DWARF2_FRAME_H | |
23 | #define DWARF2_FRAME_H 1 | |
24 | ||
ecc9ac84 | 25 | struct gdbarch; |
e6e5e94c | 26 | struct frame_info; |
9f6f94ff TT |
27 | struct dwarf2_per_cu_data; |
28 | struct agent_expr; | |
29 | struct axs_value; | |
cfc14b3a | 30 | |
05cbe71a MK |
31 | /* Register rule. */ |
32 | ||
33 | enum dwarf2_frame_reg_rule | |
34 | { | |
35 | /* Make certain that 0 maps onto the correct enum value; the | |
36 | corresponding structure is being initialized using memset zero. | |
37 | This indicates that CFI didn't provide any information at all | |
38 | about a register, leaving how to obtain its value totally | |
39 | unspecified. */ | |
40 | DWARF2_FRAME_REG_UNSPECIFIED = 0, | |
41 | ||
42 | /* The term "undefined" comes from the DWARF2 CFI spec which this | |
30baf67b | 43 | code is modeling; it indicates that the register's value is |
05cbe71a MK |
44 | "undefined". GCC uses the less formal term "unsaved". Its |
45 | definition is a combination of REG_UNDEFINED and REG_UNSPECIFIED. | |
46 | The failure to differentiate the two helps explain a few problems | |
47 | with the CFI generated by GCC. */ | |
48 | DWARF2_FRAME_REG_UNDEFINED, | |
49 | DWARF2_FRAME_REG_SAVED_OFFSET, | |
50 | DWARF2_FRAME_REG_SAVED_REG, | |
51 | DWARF2_FRAME_REG_SAVED_EXP, | |
52 | DWARF2_FRAME_REG_SAME_VALUE, | |
53 | ||
46ea248b AO |
54 | /* These are defined in Dwarf3. */ |
55 | DWARF2_FRAME_REG_SAVED_VAL_OFFSET, | |
56 | DWARF2_FRAME_REG_SAVED_VAL_EXP, | |
57 | ||
05cbe71a MK |
58 | /* These aren't defined by the DWARF2 CFI specification, but are |
59 | used internally by GDB. */ | |
b39cc962 | 60 | DWARF2_FRAME_REG_FN, /* Call a registered function. */ |
05cbe71a | 61 | DWARF2_FRAME_REG_RA, /* Return Address. */ |
8d5a9abc | 62 | DWARF2_FRAME_REG_RA_OFFSET, /* Return Address with offset. */ |
ea7963f0 FR |
63 | DWARF2_FRAME_REG_CFA, /* Call Frame Address. */ |
64 | DWARF2_FRAME_REG_CFA_OFFSET /* Call Frame Address with offset. */ | |
05cbe71a MK |
65 | }; |
66 | ||
67 | /* Register state. */ | |
68 | ||
69 | struct dwarf2_frame_state_reg | |
70 | { | |
71 | /* Each register save state can be described in terms of a CFA slot, | |
72 | another register, or a location expression. */ | |
73 | union { | |
74 | LONGEST offset; | |
75 | ULONGEST reg; | |
b348037f YQ |
76 | struct |
77 | { | |
78 | const gdb_byte *start; | |
79 | ULONGEST len; | |
80 | } exp; | |
b39cc962 DJ |
81 | struct value *(*fn) (struct frame_info *this_frame, void **this_cache, |
82 | int regnum); | |
05cbe71a | 83 | } loc; |
05cbe71a MK |
84 | enum dwarf2_frame_reg_rule how; |
85 | }; | |
86 | ||
b41c5a85 JW |
87 | enum cfa_how_kind |
88 | { | |
89 | CFA_UNSET, | |
90 | CFA_REG_OFFSET, | |
91 | CFA_EXP | |
92 | }; | |
93 | ||
94 | struct dwarf2_frame_state_reg_info | |
95 | { | |
1c90d9f0 YQ |
96 | dwarf2_frame_state_reg_info () = default; |
97 | ~dwarf2_frame_state_reg_info () | |
98 | { | |
99 | delete prev; | |
1c90d9f0 YQ |
100 | } |
101 | ||
102 | /* Copy constructor. */ | |
103 | dwarf2_frame_state_reg_info (const dwarf2_frame_state_reg_info &src) | |
780942fc | 104 | : reg (src.reg), cfa_offset (src.cfa_offset), |
1c90d9f0 YQ |
105 | cfa_reg (src.cfa_reg), cfa_how (src.cfa_how), cfa_exp (src.cfa_exp), |
106 | prev (src.prev) | |
107 | { | |
1c90d9f0 YQ |
108 | } |
109 | ||
110 | /* Assignment operator for both move-assignment and copy-assignment. */ | |
111 | dwarf2_frame_state_reg_info& | |
112 | operator= (dwarf2_frame_state_reg_info rhs) | |
113 | { | |
114 | swap (*this, rhs); | |
115 | return *this; | |
116 | } | |
117 | ||
118 | /* Move constructor. */ | |
119 | dwarf2_frame_state_reg_info (dwarf2_frame_state_reg_info &&rhs) noexcept | |
780942fc | 120 | : reg (std::move (rhs.reg)), cfa_offset (rhs.cfa_offset), |
1c90d9f0 YQ |
121 | cfa_reg (rhs.cfa_reg), cfa_how (rhs.cfa_how), cfa_exp (rhs.cfa_exp), |
122 | prev (rhs.prev) | |
123 | { | |
124 | rhs.prev = nullptr; | |
1c90d9f0 | 125 | } |
b41c5a85 | 126 | |
780942fc TT |
127 | /* If necessary, enlarge the register set to hold NUM_REGS_REQUESTED |
128 | registers. */ | |
1c90d9f0 YQ |
129 | void alloc_regs (int num_regs_requested) |
130 | { | |
780942fc | 131 | gdb_assert (num_regs_requested > 0); |
1c90d9f0 | 132 | |
780942fc TT |
133 | if (num_regs_requested <= reg.size ()) |
134 | return; | |
1c90d9f0 | 135 | |
780942fc | 136 | reg.resize (num_regs_requested); |
1c90d9f0 YQ |
137 | } |
138 | ||
780942fc | 139 | std::vector<struct dwarf2_frame_state_reg> reg; |
1c90d9f0 YQ |
140 | |
141 | LONGEST cfa_offset = 0; | |
142 | ULONGEST cfa_reg = 0; | |
143 | enum cfa_how_kind cfa_how = CFA_UNSET; | |
144 | const gdb_byte *cfa_exp = NULL; | |
b41c5a85 JW |
145 | |
146 | /* Used to implement DW_CFA_remember_state. */ | |
1c90d9f0 YQ |
147 | struct dwarf2_frame_state_reg_info *prev = NULL; |
148 | ||
149 | private: | |
150 | friend void swap (dwarf2_frame_state_reg_info& lhs, | |
151 | dwarf2_frame_state_reg_info& rhs) | |
152 | { | |
153 | using std::swap; | |
154 | ||
155 | swap (lhs.reg, rhs.reg); | |
1c90d9f0 YQ |
156 | swap (lhs.cfa_offset, rhs.cfa_offset); |
157 | swap (lhs.cfa_reg, rhs.cfa_reg); | |
158 | swap (lhs.cfa_how, rhs.cfa_how); | |
159 | swap (lhs.cfa_exp, rhs.cfa_exp); | |
160 | swap (lhs.prev, rhs.prev); | |
161 | } | |
b41c5a85 JW |
162 | }; |
163 | ||
afe37d6b YQ |
164 | struct dwarf2_cie; |
165 | ||
b41c5a85 JW |
166 | /* Structure describing a frame state. */ |
167 | ||
168 | struct dwarf2_frame_state | |
169 | { | |
afe37d6b | 170 | dwarf2_frame_state (CORE_ADDR pc, struct dwarf2_cie *cie); |
afe37d6b | 171 | |
b41c5a85 JW |
172 | /* Each register save state can be described in terms of a CFA slot, |
173 | another register, or a location expression. */ | |
afe37d6b | 174 | struct dwarf2_frame_state_reg_info regs {}; |
b41c5a85 JW |
175 | |
176 | /* The PC described by the current frame state. */ | |
177 | CORE_ADDR pc; | |
178 | ||
179 | /* Initial register set from the CIE. | |
180 | Used to implement DW_CFA_restore. */ | |
afe37d6b | 181 | struct dwarf2_frame_state_reg_info initial {}; |
b41c5a85 JW |
182 | |
183 | /* The information we care about from the CIE. */ | |
afe37d6b YQ |
184 | const LONGEST data_align; |
185 | const ULONGEST code_align; | |
186 | const ULONGEST retaddr_column; | |
b41c5a85 JW |
187 | |
188 | /* Flags for known producer quirks. */ | |
189 | ||
190 | /* The ARM compilers, in DWARF2 mode, assume that DW_CFA_def_cfa | |
191 | and DW_CFA_def_cfa_offset takes a factored offset. */ | |
afe37d6b | 192 | bool armcc_cfa_offsets_sf = false; |
b41c5a85 JW |
193 | |
194 | /* The ARM compilers, in DWARF2 or DWARF3 mode, may assume that | |
195 | the CFA is defined as REG - OFFSET rather than REG + OFFSET. */ | |
afe37d6b | 196 | bool armcc_cfa_offsets_reversed = false; |
b41c5a85 JW |
197 | }; |
198 | ||
3c3bb058 AB |
199 | /* When this is true the DWARF frame unwinders can be used if they are |
200 | registered with the gdbarch. Not all architectures can or do use the | |
201 | DWARF unwinders. Setting this to true on a target that does not | |
202 | otherwise support the DWARF unwinders has no effect. */ | |
491144b5 | 203 | extern bool dwarf2_frame_unwinders_enabled_p; |
3c3bb058 | 204 | |
8f22cb90 MK |
205 | /* Set the architecture-specific register state initialization |
206 | function for GDBARCH to INIT_REG. */ | |
207 | ||
208 | extern void dwarf2_frame_set_init_reg (struct gdbarch *gdbarch, | |
209 | void (*init_reg) (struct gdbarch *, int, | |
aff37fc1 DM |
210 | struct dwarf2_frame_state_reg *, |
211 | struct frame_info *)); | |
8f22cb90 | 212 | |
3ed09a32 DJ |
213 | /* Set the architecture-specific signal trampoline recognition |
214 | function for GDBARCH to SIGNAL_FRAME_P. */ | |
215 | ||
216 | extern void | |
217 | dwarf2_frame_set_signal_frame_p (struct gdbarch *gdbarch, | |
218 | int (*signal_frame_p) (struct gdbarch *, | |
219 | struct frame_info *)); | |
220 | ||
4fc771b8 DJ |
221 | /* Set the architecture-specific adjustment of .eh_frame and .debug_frame |
222 | register numbers. */ | |
4bf8967c AS |
223 | |
224 | extern void | |
4fc771b8 DJ |
225 | dwarf2_frame_set_adjust_regnum (struct gdbarch *gdbarch, |
226 | int (*adjust_regnum) (struct gdbarch *, | |
227 | int, int)); | |
4bf8967c | 228 | |
4a4e5149 | 229 | /* Append the DWARF-2 frame unwinders to GDBARCH's list. */ |
cfc14b3a | 230 | |
4a4e5149 | 231 | void dwarf2_append_unwinders (struct gdbarch *gdbarch); |
cfc14b3a MK |
232 | |
233 | /* Return the frame base methods for the function that contains PC, or | |
234 | NULL if it can't be handled by the DWARF CFI frame unwinder. */ | |
235 | ||
05cbe71a | 236 | extern const struct frame_base * |
4a4e5149 | 237 | dwarf2_frame_base_sniffer (struct frame_info *this_frame); |
cfc14b3a | 238 | |
e7802207 TT |
239 | /* Compute the DWARF CFA for a frame. */ |
240 | ||
241 | CORE_ADDR dwarf2_frame_cfa (struct frame_info *this_frame); | |
242 | ||
a8fd5589 TT |
243 | /* Find the CFA information for PC. |
244 | ||
245 | Return 1 if a register is used for the CFA, or 0 if another | |
246 | expression is used. Throw an exception on error. | |
247 | ||
248 | GDBARCH is the architecture to use. | |
249 | DATA is the per-CU data. | |
250 | ||
251 | REGNUM_OUT is an out parameter that is set to the register number. | |
252 | OFFSET_OUT is the offset to use from this register. | |
253 | These are only filled in when 1 is returned. | |
254 | ||
255 | TEXT_OFFSET_OUT, CFA_START_OUT, and CFA_END_OUT describe the CFA | |
256 | in other cases. These are only used when 0 is returned. */ | |
257 | ||
258 | extern int dwarf2_fetch_cfa_info (struct gdbarch *gdbarch, CORE_ADDR pc, | |
259 | struct dwarf2_per_cu_data *data, | |
260 | int *regnum_out, LONGEST *offset_out, | |
261 | CORE_ADDR *text_offset_out, | |
262 | const gdb_byte **cfa_start_out, | |
263 | const gdb_byte **cfa_end_out); | |
9f6f94ff | 264 | |
cfc14b3a | 265 | #endif /* dwarf2-frame.h */ |