Commit | Line | Data |
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817a7585 AK |
1 | <?xml version="1.0"?> |
2 | <!-- Copyright (C) 2015-2020 Free Software Foundation, Inc. | |
3 | ||
4 | Copying and distribution of this file, with or without modification, | |
5 | are permitted in any medium without royalty provided the copyright | |
6 | notice and this notice are preserved. --> | |
7 | ||
8 | <!DOCTYPE target SYSTEM "gdb-target.dtd"> | |
9 | <feature name="org.gnu.gdb.arc.core.v2"> | |
10 | <reg name="r0" bitsize="32"/> | |
11 | <reg name="r1" bitsize="32"/> | |
12 | <reg name="r2" bitsize="32"/> | |
13 | <reg name="r3" bitsize="32"/> | |
14 | <reg name="r4" bitsize="32"/> | |
15 | <reg name="r5" bitsize="32"/> | |
16 | <reg name="r6" bitsize="32"/> | |
17 | <reg name="r7" bitsize="32"/> | |
18 | <reg name="r8" bitsize="32"/> | |
19 | <reg name="r9" bitsize="32"/> | |
20 | <reg name="r10" bitsize="32"/> | |
21 | <reg name="r11" bitsize="32"/> | |
22 | <reg name="r12" bitsize="32"/> | |
23 | <reg name="r13" bitsize="32"/> | |
24 | <reg name="r14" bitsize="32"/> | |
25 | <reg name="r15" bitsize="32"/> | |
26 | <reg name="r16" bitsize="32"/> | |
27 | <reg name="r17" bitsize="32"/> | |
28 | <reg name="r18" bitsize="32"/> | |
29 | <reg name="r19" bitsize="32"/> | |
30 | <reg name="r20" bitsize="32"/> | |
31 | <reg name="r21" bitsize="32"/> | |
32 | <reg name="r22" bitsize="32"/> | |
33 | <reg name="r23" bitsize="32"/> | |
34 | <reg name="r24" bitsize="32"/> | |
35 | <reg name="r25" bitsize="32"/> | |
36 | ||
37 | <!-- ARC core data pointer registers. --> | |
38 | <reg name="gp" bitsize="32" type="data_ptr"/> | |
39 | <reg name="fp" bitsize="32" type="data_ptr"/> | |
40 | <reg name="sp" bitsize="32" type="data_ptr"/> | |
41 | ||
42 | <!-- Code pointers. R30 is general purpose, but it used to be ILINK2 in | |
43 | ARCompact, thus its odd position in between of special purpose registers. | |
44 | GCC does't use this register, so it isn't a member of a general group. --> | |
45 | <reg name="ilink" bitsize="32" type="code_ptr"/> | |
46 | <reg name="r30" bitsize="32" group=""/> | |
47 | <reg name="blink" bitsize="32" type="code_ptr"/> | |
48 | ||
49 | <!-- Here goes extension core registers: r32 - r57. --> | |
50 | <!-- Here goes ACCL/ACCH registers, r58, r59. --> | |
51 | ||
52 | <!-- Loop counter. --> | |
53 | <reg name="lp_count" bitsize="32" type="uint32"/> | |
54 | ||
55 | <!-- r61 is a reserved register address. --> | |
56 | ||
57 | <!-- r62 is a long immediate value, not a real register. --> | |
58 | ||
59 | <!-- 4-byte aligned read-only program counter. --> | |
60 | <reg name="pcl" bitsize="32" type="code_ptr" group=""/> | |
61 | </feature> |