Commit | Line | Data |
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4d09ffea | 1 | <?xml version="1.0"?> |
42a4f53d | 2 | <!-- Copyright (C) 2009-2019 Free Software Foundation, Inc. |
4d09ffea MS |
3 | |
4 | Copying and distribution of this file, with or without modification, | |
5 | are permitted in any medium without royalty provided the copyright | |
6 | notice and this notice are preserved. --> | |
7 | ||
8 | <!DOCTYPE target SYSTEM "gdb-target.dtd"> | |
9 | <target> | |
10 | <xi:include href="power-core.xml"/> | |
11 | <xi:include href="power-fpu.xml"/> | |
12 | ||
13 | <feature name="405"> | |
14 | <reg name="pvr" bitsize="32" regnum="87"/> | |
15 | <reg name="sprg0" bitsize="32" regnum="108"/> | |
16 | <reg name="sprg1" bitsize="32"/> | |
17 | <reg name="sprg2" bitsize="32"/> | |
18 | <reg name="sprg3" bitsize="32"/> | |
19 | <reg name="srr0" bitsize="32"/> | |
20 | <reg name="srr1" bitsize="32"/> | |
21 | <reg name="tbl" bitsize="32"/> | |
22 | <reg name="tbu" bitsize="32"/> | |
23 | <reg name="icdbdr" bitsize="32" regnum="119"/> | |
24 | <reg name="esr" bitsize="32"/> | |
25 | <reg name="dear" bitsize="32"/> | |
26 | <reg name="evpr" bitsize="32"/> | |
27 | <reg name="tsr" bitsize="32" regnum="124"/> | |
28 | <reg name="tcr" bitsize="32"/> | |
29 | <reg name="pit" bitsize="32"/> | |
30 | <reg name="srr2" bitsize="32" regnum="129"/> | |
31 | <reg name="srr3" bitsize="32"/> | |
32 | <reg name="dbsr" bitsize="32"/> | |
33 | <reg name="dbcr" bitsize="32"/> | |
34 | <reg name="iac1" bitsize="32"/> | |
35 | <reg name="iac2" bitsize="32"/> | |
36 | <reg name="dac1" bitsize="32"/> | |
37 | <reg name="dac2" bitsize="32"/> | |
38 | <reg name="dccr" bitsize="32"/> | |
39 | <reg name="iccr" bitsize="32"/> | |
40 | <reg name="zpr" bitsize="32" regnum="143"/> | |
41 | <reg name="pid" bitsize="32"/> | |
42 | <reg name="sgr" bitsize="32"/> | |
43 | <reg name="dcwr" bitsize="32"/> | |
44 | <reg name="ccr0" bitsize="32" regnum="149"/> | |
45 | <reg name="dbcr1" bitsize="32"/> | |
46 | <reg name="dvc1" bitsize="32"/> | |
47 | <reg name="dvc2" bitsize="32"/> | |
48 | <reg name="iac3" bitsize="32"/> | |
49 | <reg name="iac4" bitsize="32"/> | |
50 | <reg name="sler" bitsize="32"/> | |
51 | <reg name="sprg4" bitsize="32"/> | |
52 | <reg name="sprg5" bitsize="32"/> | |
53 | <reg name="sprg6" bitsize="32"/> | |
54 | <reg name="sprg7" bitsize="32"/> | |
55 | <reg name="su0r" bitsize="32"/> | |
56 | <reg name="usprg0" bitsize="32"/> | |
57 | </feature> | |
58 | </target> |